Commit Graph

53 Commits (d0dba1a533eb97d8fbb70b36acdaf5ca20f117cc)

Author SHA1 Message Date
Jamie Smith de0c404983
Synchronize changes with Mbed upstream: July 2024 edition (#309)
* remove stdio checks in serial init if no console is available

* STM32WL fix set preamble length to 8

* Add target support for XDOT_MAX32670

* TARGET_STM: only mask CAN rx interrupt after rx interrupt, not all CAN interrupts

* Sleep Radio in between DC scheduled

* Nuvoton HUSBD support endpoint write ZLP

* USBCDC: support ZLP

* Don't overlap STM32 FDCAN RAM sections

* allow to override antenna gain

* TFM: Fix undeclared function tfm_ns_interface_init

ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]

* NUVOTON: CAN: Fix filter mask

NOTE: This fix only targets CAN (M453/M487), not CAN-FD (M467).
NOTE: NUC472 CAN doesn't support filter.

* NUVOTON: CAN: Fix Rx interrupt doesn't work

Major modifications:
1. Handle Rx interrupt based on Message Object interrupt (CAN_IIDR=0x0001~0x0020) instead of CAN_STATUS.RxOK
2. Also handle Tx interrupt following above for consistency

Other related modifications:
1. Fix signature type error in CAN_CLR_INT_PENDING_BIT()
2. Add CAN_CLR_INT_PENDING_ONLY_BIT() which doesn't clear NewDat flag so that user can fetch received message in thread context

NOTE: This fix only targets CAN (NUC472/M453/M487), not CAN-FD (M467).

* NUVOTON: CAN: Fix Message Object number for Tx and recognition of Rx interrupt

1.  The same Message Object number cannot use for both Tx and Rx simultaneously.
    For Tx, Message Object number 31 is reserved instead of 0.
    For Rx, Message Object numbers 0~30 are used and for filters.
2.  NewDat bit (CAN_IsNewDataReceived()) isn't exclusive to Rx.
    Recognize Rx interrupt by Message Object number other than 31.

NOTE: This fix only targets CAN (NUC472/M453/M487), not CAN-FD (M467).

* NUVOTON: CAN: Fix filter mask being zero

On mask being zero, it means any match, not exact match.

NOTE: This fix only targets CAN (M453/M487), not CAN-FD (M467).
NOTE: NUC472 CAN doesn't support filter.

* Allow custom TCXO control parameter

Allow custom TCXO control parameter

* NUVOTON: EMAC: Fix undeclared function mbed_error_printf

ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]

* NUVOTON: AnalogIn: Fix undeclared function gpio_set

ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]

* NUVOTON: CAN: Fix undeclared function gpio_set

ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]

* NUVOTON: AnalogOut: Fix undeclared function gpio_set

ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]

* NUVOTON: SPI: Fix undeclared function gpio_set

ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]

* NUVOTON: I2C: Fix undeclared function gpio_set

ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]

* NUVOTON: Serial: Fix undeclared function gpio_set

ISO C99 and later do not support implicit function declarations [-Wimplicit-function-declaration]

* Add separate flags for I2C slave transfer in progress

Fixes ARMmbed/mbed-os#15498

Adds 2 boolean flags to the STM32 `i2c_s` object
to indicate whether a transfer is in progress,
separate from the existing "transfer pending" flags.

`i2c_slave_write`, `i2c_slave_read` and their associated callbacks
are modified to use these flags in addition to the pending flags.
The original behavior of the pending flags is preserved.

* ESP8266: Fix accessing uninitialized variable

* Added missing delete

* Add ability to change number of status registers for macronix QSPIF devices

* correct scan parameters types

* skip CRC when initializing TDBStore

Problem: The build_ram_table() function of TDBStore loops over every entry, calculates the checksum and compares them to the stored checksum in the entry header to ensure integrity. For larger TDBStores (e.g. 8 MiB or more) in external single-SPI flash devices this check can take very long, thus rendering it unusable in some cases.

Solution: The suggested solution skips the time consuming CRC of the data. After reading the key and calculating its CRC, it sets next_offset to the beginning of the next entry, thereby skipping the data. While this skips the integrity check, it significantly reduces the initial building of the RAM table.

The data CRC can be enabled or disabled with a compiler flag.

Contribution is provided on behalf of BIOTRONIK.

* Added missing check for replay protection pointer before allocating new variable

Problem: If a key with write-once flag is being set in a SecureStore without rollback-protection store (i.e. _rbp_kv == NULL), additional memory will be allocated for the variable _ih->key. The memory will not be deleted, though, as the delete in line 434 only happens if a rollback-protection store exists (i.e. _rbp_kv != NULL)

Solution: Only allocate the memory if _rbp_kv != NULL

Contribution is provided on behalf of BIOTRONIK.

* Increase AT timeout to 10s in AT_CellularSMS::send_sms

For some devices sending can be slow (as an example see SIM800, it can be up to 60s), command is being run properly but default timeout is returning an invalid error.
See https://www.elecrow.com/wiki/images/2/20/SIM800_Series_AT_Command_Manual_V1.09.pdf

* Increase AT timeout to 10s in AT_CellularSMS::get_sms

When SMS list is big and baudrate is not fast enough, with default timeout we can suffer from timeout error while getting a sms because method is parsing the full list and this takes long.

* Fix AT_CellularSMS::list_messages breaking in text mode when CRLF is contained in SMS payload text

When parsing SMS, it can happen that we receive CRLF in the SMS payload (happened to me when receiving provider texts).
As an example, we can receive:

"""
Hello <CR><LF>
World!
"""

With previous implementation, second consume_to_stop_tag was stopping in <CR><LF> and rest of the code was failing for obvious reasons.
With this commit we consume the full payload as bytes.

* Add missing SPDX identifier to a bajillion Nuvoton source files + some others

* More license fixes, upgrade M451 legacy PinNames.h, add MCU description

* Fix some more legacy pin names

---------

Co-authored-by: Jost, Chris <79271064+chrJost@users.noreply.github.com>
Co-authored-by: Charles <hallard04@free.fr>
Co-authored-by: Leon Lindenfelser <llindenfelser@multitech.com>
Co-authored-by: Pavel Sorejs <sorejs@gmail.com>
Co-authored-by: cyliang tw <cyliang@nuvoton.com>
Co-authored-by: jmcloud <jmcloud@tesla.com>
Co-authored-by: Chun-Chieh Li <ccli8@nuvoton.com>
Co-authored-by: Adam Gausmann <adamg@esdemc.com>
Co-authored-by: Mingjie Shen <shen497@purdue.edu>
Co-authored-by: Matthias Goebel <matthias.goebel@biotronik.com>
Co-authored-by: danielzhang <danielzhang@mxic.com.cn>
Co-authored-by: Mathieu Camélique <mathieu.camelique@edu.hefr.ch>
Co-authored-by: David Alonso de la Torre <davidalto97@gmail.com>
2024-07-21 00:16:51 -07:00
Jamie Smith fbaec0c739
Fix STM32H7 LPUART clock source being incorrect for higher baudrates (#263)
* Fix STM32H7 LPUART clock source incorrect for higher baudrates

* Add comment
2024-04-04 21:04:24 -07:00
Pavel S 58e6bf7520
Fix serial low speed baud 2022-05-13 11:16:15 +02:00
Jerome Coutant e2ca71d1bf STM32U5: generic STM32 driver files update 2021-09-10 11:16:16 +02:00
jeromecoutant c02cb71b35 STM32 common filess astyle 2021-05-25 14:45:30 +02:00
Anna Bridge b91a705e74
Merge pull request #14444 from jeromecoutant/PR_GPIO_FREE
STM32: reset GPIO value is analog mode
2021-03-29 11:23:15 +01:00
George Psimenos 61cfaa15cd Update UART pin names & add MBED_CONF_TARGET_STDIO_UART overrides 2021-03-23 11:17:17 +00:00
jeromecoutant a6c213bb10 [STD-PIN] Replace STDIO_UART_TX by USBTX 2021-03-18 17:01:50 +00:00
jeromecoutant 20e9235a26 STM32 SERIAL : correct GPIO free 2021-03-18 14:52:59 +01:00
reme 5a2835c18c STM32WL : ADDING STM32 SUPPORT
Add code concerning all STM32 platforms
2021-02-05 08:04:31 +00:00
jeromecoutant 73d1c63741 STM32 SERIAL: free RTS/CTS pins 2020-11-04 15:47:14 +01:00
Przemyslaw Stekiel 713be4fd77 STM pin_function(), pin_mode(): return immediately when given pin is NC
Additionally, remove redundant pin checks against NC when above functions are used.
2020-02-19 11:46:59 +01:00
jeromecoutant c1386cf52d STM32L5 : update generic STM files for L5 2020-01-23 17:54:55 +01:00
Przemyslaw Stekiel 8a938ea777 STM serial free: Set pin function only if pin is defined (not NC) 2020-01-10 14:59:28 +01:00
Przemyslaw Stekiel 79d16ae8f7 STM serial init: Set pin function only if pin is defined (not NC) 2020-01-03 14:14:26 +01:00
Martin Kojtal 7177d8fefe
Merge pull request #11950 from ABOSTM/DISCO_H747I_TICKLESS
DISCO_H747I: add support of MBED_TICKLESS
2019-11-29 09:48:09 +01:00
Przemyslaw Stekiel b2dad08387 Change explicit pinmap to static pinmap 2019-11-28 08:32:12 +01:00
Przemyslaw Stekiel 3d2bebde0c STM32 serial driver: Add explicit pinmap support 2019-11-28 08:32:00 +01:00
Alexandre Bourdiol affe7113ef TARGET_STM: Remove timeout on HSEM.
With tickless mechanism hsem can be used for quite a long time
(time to set up PLL clock).
Also, if hsem is held to long, then this is not the current core which is faulty,
but probably the other (the one which hold the HSEM)
2019-11-27 14:25:43 +01:00
Alexandre Bourdiol adcf0e2fa5 DISCO_H747I Dualcore support
Add 2 targets for DISCO_H747I dualcore:
* DISCO_H747I      -> for CM7 core
* DISCO_H747I_CM4  -> for CM4 core

Current restrictions:
* TICKLESS deactivated
* DeepSleep not supported (DeepSleep wrapped to sleep)

Warning: use of the same IP (example I2C1) by both core at the same time is not prevented,
but is strongly not recommended.
Some Hardware Semaphore are use for common IP, to manage concurrent access by both cores: Flash, GPIO, RCC.

Warning: Drag and drop of binary to DISCO_H747I will flash CM7.
         In order to flash CM4, one can use STM32 CubeProgrammer tool.
2019-10-14 18:02:57 +02:00
jeromecoutant 8a3fd6a040 STM32 LPUART update 2019-07-05 17:52:41 +02:00
bcostm beab69704a NUCLEO_WB55RG: update STM common files
- Include RTC ll file from hal as in other families
- STM32WB: update Flash API driver
2019-03-29 16:21:38 +01:00
Russ Butler 34c176654d Add HAL API for serial pinmap
Add the functions serial_tx_pinmap, serial_rx_pinmap, serial_cts_pinmap
and serial_rts_pinmap to all targets.
2019-02-08 09:10:28 -06:00
jeromecoutant b1a284a876 STM32: astyle check 2019-01-10 10:22:21 +01:00
jeromecoutant 4b67820f8a NUCLEO_H743ZI: add initial SDK 2019-01-04 10:03:36 +01:00
Cruz Monrreal 5c136cc5cc
Merge pull request #8403 from bcostm/fix_issue_8372_serial
STM32: fix issue with serial_is_tx_ongoing function
2018-10-16 10:25:37 -05:00
bcostm 4017dea77f STM32: typo corrections 2018-10-15 11:14:18 +02:00
bcostm 276d16f70d STM32: fix issue with serial_is_tx_ongoing function 2018-10-12 15:40:11 +02:00
Eman869 c68e7c61ed
Check LPUART clock source in STOP mode
Check LPUART clock source before enable it in STOP mode, only LSE could be enabled in STOP mode.
2018-09-27 19:12:42 +08:00
bcostm 4c31be2db4 STM32: fix wrong LSE config in serial_baud function 2018-09-19 16:46:54 +02:00
Cruz Monrreal e85acac175
Merge pull request #7717 from LMESTM/fix_checkfifo
STM32: check for UART ongoing transfers before entering deepsleep
2018-08-09 10:17:00 -05:00
Laurent Meunier e12d98e1c0 Use HAL coding style for function naming 2018-08-07 13:42:46 +02:00
Laurent Meunier 402f3f1c3f STM32: check for UART ongoing transfers before entering deepsleep
As suggested by Russ Butler in mbed-os issue #7328, and until there is an
implementation of mbed-os issue #4408, we are implementing a workaround
at HAL level to check if there is any ongoing serial transfer (which happens
if HW FIFO is not yet empty).

In case a transfer is ongoing, we're not entering deep sleep and
return immediately.
2018-08-07 11:30:53 +02:00
bcostm 9598dd9f12 STM32: remove uart force_reset at init 2018-07-30 14:52:31 +02:00
bcostm 665de33cc6 stm32 lpuart: enable lse and hsi if not done 2018-07-12 15:58:02 +02:00
bcostm 0c417ab8b7 astyle 2018-06-29 10:12:40 +02:00
bcostm 9be8541a30 STM32: add lpuart_clock_source config
Keep same clock configuration as done before this PR (LSE and PCLK1).
Use a JSON file to change it.
2018-06-29 10:10:29 +02:00
jeromecoutant 433ba46132 TARGET_STM astyle 2018-06-27 14:21:07 +02:00
Marc Emmers 7881e68efe STM32L0: Enable stop mode operation for the LPUART 2018-02-06 15:42:39 +01:00
Marc Emmers 01660ff5ae STM32L0/4: Always try to select LSE if LPUART and baudrate <= 9600 2018-02-06 15:42:39 +01:00
bcostm eb4b339c37 STM32 serial: add missing function declaration 2018-01-30 09:48:53 +01:00
bcostm b6efdd58c8 STM32 serial: improve index assignment in serial_init 2018-01-29 17:23:21 +01:00
bcostm a908d28f26 STM32 serial: coding style 2018-01-29 17:23:20 +01:00
bcostm 73ffc06ffd STM32 serial: fix linking error 2018-01-29 17:23:20 +01:00
bcostm e446c26584 STM32 serial: use uart_name instead of uart_base 2018-01-29 17:23:20 +01:00
bcostm 066da18e0d STM32 serial: add get_uart_index utility function 2018-01-29 17:23:20 +01:00
bcostm 0efd33f010 STM32 serial: move init_uart function at the end of file 2018-01-29 17:23:20 +01:00
bcostm 2cdc110747 STM32: fix serial 7bit data format 2018-01-22 15:43:50 +01:00
jeromecoutant e4169b7a9e STM32: update init procedure
- STDIO_UART define is no more used
- configuring a new serial with the same UART as STDIO is no more allowed
2018-01-05 15:16:38 +01:00
jeromecoutant 07e71d6ec8 STM32 LPUART : update clock source depending on expected baudrate 2017-11-23 14:52:35 +01:00