Commit Graph

302 Commits (c596cdad36ee27a4ed7669f73011d8aeaf675c15)

Author SHA1 Message Date
jeromecoutant 2b4d83ef1e Run astyle 2016-12-21 16:54:19 +00:00
jeromecoutant ab28a5e5cb STM32: Refactor lp_ticker.c + rtc_api.c + sleep.c + rtc_api_hal.h files 2016-12-21 16:54:18 +00:00
bcostm 30dddf115a Correct wrong alternate-function number for CAN PB_8/PB_9 pins and PWM PC_7 pin 2016-12-21 10:27:50 +01:00
Laurent MEUNIER 20c9af8bec STM32: I2C unitary functions for IP V2
STM32 supported targets have 2 possible versions of I2C.
This patch makes the start / stop / read and write byte work ok for IP V2.
This was not working before and does not seem to be widely used.
2016-12-21 09:27:52 +01:00
Anna Bridge f2ce7ebb99 Merge pull request #3442 from LMESTM/dev_stm_i2c_f1
Dev stm i2c f1
2016-12-19 17:51:58 +00:00
Anna Bridge 9e03765d04 Merge pull request #3422 from szechyjs/disco_f303vc_can
Enable CAN on DISCO_F303VC
2016-12-19 17:37:48 +00:00
Anna Bridge d1aa6eea52 Merge pull request #3410 from jeromecoutant/PR_ST_L4_ASSERT
STM32L4 : map ST HAL assert into MBED assert
2016-12-19 17:33:13 +00:00
Anna Bridge a915fa86e4 Merge pull request #3390 from jeromecoutant/PR_ST_F3_ASSERT
STM32F3 : map ST HAL assert into MBED assert
2016-12-19 17:24:26 +00:00
Anna Bridge 42389c1420 Merge pull request #3389 from jeromecoutant/PR_ST_F2_ASSERT
STM32F2 : map ST HAL assert into MBED assert
2016-12-19 17:23:37 +00:00
Anna Bridge 89190fd794 Merge pull request #3381 from jeromecoutant/PR_ST_F1_ASSERT
STM32F1 : map ST HAL assert into MBED assert
2016-12-19 17:22:54 +00:00
Laurent MEUNIER 580d96431e STM32 I2C manage STOP specific case
In case the user applicaiton makes a mixed usage of unitary function
(start, stop, byte write & read) with SYNC operation (write and read of
data buffers with start and stop management), we need to reset the
STM32 HAL state as it is by-passed by a direct call to STOP
2016-12-16 08:54:39 +01:00
Laurent MEUNIER 8406a99dc8 STM32 I2C: avoid timeout to be 0
In continuation of previous IsDeviceReady case, let's
add 1 in case length is 0 (even though not recommended)
2016-12-16 08:54:39 +01:00
Laurent MEUNIER 37c94a03f0 STM I2C: manage Is Device Ready case
Some device drivers use a data lenght of 0 to check if device is ready.
STM32 HAL provides a dedicated service for that, so let's use it.
2016-12-16 08:54:39 +01:00
Laurent MEUNIER c0ca0a7e2c STM I2C - move i2c_read in SYNC part
just change the place of code to have i2c_read and i2c_write together
2016-12-16 08:54:39 +01:00
Sam Grove 19acef97ee Merge pull request #3429 from LMESTM/fix_stm_i2c_fix_init
Fix stm i2c fix init
2016-12-15 10:35:13 -06:00
Sam Grove 45fa92dcb3 Merge pull request #3427 from LMESTM/fix_stm_i2c_slave
Fix stm i2c slave
2016-12-15 10:33:06 -06:00
Sam Grove cf75543cfa Merge pull request #3424 from bcostm/fix_dma_f4
STM32F4 - FIX to add the update of hdma->State variable
2016-12-15 10:32:22 -06:00
Sam Grove 4524c5f917 Merge pull request #3411 from jeromecoutant/PR_ST_L0_ASSERT
STM32L0 : map ST HAL assert into MBED assert
2016-12-15 10:30:03 -06:00
Sam Grove 4c2b84a865 Merge pull request #3408 from jeromecoutant/PR_ST_F7_ASSERT
STM32F7 : map ST HAL assert into MBED assert
2016-12-15 10:29:34 -06:00
Sam Grove ea555e68a1 Merge pull request #3393 from andreaslarssonublox/ublox_fix_isr_reg_reeval
ISR register never re-evaluated in HAL_DMA_PollForTransfer for STM32F4
2016-12-15 10:28:30 -06:00
Sam Grove 0a40444b76 Merge pull request #3379 from jeromecoutant/PR_ST_F0_ASSERT
STM32F0 : map ST HAL assert into MBED assert
2016-12-15 10:25:09 -06:00
Sam Grove 38411e917f Merge pull request #3366 from bcostm/dev_nucleo_f412zg
NUCLEO_F412ZG - Add new platform
2016-12-15 10:19:51 -06:00
jeromecoutant e1f4d69109 STM32L0 : correct ST HAL API call
- RCC init: unused clock was enabled without any init parameters
- ADC: a parameter setting was missing
- GPIO: mode was not allowed by ST HAL API
- tick: init value was too high for 16b
2016-12-14 11:10:03 +01:00
jeromecoutant 2c5249b196 STM32L0 : refactor stm32l0xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-14 11:09:32 +01:00
jeromecoutant dd88e97e0b STM32F4 : correct ST HAL API call
- RCC init: one PLL parameter was missing
- GPIO: mode was not allowed by ST HAL API
2016-12-14 10:03:02 +01:00
Laurent MEUNIER 57eb4a0d1d STM32 F1: move F1 to I2C common code
Now that F1 HAL has been updated to support required APIs,
the F1 family can also be moved to common code.
2016-12-14 08:36:30 +01:00
Laurent MEUNIER e7cab5c8dc [STM32] HAL F1: I2C fix btf / rxne cases
Applying the same fix as in L1 and F4.
This is an alignement to F4 HAL as the same IP is used.
2016-12-14 08:35:32 +01:00
Laurent MEUNIER f88803b7fe STM32 F1 HAL V1.0.5
This is a partial update of HAL drivers, especially for I2C driver update
2016-12-14 08:35:12 +01:00
Sam Lin d4c18b0058 Use __HAL_CAN_CLEAR_FLAG macro clear TSR .
Redress stm32f1xx_hal_can.h header file comment
2016-12-14 08:42:55 +08:00
Jared Szechy f941960d1c
Add alternative CAN pins to DISCO_F303VC 2016-12-13 11:20:22 -05:00
Laurent MEUNIER 77e202f064 STM32 I2C: use higher IRQ priority for slave vs. master 2016-12-13 11:59:12 +01:00
Laurent MEUNIER 36a0365d2d STM32 I2C: differentiate HW reset and driver reset
Make a distinct i2c_reset function as defined in MBED HAL api,
from the i2C_hw_reset which simply drives the HW reset signals
2016-12-12 17:33:14 +01:00
Laurent MEUNIER 6cdac88a1c SMT32 I2C: initialize clock before configuring PINs
This is needed especially for F1 family but can apply to all.
2016-12-12 14:52:11 +01:00
Laurent MEUNIER ee9c8acbe4 STM32 I2C: Initialize hz parameter before reset
The hz value is used to compute timeouts,
and timeout are used in reset function, so the parameter needs to be
initialized to its default value before being used.
2016-12-12 14:48:43 +01:00
Laurent MEUNIER 9895bcf130 STM32 I2C: restore slave address in case of reset 2016-12-12 14:44:37 +01:00
bcostm fe73b43a0a FIX to add the update of hdma->State variable 2016-12-12 10:43:25 +01:00
Jared Szechy f5f3dc8143 Enable CAN on DISCO_F303VC 2016-12-11 22:03:29 -05:00
Brian Daniels 6085905658 Renames i2c_api.c for STM32F1 targets to fix IAR exporter.
The IAR build system does not allow two files to have the same name.
This renames the i2c_api.c file for the STM32F1 family to
i2c_api_stm32f1.c to avoid this issue. The common i2c_api.c file shared
among all ST targets is not actually used for STM32F1 targets as it
protected with an #ifdef guard.
2016-12-09 12:47:17 -06:00
Martin Kojtal ce9d2526f8 Merge pull request #3409 from jeromecoutant/PR_ST_L1_ASSERT
STM32L1 : map ST HAL assert into MBED assert
2016-12-09 15:38:21 +01:00
Martin Kojtal e01366ce8f Merge pull request #3399 from bcostm/fix_issue_3266
NUCLEO_F103RB - Add SERIAL_FC feature
2016-12-09 15:37:57 +01:00
Martin Kojtal b13954c6b5 Merge pull request #3377 from LMESTM/fix_L152RE_Rcc_Config
STM32 NUCLEO-L152RE Update system core clock to 32MHz
2016-12-09 15:36:07 +01:00
Martin Kojtal a3e41f246e Merge pull request #3369 from adustm/disco_f469_newpins
Add CAN2 missing pins for connector CN12
2016-12-09 15:35:07 +01:00
Martin Kojtal 04f940de2d Merge pull request #3324 from LMESTM/dev_i2c_common_code
Dev i2c common code
2016-12-09 15:30:00 +01:00
jeromecoutant 4ea65df99d STM32F3 : correct ST HAL API call
- CAN: compilation issue with assert enabled
- GPIO: mode was not allowed by ST HAL API
2016-12-09 14:56:52 +01:00
jeromecoutant 008a12327c STM32F2 : correct ST HAL API call
- GPIO: mode was not allowed by ST HAL API
2016-12-09 14:52:51 +01:00
jeromecoutant 0e404c2b48 STM32F1 : correct ST HAL API call
- GPIO: mode was not allowed by ST HAL API
- PIN map: assert has highlighted an issue for pullup/pulldown setting
- RTC: year after 2000 was not taken into account
2016-12-09 14:48:26 +01:00
jeromecoutant 3734269326 STM32L4 : correct ST HAL API call
- ll_utils: compilation issue
- GPIO: mode was not allowed by ST HAL API
2016-12-09 13:58:22 +01:00
jeromecoutant 3ab5dce41d STM32L1 : correct ST HAL API call
- RCC init: unused clock was enabled without any init parameters
- RCC init: one PLL parameter was missing
- ADC: a parameter setting was missing to init clock
- GPIO: mode was not allowed by ST HAL API
- ll_utils: compilation issue
2016-12-09 11:32:08 +01:00
jeromecoutant db9dcb8b40 STM32F7 : correct ST HAL API call
- RCC init: unused clock was enabled without any init parameters
- RCC init: one PLL parameter was missing
- GPIO: mode was not allowed by ST HAL API
2016-12-09 09:58:54 +01:00
jeromecoutant 6aef5333bd STM32F0 : correct ST HAL API call
- CAN: compilation issue with assert enabled
- ADC: init parameter was not allowed by ST HAL API
- GPIO: mode was not allowed by ST HAL API
2016-12-09 09:44:54 +01:00
Sam Lin b2f8de8294 Repair the Transmit mailbox (0,1,2) empty interrupt Flag not clear BUG 2016-12-09 10:44:28 +08:00
jeromecoutant 12d2795871 STM32L1 : refactor stm32l1xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-08 17:03:25 +01:00
bcostm 88988b688b Add external declaration of PinMap_UART_RTS/CTS[] const tables 2016-12-08 16:43:26 +01:00
jeromecoutant 64e92a54de STM32L4 : refactor stm32l4xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-08 16:15:47 +01:00
bcostm db8f966a2c Correct A3, A4, A5 pins definitions 2016-12-08 15:57:05 +01:00
bcostm 9ce9d1a9e7 Correct SDIO_UART pins configuration 2016-12-08 15:57:05 +01:00
bcostm 49755981dd Add this platform in mbed_rtx.h file 2016-12-08 15:57:05 +01:00
bcostm 5b2946ded9 Correct system clock configuration 2016-12-08 15:57:05 +01:00
bcostm 1796e8cd9a Update hal_tick files 2016-12-08 15:57:05 +01:00
bcostm 19828d8dd5 Add startup and linker files for ARM_STD, ARM_MICRO, IAR 2016-12-08 15:57:05 +01:00
bcostm 2ccbd27baf Add GCC_ARM files and fix errors during GCC build 2016-12-08 15:57:05 +01:00
bcostm f1c6b0f842 Add cmsis, hal_tick, system files 2016-12-08 15:57:05 +01:00
bcostm 3b1fb796c3 Add first pin, port and objects files 2016-12-08 15:57:05 +01:00
jeromecoutant 9dc5cd1266 STM32F7 : refactor stm32f7xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-08 15:54:38 +01:00
jeromecoutant fa8529dea3 STM32F4 : refactor stm32f4xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-07 15:31:41 +01:00
jeromecoutant d30c34c5d1 STM32F3 : map ST HAL assert into MBED assert 2016-12-07 15:09:55 +01:00
jeromecoutant 06ffb4cf8a STM32F2 : map ST HAL assert into MBED assert 2016-12-07 14:52:24 +01:00
jeromecoutant f0156306ac STM32F0 : map ST HAL assert into MBED assert 2016-12-07 14:13:19 +01:00
jeromecoutant b606267641 STM32F1 : map ST HAL assert into MBED assert 2016-12-07 14:08:06 +01:00
andreas.larsson b5b3bede31 Added tmpisr = regs->ISR; at the end of the while loop to re-evaluate the ISR value 2016-12-07 12:22:31 +01:00
Laurent MEUNIER 8e11541a74 STM32 NUCLEO-L152RE Update system core clock to 32MHz
Even when HSE is used, it is possible to get a 32MHz system clock
8MHz x PLLMUL=12 % PLLDIV=2 = 32MHz

And we still get 48MHz USB clock:
8MHz x PLLMUL=12 % 2 = 48MHz

This allows to take full benefit of the CPU capability.
2016-12-06 11:45:19 +01:00
adustm 3fdbe85b00 Add CAN2 missing pins for connector CN12 2016-12-05 18:24:30 +01:00
Martin Kojtal bd499daae8 Merge pull request #3304 from jeromecoutant/PR_L476
STM32L476: no HSE is present in NUCLEO and DISCO boards
2016-12-02 15:48:38 +01:00
Martin Kojtal 1c2c121741 Merge pull request #3303 from adustm/stm_fix_interrupt_in
Fix #2956 #2939 #2957 #2959 #2960: Add HAL_DeInit function in gpio_irq destructor
2016-12-02 15:47:50 +01:00
Laurent MEUNIER 29b32b84b3 STM32 I2C - 1MHZ frequency is allowed
So make the assert to cover all possible values
Also assert applies only for I2C_IP_VERSION_V2.
Also in case of I2C_IP_VERSION_V1, the HAL makes the proper
checks and can dynamically scale the frequency in case of
intermediate value.
2016-12-01 15:20:11 +01:00
bcostm 18dc6f4f81 Remove TIM_IT_UPDATE flag in HAL_Suspend/ResumeTick functions to make LPT tests pass. 2016-11-30 11:31:25 +01:00
jeromecoutant 448f501d4a STM32L476: comments update 2016-11-30 08:52:49 +01:00
jeromecoutant 757944ee24 STM32L476: no HSE is present in NUCLEO and DISCO boards 2016-11-30 08:51:18 +01:00
Laurent MEUNIER 3fad50287c [STM32] Make most of the I2C code into a common file
Since most of the code in i2c_api.c is now relying on STM32 HAL, there
is now a possibility to make a common usage of this code accross families.

The IP version definition is introduced per family, to allow a switch of
functionnalities, especially the frequency management which differs.
BTw, we fix the F0 frequency settings at the same time.

F1 is managed for now as an exception as the HAL API for sequential transmit
/receive is not yet available (coming soon)
2016-11-30 08:23:13 +01:00
Laurent MEUNIER 23926a2418 [STM32] HAL I2C (V2) sequential transmit / receive
In case of sequential transmit / receive, there is a need to:
- not use the reload option
- generate a new START on each new transaction

This applies to all HAL supporting the IP version V2.
2016-11-30 08:23:13 +01:00
Laurent MEUNIER a0722b1086 [STM32] HAL F2: I2C fix btf / rxne cases
Applying the same fix as in L1 and F4
2016-11-30 08:23:13 +01:00
Laurent MEUNIER 85a2f7ac49 [STM32] HAL L1: I2C fix btf / rxne cases
This is an alignement to F4 HAL as the same IP is used.
Next official HAL delivery update hall will include the same alignement.
2016-11-30 08:23:13 +01:00
Laurent MEUNIER 77364f9fe2 [STM32] HAL L0: I2C / DMA updates
This is prelim update before official V1.8.0 HAL to the needed HAL API
available as in F0 HAL which is using the same IP.
2016-11-30 08:23:13 +01:00
Martin Kojtal c57427f77f Merge pull request #3321 from jeromecoutant/PR_L432KC
no HSE available by default for NUCLEO_L432KC
2016-11-29 18:25:17 +01:00
Martin Kojtal 519b500d4c Merge pull request #3320 from bcostm/fix_vref_label
STM32 - Add ADC_VREF label
2016-11-29 18:24:52 +01:00
Martin Kojtal bd994b3f41 Merge pull request #3302 from bcostm/fix_issue_1685
STM32F4 AnalogIn - Clear VBATE and TSVREFE bits before configuring ADC channels
2016-11-29 18:21:14 +01:00
Martin Kojtal a8ebfaa058 Merge pull request #3288 from LMESTM/dev_spi_asynch_l0l1
Dev spi asynch l0l1
2016-11-29 18:17:06 +01:00
Martin Kojtal bb2d03f34b Merge pull request #3213 from bcostm/factorize_ticker
STM32: Refactor us_ticker.c + hal_tick.c files
2016-11-29 18:10:45 +01:00
Martin Kojtal 93c08f340a Merge pull request #3062 from jamike/TARGET_STM_USBDEVICE_FS
TARGET_STM :USB device FS
2016-11-29 18:07:11 +01:00
jeromecoutant a933032a58 no HSE available by default for NUCLEO_L432KC 2016-11-24 11:33:43 +01:00
bcostm 92d39e2390 Add ADC_VREF label 2016-11-24 10:30:23 +01:00
andreas.larsson 9abb7c3777 Updated ARM binary 2016-11-23 17:39:28 +01:00
andreas.larsson 4648ec606b Added updated drivers for GCC, IAR 2016-11-23 15:18:17 +01:00
andreas.larsson c2d09bd6a2 Fixed wrong start params to cbMAIN_startWlan 2016-11-23 11:38:35 +01:00
bcostm a3baf2d7bf Add more comment on the modified line 2016-11-22 11:03:44 +01:00
adustm 0219b64af4 fix #2956. Add HAL_DeInit function if gpio_irq destructor
This allows ci-test-shield tests-api-interruptin to pass
2016-11-21 15:55:15 +01:00
bcostm 2ae748910b STM32F4 - Clear VBATE and TSVREFE bits before configuring ADC channels 2016-11-21 13:07:26 +01:00
Laurent MEUNIER e2613d5058 stm32 spi : IRQ handler light optimization
This commit contains a few optimizations to get a better performance
in SPI Asynch mode
2016-11-18 09:59:53 +01:00
Laurent MEUNIER 79af576051 stm32 spi - IRQ management
Disable IRQ when transfer is finished.
Also clear pending IRQ after they have been disabled.
2016-11-18 09:59:53 +01:00
Laurent MEUNIER 64a037cc8d STM32L0 - update spi HAL driver
This is a temporary update waiting for the next official release
2016-11-18 09:59:53 +01:00