- Fix typo in module comment
- Redefine the default system behaviour in sleep mode
- Guard K64F enableWait flag
- Remove bit shifts from reset reason enum
- Add preprocessor guard to watchdog api that errors if the reset reason api is not also implemented
- Add RESET_REASON and WATCHDOG to K64F targets.json
- Add watchdog reference implementation
HAL watchdog functionality will be implemented as two separate APIs. The reset
reason API allows a user to detect the last system reset reason to identify if
a Watchdog was triggered. The Watchdog API allows configuring and updating
Watchdog timers on all boards. This commit defines the headers.
It would probably be worth adding tests for the ability to initialise NC
pins and check `is_connected`. Some platforms are assert failing the
init, and can't be 100% sure `is_connected` is working on those
platforms either.
The knowledge that lp_ticker runs in deep sleep was hard-coded with a
comparison check of a ticker_data_t pointer against get_lp_ticker_data.
Remove this hard-coded check, which adds a linker dependency against
the low power ticker even if not being used - put a flag into the
ticker_interface_t.
A future extension might be to move this flag into the ticker_info_t
provided by the HAL, but for the moment keep the assumption that
lp_ticker does run, us_ticker doesn't.
This commit takes some of the work done on the SPI class from #8445, and
refines it, to provide the per-peripheral mutex functionality.
This also implements GPIO-based SSEL, which exposes a new
select()/deselect() API for users to group transfers, and should work on
every platform (unlike the HAL-based SSEL). This requires users to use a
new constructor to avoid backwards compatibility issues.
To activate the per-peripheral mutex, the HAL must define SPI_COUNT and
provide spi_get_peripheral_name(). (In #8445 this is a reworked
spi_get_module, but the name is changed here to avoid a collision with
existing HALs - this commit is designed to work without wider HAL
changes).
Fixes: #9149
Add support for listing all the pins of one or more form factors.
This is in preparation for automated testing of the default form
factor.
This patch includes the following:
-A function to get a list of restricted pins which should not be
used for testing due to some caveat.
-The target config "default-form-factor" which can specify which form
factor should be tested
-Form factor information for the arduino form factor
Add 2 new pinmap utility functions:
-pinmap_find_peripheral_pins
-pinmap_list_has_pin
Also add the new type PinList which contains a list of pins allowing
for NC and duplicate entries.
Add the functions qspi_master_sclk_pinmap, qspi_master_ssel_pinmap and
qspi_master_data0_pinmap-qspi_master_data3_pinmap to all targets with
qspi support.
Internally in sleep tracing `debug` was used for trace prints, but
all sleep API's are ISR safe and used in interrupts. This resulted in
hardfaults / errors.
Solution is to use `mbed_error_printf` instead for printing on UART
Critical section count/state variables are synchronised by IRQ disabling and
critical section calls themselves, so do not need to be volatile.
This eliminates a couple of unnecessary reads of the counter variable.
The DEVICE_FOO macros are always defined (either 0 or 1).
This patch replaces any instances of a define check on a DEVICE_FOO
macro with value test instead.
Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
targets.json was not specifying the same macro name as the code was
checking for, so setting was ineffective.
Making this work tripped up not-supported checks in ARMv8-M - rather than deal
with making this work, support it instead.
Both ARMv7-M and ARMv8-M slightly reduce code size and runtime impact if
mpu-rom-end is 0x1fffffff, using one fewer region.
This means default setup for ARMv8-M now requires 5 regions, with
mpu-rom-end set to default 0x0fffffff, but this can be put back to 4 by
changing the setting.
As we build for a specific CPU, a runtime check for number of MPU
regions in release builds is not worthwhile. Make it an assert only.
Saves a little space in develop images, a lot in release.
Switch to higher-level calls and macros, and fix an error in the ARMv8-M
version - "inner" attributes were not being set correctly due to a
copy/paste error - "outer" was being set twice.
This means RAM would have been marked WTRA rather than WBWA for the
inner cache.
Slightly reduces ARMv7-M init code size by feeding region number
into RBAR instead of using RNR.
Update the LowPowerTickerWrapper class to handle rather than ignore
early low power ticker interrupts. This ensures that devices don't get
stuck in sleep due to a ignored early low power ticker interrupt.
Make the following changes:
-Allow a vector specific ARM MPU driver by defining MBED_MPU_CUSTOM
-Allow ROM address to be configured for ARMv7-M devices by
setting the define MBED_MPU_ROM_END
-Add ROM write protection
-Add new functions and lock
-enable at boot
-disable during flash programming
Create a dedicated MPU directory for standard Arm MPU implementations
in preparation for the Arm v8m MPU. Replace MBED_MPU_ENABLED with
DEVICE_MPU to align with the porting layer of other HAL APIs.
Update the LowPowerTickerWrapper class logic to stop using its internal
Timeout object for scheduling LP ticker interrupts after the wrapper has
been suspended.
Fixes#8278
CRC used in LittleFS is Reversed ANSI, hence new polynomial added.
Reversed polynomials perform shift in reverse direction of standard
polynomial, and we do not have option to notify reverse shift to hardware.
Hence this option is available in software only.
Adding new QSPI HAL header file. This should help to use memory-maped devices
as memories, graphical displays.
The API consist of few functions, most important are read/write/write_command functions.
The command format is:
```
----------------------------------------------
| Instruction | Address | Alt | Dummy | Data |
----------------------------------------------
```
We define only synch API at the moment.
Update the low power ticker wrapper code so it does not violate any
properties of the ticker specification. In specific this patch fixes
the following:
- Prevent spurious interrupts
- Fire interrupt only when the ticker times increments to or past the
value set by ticker_set_interrupt
- Disable interrupts when ticker_init is called
When the define LPTICKER_DELAY_TICKS is set deep sleep can be randomly
disallowed when using the low power ticker. This is because a Timer
object, which locks deep sleep, is used to protect from back-to-back
writes to lp tickers which can't support that. This causes tests which
assert that deep sleep is allowed to intermittently fail.
To fix this intermittent failure this patch adds the function
sleep_manager_can_deep_sleep_test_check() which checks if deep sleep
is allowed over a duration. It updates all the tests to use
sleep_manager_can_deep_sleep_test_check() rather
than sleep_manager_can_deep_sleep() so the tests work even if deep
sleep is spuriously blocked.
Wait until dispatching is finished before scheduling the next ticker
interrupt. This prevents unnecissary calls to set_interrupt from
periodic elements being added back.
This is particularly useful for the low power ticker on devices with
LPTICKER_DELAY_TICKS set to a non-zero value. This is because the low
power ticker cannot be reschduled immediately and needs to fall back
onto the microsecond ticker which temporarily locks deep sleep.
When computing the next set_interrupt time in the common ticker layer
the absolute time in microseconds is rounded down to the closes low
power tick. Because of this the low power ticker interrupt fires one
cycle too early. This causes ticker_irq_handler to run even though
there are no events ready to run.
To prevent this unnecessary interrupt this patch changes the
computation for the next set_interrupt time to round up rather than
down.
SerialWireOutput was outputting 1 character per 32-bit write to the
ITM stimulus port. This is inefficient, and causes processing problems
with some viewers due to them receiving 3 NUL bytes between each
desired character.
Rework to allow us to be more efficient, and eliminate those NUL bytes:
* Retain existing mbed_itm_send() and clarify it's a single 32-bit write.
* Add new mbed_itm_send_block() that is appropriate for sending
character data, and modify SerialWireOutput to use it.
* Move "wait for FIFO ready" check to before the write, rather than
after.
One minor correction - FIFOREADY is a single bit of the register read.
Don't interpret reserved bits.
Keep the prototypes in rtc_api.h even when DEVICE_RTC is not defined.
This allows devices that aren't fully compliant with the RTC API to
still use the header and prototypes.
Current version:
The function ticker_init resets the internal count and disables the ticker interrupt.
Proposed version:
The function ticker_init allows the ticker to keep counting and disables the ticker interrupt.
This is a result of the following discussion:
https://github.com/ARMmbed/mbed-os/pull/5233#pullrequestreview-86677815
Sleep - within 10us
Deepsleep - within 10ms
Note about mbed boards with interface, moved to lpc176x, as they are target related,
should be documented in the target documentation.
The tests will come as separate PR, to conform to this updates to sleep API.
- Move CRC polynomial enum into HAL layer, so it's accessible from platform
implementations
- Add enum to CRC class to indicate which mode the CRC class should use:
HARDWARE, TABLE, or BITWISE
- Add calls to HAL Hardware CRC API to each of the compute functions when the
class is in HARDWARE mode.
- Add missing constructor call to template constructor, and remove const from
delegating constructor.
Define the HAL API header for the Hardware CRC module. This set of functions
allows hardware acceleration of a subset of CRC algorithms for supported
platforms by providing access to the hardware CRC module of certain platforms.
The API is defined as four separate functions:
- hal_crc_is_supported(polynomial)
Indicates to the caller if the specific CRC polynomial is supported.
- hal_crc_compute_partial_start(const uint32_t polynomial)
Initializes the hardware CRC module with the given polynomial.
- hal_crc_compute_partial(*data, size)
Writes an array of bytes to the CRC module to be appended to the calculation
- hal_crc_get_result()
Applies the final transformations to the data and returns the result to the
caller.
Initial work by Bartek Szatkowski in https://github.com/ARMmbed/mbed-os/pull/4079,
reworked following review of https://github.com/ARMmbed/mbed-os/pull/5202 to
transform the entire system into C++, retaining the basic functionality.
Bartek's summary:
* Porting ethernet to EMAC
* Updating EMAC to enable multiple interfaces
* Untangling networking classes, making the abstractions a bit clearer to follow, etc
* General refactoring
* Removal of DEVICE_EMAC flag and introducing DEVICE_ETH and DEVICE_WIFI
Revisions since initial branch:
* Remove lwip depencies
* Correct doxygen warnings
* Remove emac_api.h, replace with C++ EMAC abstract class.
* Create OnboardNetworkInterface, and LWIP implementation.
* Mappings since #4079
lwip-interface/nsapi_stack_lwip.c -> LWIPStack.cpp
lwip-interface/ipstack_lwip.c -> LWIPInterface.cpp
netsocket/mbed_ipstack.h -> OnboardNetworkStack.h
hal/emac_api.h -> EMAC.h
* Reinstate use of EthInterface abstraction
* Correct and clarify HW address EMAC ops
* Restore MBED_MAC_ADDR implementation
* Integrate PPP support with LWIP::Interface.
* Convert K64F lwIP driver to K64F_EMAC.
To do:
* Convert emac_stack_mem.h to follow this pattern.
* Figure out DEVICE_ETH/EMAC
* Update all drivers to use EMAC
Some low power tickers take multiple cycles of the low power clock
to set a compare value. Because of this if the compare value is set
twice back-to-back these implementations will block until that time
has passed. This can cause system stability issues since interrupts
are disabling for this time.
To gracefully support this kind of hardware this patch adds code
to prevent back-to-back writes to the hardware. It does this by
recording the low power clock cycle of the initial write. If any
writes come in too soon after this initial write the microsecond
ticker is used to schedule the new write in the future when the
hardware is ready to accept a new value.
To enable this feature on a target the macro LOWPOWERTIMER_DELAY_TICKS
must be set to the number of low power clock cycles that must elapse
between writes to the low power timer.
Donatien Garnier
Steven Cartmell
Bartek Szatkowski
Filip Jagodzinski
Kevin Bracey
Cruz Monrreal
Michael Schwarcz
Russ Butler
deepikabhavnani
Thomas Kemmer
Alastair D'Silva
Martin Kojtal
Oren Cohen
Amanda Butler
David Saada
ccli8
Maciej Bocianski
Martin Kojtal
Senthil Ramakrishnan
Przemyslaw Stekiel
Marc Emmers
jeromecoutant