The QSPI spec allows alt to be any size that is a multiple of the
number of data lines. For example, Micron's N25Q128A uses only a
single alt cycle for all read modes (1, 2, or 4 bits depending on
how many data lines are in use).
The contents of the usb directory were moved to appropriate locations and the usb directory removed.
* Public USB headers moved under drivers/
* Internal USB headers moved under drivers/internal/
* USB Source code moved under drivers/source/usb/
* Moved usb/device/hal/ under hal/usb/
* Moved usb/device/USBPhy/ under hal/usb/
* Merged usb/device/targets/ into targets/
* Separated public and private USB API documentation under Doxygen groups drivers-public-api and drivers-internal-api.
Separate drivers, events, and rtos internal APIs from public APIs.
* Move source files to source subdirs
* Move internal headers to internal subdirs
* Add Doxygen comments for documenting internal and public APIs
* Remove source code from header files in order to remove include pre-processor directives
that included header files not directly used by said header files
* Explicitly include header files instead of implicit inclusions via third-party header files.
Release Notes
This will break user code that was using an internal API as the internal header files have been moved.
This will only break if the user was including the header file using a namespace (i.e #include "foo/bar.h" instead of #include "bar.h"
This change is required by the Samsung S111(S5JS100). On this board timer clock used for us ticker operates at 26MHz.
According to current requirements, 8 MHz is the top limit for us ticker timer.
This change relaxes top limit to 100 MHz, but only for 32-bit timers.
Ticker common layer schedules one interrupt per timer rollover to trace elapsed time. We need to ensure that this operation is not performed too frequently. I.e. in case of 16-bit timer at 32 MHz, the timer rollover will happen after ~2 ms. This may cause that there will be no time for other tasks. That is why we increase the top limit, but only for 32-bit timers.
Functions related to serial flow control should not be exposed
if DEVICE_SERIAL_FC is not defined
* serial_set_flow_control,
* serial_cts_pinmap,
* serial_rts_pinmap.
As the timer code became more generic, coping with initialization on
demand, and variable width and speed us_ticker_api implementations,
wait_us has gradually gotten slower and slower.
Some platforms have reportedly seen overhead of wait_us() increase from
10µs to 30µs. These changes should fully reverse that drop, and even
make it better than ever.
Add fast paths for platforms that provide compile-time information about
us_ticker. Speed and code size is improved further if:
* Timer has >= 2^32 microsecond range, or better still is 32-bit 1MHz.
* Platform implements us_ticker_read() as a macro
* Timer is initialised at boot, rather than first use
The latter initialisation option is the default for STM, as this has
always been the case.
On some platforms, if low power ticker interrupt is set to very close value (e.g. timestamp < current tick + 3), then interrupt may not fire. This is one use case of lp ticker wrapper, but not all platforms use the wrapper. Some platforms cheat a bit and in this case, simply schedules interrupt a bit later. The problem has been found while working on the low-level lp ticker wrapper for ST boards which run lp ticker using LPTIM. These platforms have such limitation.
Failing test: tests-mbed_drivers-lp_timeout (Test Case: Zero delay)
In the test scenarion, the lp ticker callback is attached with 0.0 s delay in the loop. The new events are put in the front of the lp ticker event list and interrupt reschedule is performed. Usually, the new event is already expired, interrupt fires immediately and next event from the list is then scheduled (e.g. system tick). When the next event (e.g. system tick) is very close to the current time it might be scheduled a bit later (because of lp ticker limitation). Let's assume that system tick has been delayed by 3 ticks and while inserting new zero delay event, absolute system tick time on the event list has already expired. In this case, zero delay event may be added after the expired system tick event and no reschedule is performed (because the head of the list has not changed). Interrupt also didn't fire yet since it has been delayed, so after return from attach_callback(0) we are still waiting for the delayed interrupt and zero delay callback has not been called instantly.
This may also affect other platforms which use such delays (Cypress, NORDIC, etc.).
The proposition is to add extra condition while adding an event to the event list. If the inserted event is already expired, then perform reschedule immediately.
- Fix typo in module comment
- Redefine the default system behaviour in sleep mode
- Guard K64F enableWait flag
- Remove bit shifts from reset reason enum
- Add preprocessor guard to watchdog api that errors if the reset reason api is not also implemented
- Add RESET_REASON and WATCHDOG to K64F targets.json
- Add watchdog reference implementation
HAL watchdog functionality will be implemented as two separate APIs. The reset
reason API allows a user to detect the last system reset reason to identify if
a Watchdog was triggered. The Watchdog API allows configuring and updating
Watchdog timers on all boards. This commit defines the headers.
It would probably be worth adding tests for the ability to initialise NC
pins and check `is_connected`. Some platforms are assert failing the
init, and can't be 100% sure `is_connected` is working on those
platforms either.
The knowledge that lp_ticker runs in deep sleep was hard-coded with a
comparison check of a ticker_data_t pointer against get_lp_ticker_data.
Remove this hard-coded check, which adds a linker dependency against
the low power ticker even if not being used - put a flag into the
ticker_interface_t.
A future extension might be to move this flag into the ticker_info_t
provided by the HAL, but for the moment keep the assumption that
lp_ticker does run, us_ticker doesn't.
This commit takes some of the work done on the SPI class from #8445, and
refines it, to provide the per-peripheral mutex functionality.
This also implements GPIO-based SSEL, which exposes a new
select()/deselect() API for users to group transfers, and should work on
every platform (unlike the HAL-based SSEL). This requires users to use a
new constructor to avoid backwards compatibility issues.
To activate the per-peripheral mutex, the HAL must define SPI_COUNT and
provide spi_get_peripheral_name(). (In #8445 this is a reworked
spi_get_module, but the name is changed here to avoid a collision with
existing HALs - this commit is designed to work without wider HAL
changes).
Fixes: #9149
Add support for listing all the pins of one or more form factors.
This is in preparation for automated testing of the default form
factor.
This patch includes the following:
-A function to get a list of restricted pins which should not be
used for testing due to some caveat.
-The target config "default-form-factor" which can specify which form
factor should be tested
-Form factor information for the arduino form factor
Add 2 new pinmap utility functions:
-pinmap_find_peripheral_pins
-pinmap_list_has_pin
Also add the new type PinList which contains a list of pins allowing
for NC and duplicate entries.
Add the functions qspi_master_sclk_pinmap, qspi_master_ssel_pinmap and
qspi_master_data0_pinmap-qspi_master_data3_pinmap to all targets with
qspi support.
Internally in sleep tracing `debug` was used for trace prints, but
all sleep API's are ISR safe and used in interrupts. This resulted in
hardfaults / errors.
Solution is to use `mbed_error_printf` instead for printing on UART
Critical section count/state variables are synchronised by IRQ disabling and
critical section calls themselves, so do not need to be volatile.
This eliminates a couple of unnecessary reads of the counter variable.
The DEVICE_FOO macros are always defined (either 0 or 1).
This patch replaces any instances of a define check on a DEVICE_FOO
macro with value test instead.
Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
targets.json was not specifying the same macro name as the code was
checking for, so setting was ineffective.
Making this work tripped up not-supported checks in ARMv8-M - rather than deal
with making this work, support it instead.
Both ARMv7-M and ARMv8-M slightly reduce code size and runtime impact if
mpu-rom-end is 0x1fffffff, using one fewer region.
This means default setup for ARMv8-M now requires 5 regions, with
mpu-rom-end set to default 0x0fffffff, but this can be put back to 4 by
changing the setting.
As we build for a specific CPU, a runtime check for number of MPU
regions in release builds is not worthwhile. Make it an assert only.
Saves a little space in develop images, a lot in release.
Switch to higher-level calls and macros, and fix an error in the ARMv8-M
version - "inner" attributes were not being set correctly due to a
copy/paste error - "outer" was being set twice.
This means RAM would have been marked WTRA rather than WBWA for the
inner cache.
Slightly reduces ARMv7-M init code size by feeding region number
into RBAR instead of using RNR.
Update the LowPowerTickerWrapper class to handle rather than ignore
early low power ticker interrupts. This ensures that devices don't get
stuck in sleep due to a ignored early low power ticker interrupt.
Przemyslaw Stekiel
Filip Jagodzinski
Kyle Kearney
Martin Kojtal
jeromecoutant
Matthew Macovsky
int_szyk
Hugues Kamba
Mariwan
George Psimenos
Seppo Takalo
Russ Butler
Amanda Butler
Bartek Szatkowski
Kevin Bracey
Donatien Garnier
Steven Cartmell
Cruz Monrreal
Michael Schwarcz
deepikabhavnani
Thomas Kemmer
Alastair D'Silva
Oren Cohen