Cruz Monrreal
4903f324a1
Merge pull request #8013 from deepikabhavnani/stm_fix_align
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STM32: Fix alignment of execute region to 8byte boundary
2018-10-10 08:40:55 -05:00
Deepika
bf1a2c8485
[ST]: Fix alignment of execute region to 8-byte boundary in ARM linker files
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--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files should strictly align to 8-byte boundary
2018-10-09 14:47:14 -05:00
Martin Kojtal
17762b4998
Merge pull request #8263 from juhoeskeli/flash_api_stm32l4
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STM32L4: clear error programming flags before erase & program operations
2018-10-09 10:33:50 -05:00
Cruz Monrreal
5a1c49fa6d
Merge pull request #8168 from jeromecoutant/PR_ADC_DISCOL496
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DISCO_L496AG : enable ADC
2018-10-08 10:10:44 -05:00
Martin Kojtal
365d61e4a9
Merge pull request #7304 from cedrickkukela-cd/MTS_DRAGONFLY_L471QG_pull_request_feature_changes
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Add MTS dragonfly, MTS dragonfly l471
2018-10-08 11:06:23 +02:00
Martin Kojtal
72fa1e0e8f
Merge pull request #8119 from jeromecoutant/PR_L4_ADC
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STM32L496 : wrong ADC init
2018-10-05 19:53:25 +02:00
Martin Kojtal
f7f6d4d2d8
Merge pull request #7585 from bcostm/dev_NUCLEO_L4R5ZI
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NUCLEO_L4R5ZI: add new platform
2018-10-05 14:53:11 +02:00
Martin Kojtal
7a057d7ec8
Merge pull request #8085 from jeromecoutant/PR_RTC_LSI
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STM32 RTC : start LSI clock (for targets without LSE)
2018-10-04 13:37:53 +02:00
Leon Lindenfelser
9f9a85830f
Configure IAR stack size to 1KB
2018-10-02 13:34:16 -05:00
Juho Eskeli
f7a030ef7c
Remove redundant error flag clearing operation
2018-10-02 09:18:03 +03:00
bcostm
909ce3590a
NUCLEO_L4R5ZI: set IAR linker stack size to 1KB
2018-09-27 12:03:08 +02:00
bcostm
5b4ff94bff
NUCLEO_L4R5ZI: change _ALTx pins
2018-09-27 12:03:07 +02:00
bcostm
ee5aff7e18
NUCLEO_L4R5ZI: remove PWM_5 pins as already used by us_ticker
2018-09-27 12:03:07 +02:00
bcostm
a644ddd2e7
NUCLEO_L4R5ZI: enable bootloader
2018-09-27 12:03:07 +02:00
bcostm
3a722358b1
NUCLEO_L4R5ZI: add missing timer freeze macro
2018-09-27 12:03:07 +02:00
bcostm
ef33ff5524
NUCLEO_L4R5ZI: add all board files
2018-09-27 12:03:07 +02:00
Leon Lindenfelser
a80b2369c3
Decrease heap size in IAR linker so tests compile and use SRAM2 for IAR and GCC
2018-09-26 15:39:42 -05:00
Leon Lindenfelser
5ff0eb9d92
Rebase and changes for Dragonfly nano support
2018-09-26 15:39:42 -05:00
Leon Lindenfelser
31d04b05b7
Rebased on master mbed-os 9/7/18
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This required replacing hal_tick.h with us_ticker_data.h
2018-09-26 15:37:33 -05:00
Leon Lindenfelser
3bb8543e5b
Remove commented out code
2018-09-26 15:37:33 -05:00
Leon Lindenfelser
55bcf93574
Fixed spacing/tabs and clean up targets.json
2018-09-26 15:37:33 -05:00
Leon Lindenfelser
fad95e9a7d
Fix rev D radio init/power/reset and add back bootloader capability
2018-09-26 15:37:33 -05:00
cedrick kukela
463182d372
REV D change for modem on
2018-09-26 15:37:33 -05:00
cedrick kukela
1064994095
Rev c pin name fix
2018-09-26 15:37:33 -05:00
cedrick kukela
7f29f837d1
remove blanks
2018-09-26 15:37:33 -05:00
cedrick kukela
56fa71cbd3
delete file
2018-09-26 15:37:33 -05:00
cedrick kukela
50254bcc61
change startup and s file names to match target
2018-09-26 15:37:33 -05:00
cedrick kukela
5e1bb381cd
fixing onboard modem init bug on mts dragonfly l471
2018-09-26 15:37:32 -05:00
cedrick kukela
e2e5d9ed43
Ublox and PinName fixes
2018-09-26 15:37:32 -05:00
cedrick kukela
c18eef804e
adding TARGET MTS_DRAGONFLY_L471QG
2018-09-26 15:37:32 -05:00
Juho Eskeli
3a6b52fd15
Clear error programming flags before erase & program operations
2018-09-26 22:58:49 +03:00
jeromecoutant
f510efff38
DISCO_L496AG : enable ADC
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See User Manual, VREF+ is not connected by default
NB: Use 2.5V as reference (instead of 3.3V)
for internal channels calculation
2018-09-18 16:11:13 +02:00
Martin Kojtal
b97ac0c353
Merge pull request #7787 from jeromecoutant/PR_MSI_LSE
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STM32L4 : code cleanup in MSI SetSysClock
2018-09-17 14:22:29 +02:00
jeromecoutant
2a70879ffa
STM32L496 : wrong ADC init
2018-09-13 16:31:49 +02:00
jeromecoutant
827c8bd486
STM32 RTC : remove not necessary macro
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__HAL_RCC_RTC_CLKPRESCALER is called in __HAL_RCC_RTC_CONFIG
2018-09-11 14:14:19 +02:00
Cruz Monrreal
d311a96061
Merge pull request #7950 from c1728p9/l4_malloc_fix
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Fix memory allocation on STM32L4 devices
2018-09-07 22:50:05 -05:00
Russ Butler
e084865e8e
Fix comparison warning on STM32L4 devices
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Cast the pointer used in l4_retarget to uint32_t before comparing it
to fix the warning:
"comparison between pointer and integer"
2018-09-06 16:07:03 +01:00
Maciej Bocianski
050604f1b8
DISCO_L475VG_IOT01A remove old QSPI pins
2018-09-05 09:58:20 +02:00
Russ Butler
e2d003a420
Fix memory allocation on STM32L4 devices
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Depending on initial size allocated on STM32L4 devices with
TWO_RAM_REGIONS set a crash may occur. This is because there is a
mismatch between the size newlib is expecting and the size actually
returned by _sbrk. This is because the STM32L4 implementation of _sbrk
is performing alignment internally.
This patch fixes this problem by removing the code in __wrap__sbrk
which performs the alignment.
2018-08-31 18:31:52 -05:00
Maciej Bocianski
5195c820e6
standardise QSPI pin names
2018-08-24 12:09:51 +02:00
adustm
7dda4e4fc6
Implement qspi_free function
2018-08-22 15:02:10 +02:00
jeromecoutant
43258a8ff4
STM32 : add all QSPI pins in available targets
2018-08-22 15:02:08 +02:00
Maciej Bocianski
67798d6eb2
STM: add qspi pin names for DISCO_L475VG_IOT01A
2018-08-22 15:02:04 +02:00
adustm
2f06423a89
Add support for QSPI on DISCO_L476VG
2018-08-22 15:02:01 +02:00
Martin Kojtal
d282c81e86
QSPI: add STM32L4 support
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Disco IoT board support for QSPI. As it does not have dual flash support in QSPI,
we need to fix qspi hal implementation.
2018-08-22 15:00:17 +02:00
jeromecoutant
b5c258e398
STM32L4 : code cleanup in MSI SetSysClock
2018-08-14 09:20:52 +02:00
jeromecoutant
063cad5992
STM32L4 assert in SetSysClock replaced
2018-08-13 16:01:49 +02:00
Laurent Meunier
402f3f1c3f
STM32: check for UART ongoing transfers before entering deepsleep
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As suggested by Russ Butler in mbed-os issue #7328 , and until there is an
implementation of mbed-os issue #4408 , we are implementing a workaround
at HAL level to check if there is any ongoing serial transfer (which happens
if HW FIFO is not yet empty).
In case a transfer is ongoing, we're not entering deep sleep and
return immediately.
2018-08-07 11:30:53 +02:00
bcostm
bf8587ed50
STM32L496: fix RAM size in ARM scatter file
2018-07-19 14:02:05 +02:00
bcostm
7097e07b62
stm32 ticker: typo corrections
2018-07-11 14:43:36 +02:00