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33 Commits (b88254809eb626689c8aeb41304a308bf4e34a04)

Author SHA1 Message Date
Bartek Szatkowski 8afbd66763 [CMSIS_5]: Updated to 49ac527a 2018-05-14 12:18:20 +01:00
ccli8 02730f0d35 Move defines into "cmsis/RTE_Components.h" to make CMSIS files less changed 2018-04-26 11:31:03 +08:00
ccli8 47c3197f13 Support RTOS-less secure image build with Cortex-M23/M33 2018-04-26 09:33:09 +08:00
Deepika d0a43b8af0 CMSIS/RTX: Patch to conditionally compile 
tz_context.c should be compiled only for secure world,
definition of API's in tz_context.h should be part of secure
binary/bootloader when building mbed-os as non-secure
 2018-04-11 11:41:26 -05:00
Deepika 4043d95396 Trustzone stack requirement for Mbed-OS is 512 bytes 
Added config parameter for TZ stack size and update code to add correct header
file.
 2018-03-28 11:20:11 -05:00
Deepika ae2e2b942b Add TZ_context function 
TZ_context functions are part of secure state binary and are used to handle
secure stack for thread execution.Template implementation from CMSIS is used,
can be enhanced in future.
 2018-03-27 10:51:19 -05:00
Jonatan Antoni 063717d90d Core(A): Changed macro __DEPRECATED to CMSIS_DEPRECATED. (Issue #287) 
__DEPRECATED conflicts with a predefined macro in GCC C++ mode.
 2017-12-21 14:09:25 +09:00
Jonatan Antoni 2f06202a9b Core(A): Refactored L1 Cache maintenance to be compiler agnostic. 
- Added L1 Cache test cases to CoreValidation.
- Adopted FVP Cortex-A configs to simulate cache states.
 2017-12-21 14:09:25 +09:00
TomoYamanaka 11ec7a2209 CMSIS-Core(A): Add MMU section_normal_nc macro 
I added the macro definition for non-cache area.
 2017-12-21 14:09:25 +09:00
Daniel Brondani 0c1961a724 CMSIS-Core(A): Fixed enumerated type increment in GIC_DistInit and GIC_CPUInterfaceInit functions 2017-12-21 14:09:25 +09:00
Robert Rostohar 56602562ad Core(A): Updated __FPU_Enable function (VFP register count detection) 2017-12-21 14:09:25 +09:00
Bartek Szatkowski 6e11dc2c4a Modification to arm_math.h 
Remove redefinition of __CLZ and __SSAT.
 2017-11-10 09:53:42 +00:00
Bartek Szatkowski 106f34e2ed Add arm_math.h 2017-11-10 09:53:42 +00:00
Bartek Szatkowski 20357bc1fa CMSIS/RTX: Reintroduce core_cmSecureAccess.h lost during CMSIS update 2017-11-01 09:25:42 +00:00
Martin Kojtal 02d01f42a6 CSMIS/RTX: cmain IAR: add mbed main 
This fixes #4602 issue, mbed_main should be invoked right before the real main
 2017-11-01 09:25:42 +00:00
Bartek Szatkowski 5d6abd6572 CMSIS/RTX: Patch RTX includes to match mbed OS scheme 2017-11-01 09:25:42 +00:00
Bartek Szatkowski a03591d6e3 CMSIS/RTX: Update CMSIS and RTX to 22b68c 
This includes Cortex A support and directory reshuffle.
 2017-11-01 09:25:42 +00:00
Deepika 9422c351e4 Initial RTX and tools support for Cortex M-23/M-33 devices 2017-09-11 11:43:26 -05:00
Martin Kojtal 0eb4cf0da9 Add cortex-a cache file 
Fixes #4759

This was removed during cmsis5 update. Here is original file:
https://github.com/ARMmbed/mbed-os/blob/mbed-os-5.4/cmsis/TOOLCHAIN_IAR/TARGET_CORTEX_A/cache.S and
https://github.com/ARMmbed/mbed-os/blob/mbed-os-5.4/cmsis/TOOLCHAIN_GCC/TARGET_CORTEX_A/cache.S
 2017-08-09 06:49:58 +01:00
Martin Kojtal 857ec23db8 cmain IAR: add mbed main 
This fixes #4602 issue, mbed_main should be invoked right before the real main
 2017-06-21 15:29:55 +01:00
Martin Kojtal dad71c4268 cmsis: add core_ca9 for backward compatibility 
cmsis 5 does not include it but as mbed 2 requires this, we will bring this file
back. This brings back few other dependencies, that we add only for cortex-a.

Once cortex-a gets cmsis5 and rtx2 support it will be updated.
 2017-06-15 13:08:48 +01:00
Bartek Szatkowski 7b022f8785 Modify CMSIS 5 so it is suitable for mbed-os 
Make changes to the files taken from RTX5/CMSIS5 so they work
with mbed-os and uvisor.
 2017-05-30 18:53:38 +01:00
Bartek Szatkowski a9a29a4529 Pull in CMSIS 5 files 
Pull in unmodified CMSIS5 files from the repository
https://github.com/ARM-software/CMSIS_5.git from the commit
c1b4232f4a98275dd79ebc99cf9b5da5053def4d.

The files were copied as shown below with source->dest_dir.
CMSIS_5/CMSIS/Core/Include/core_*.h -> mbed-os/cmsis/
CMSIS_5/CMSIS/Core_A/Include/core_*.h -> mbed-os/cmsis/
CMSIS_5/CMSIS/DSP/Include/arm_math.h -> mbed-os/cmsis/
CMSIS_5/CMSIS/Core/Include/tz_context.h -> mbed-os/cmsis/
CMSIS_5/CMSIS/Core/Include/cmsis_compiler.h -> mbed-os/cmsis/TARGET_CORTEX_M/
CMSIS_5/CMSIS/Core/Include/cmsis_arm*.h -> mbed-os/cmsis/TARGET_CORTEX_M/TOOLCHAIN_ARM/
CMSIS_5/CMSIS/Core/Include/cmsis_gcc*.h -> mbed-os/cmsis/TARGET_CORTEX_M/TOOLCHAIN_GCC/
CMSIS_5/CMSIS/Core_A/Include/cmsis_compiler.h -> mbed-os/cmsis/TARGET_CORTEX_A/
CMSIS_5/CMSIS/Core_A/Include/cmsis_arm*.h -> mbed-os/cmsis/TARGET_CORTEX_A/TOOLCHAIN_ARM/
CMSIS_5/CMSIS/RTOS2/RTX/Library/cmsis_os1.c -> mbed-os/rtos/rtx/
CMSIS_5/CMSIS/RTOS2/Include/cmsis_os2.h -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/
CMSIS_5/CMSIS/RTOS2/RTX/Config/* -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/
CMSIS_5/CMSIS/RTOS2/RTX/Include1/* -> mbed-os/rtos/rtx/
CMSIS_5/CMSIS/RTOS2/RTX/Include/* -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/
CMSIS_5/CMSIS/RTOS2/RTX/Source/rtx_* -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/
CMSIS_5/CMSIS/RTOS2/RTX/Source/core_cm.h -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/
CMSIS_5/CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_ARM/
CMSIS_5/CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_GCC/
CMSIS_5/CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M0/TOOLCHAIN_IAR/
CMSIS_5/CMSIS/RTOS2/RTX/Source/ARM/irq_cm0.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_ARM/
CMSIS_5/CMSIS/RTOS2/RTX/Source/GCC/irq_cm0.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_GCC/
CMSIS_5/CMSIS/RTOS2/RTX/Source/IAR/irq_cm0.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M0P/TOOLCHAIN_IAR/
CMSIS_5/CMSIS/RTOS2/RTX/Source/ARM/irq_cm3.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_ARM/
CMSIS_5/CMSIS/RTOS2/RTX/Source/GCC/irq_cm3.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_GCC/
CMSIS_5/CMSIS/RTOS2/RTX/Source/IAR/irq_cm3.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_M3/TOOLCHAIN_IAR/
CMSIS_5/CMSIS/RTOS2/RTX/Source/ARM/irq_cm4f.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_RTOS_M4_M7/TOOLCHAIN_ARM/
CMSIS_5/CMSIS/RTOS2/RTX/Source/GCC/irq_cm4f.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_RTOS_M4_M7/TOOLCHAIN_GCC/
CMSIS_5/CMSIS/RTOS2/RTX/Source/IAR/irq_cm4f.s -> mbed-os/rtos/rtx2/TARGET_CORTEX_M/TARGET_RTOS_M4_M7/TOOLCHAIN_IAR/
 2017-05-30 18:53:37 +01:00
Russ Butler fd233778db Remove RTOS and CMSIS files 
Remove the RTOS and CMSIS files in preperation for CMSIS 5. Note that
the RTOS heap ad stack test is left since this is still applicable to
RTX5. This file can be found here:
rtos\rtx\TARGET_CORTEX_M\TESTS\memory\heap_and_stack\main.cpp
 2017-05-30 18:53:37 +01:00
AndersLundgren 0167cbde31 Update cmain.S 2017-05-24 13:23:26 +02:00
Martin Kojtal e0dded3b3b Revert partially "Remove Cortex A support from CMSIS/RTOS" 
This reverts commit 5f29445103 - but only partially.

cmain.S for IAR is still required to keep mbed SDK boot process as it was. This
startup file for IAR is active for non-rtos projects.

Fixes #4330
 2017-05-17 14:14:39 +01:00
Bartek Szatkowski 5f29445103 Remove Cortex A support from CMSIS/RTOS 
This change is temporary, Cortex A support will be reenabled when it's
fully supported in CMSIS/RTX 5.
 2017-05-15 11:53:59 +01:00
Alessandro Angelino ad436c4c92 uVisor: Update to version 0.27.0 
* Updated docs
* Re-factored vMPU drivers
* Non-backwards-compatible API change: uvisor_ctx is now called
  __uvisor_ctx and requires the user to explicitly cast it to their own
  private context structure.
  This only affects applications with uVisor enabled.
* Use "public box" instead of main box for box 0.
 2017-02-21 13:24:23 +00:00
Brian Daniels bca993a602 Fixing uvisor defines to fix build issues 2017-02-08 09:49:47 -06:00
Russ Butler cf5cd7dfd4 Ensure isr cannot occur after NVIC_DisableIRQ 
Add data and instruction synchronization barriers to prevent
interrupts from occurring after NVIC_DisableIRQ is called. This
is a backport of changes made in CMSIS_5.
 2016-11-17 12:26:45 -06:00
tomoyuki yamanaka 4b3ce8e568 Add API which cleans Dcache in IAR compiler. 
In "core_caFunc.c" Renesas added the following API of IAR compiler version.
- __v7_clean_dcache_all()
- __v7_clean_inv_dcache_all()
 2016-11-14 20:47:50 +09:00
Steven Cooreman 7c0dd13bc6 [Silicon Labs][CMSIS] Patch CMSIS v4.2+ macros into mbed 
The current version of cmsis shipping with mbed does not provide the __IOM and friends macros that became standard with CMSIS 4.2+. Patching these into CMSIS to allow vendors to continue updating their support libraries, awaiting a full CMSIS update in mbed (which is past due now).
 2016-10-24 18:28:44 +02:00
Christopher Haster 26ced98734 restructure - Restructured cmsis directory 
targets/cmsis -> cmsis
targets/cmsis/TARGET_* -> targets/TARGET_*/device
targets/cmsis/TARGET_*/mbed_rtx.h -> targets/TARGET_*/mbed_rtx.h
 2016-10-04 17:51:44 -05:00