mirror of https://github.com/ARMmbed/mbed-os.git
Ensure isr cannot occur after NVIC_DisableIRQ
Add data and instruction synchronization barriers to prevent interrupts from occurring after NVIC_DisableIRQ is called. This is a backport of changes made in CMSIS_5.pull/3282/head
parent
aeabcc9472
commit
cf5cd7dfd4
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@ -589,6 +589,8 @@ __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
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__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
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{
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NVIC->ICER[0] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
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__DSB();
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__ISB();
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}
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@ -703,6 +703,8 @@ __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
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__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
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{
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NVIC->ICER[0] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
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__DSB();
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__ISB();
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}
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@ -1431,6 +1431,8 @@ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
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__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
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{
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NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
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__DSB();
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__ISB();
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}
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@ -1597,6 +1597,8 @@ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
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__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
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{
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NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
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__DSB();
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__ISB();
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}
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@ -1754,6 +1754,8 @@ __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
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__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
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{
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NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
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__DSB();
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__ISB();
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}
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@ -705,6 +705,8 @@ __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
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__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
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{
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NVIC->ICER[0] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
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__DSB();
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__ISB();
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}
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@ -1376,6 +1376,8 @@ __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
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__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
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{
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NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
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__DSB();
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__ISB();
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}
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