Reference template file is used from IAR8.32 installation available at path
"Embedded Workbench 8.2\arm\config\template\ConvertToIAR\template_project.ewp"
Also added trustzone configs in iar_definitions.json
Add tests to
1. Verify that a ConfigException is generated if application is placed
within the bootloader region
2. Verify that a ConfigException is generated if bootloader segments
don't fit witin rom.
Support the requirement where bootloader can be in chunks and enable
placing the application at a particular offset specified by config.
With FEATURE_BOOTLOADER support, the bootloader can be placed at a
high address. Add support to the tools so that application can be
placed in the available space before the beginning of the bootloader.
- Move all PSA storage code under psa/storage directory
- Create a global PSA error codes header, eliminating ITS specific ones
- Create a common header file for PSA storage type definitions,
eliminating ITS specific ones
- Create a common implementation for PS & ITS
- Implement protected storage feature
- Change ITS test to be common to PS as well
When the original PSOC6 CM4 hex file contains unalinged text sections
that span through multiple intelhex segments, aligned segments (filled
with zeroes) overlap with the original data segments, resulting in
error thrown by ihex.merge(alignments, overlap='error').
Such hex file can be produced when the ELF is built with ARM MDK Compiler
with --split_sections option:
http://www.keil.com/support/man/docs/armcc/armcc_chr1359124944914.htm
Change the merge strategy to overlap='ignore', so that the overlapping
zero-filled segments are skipped.
The approach for the hex_files subset selection is identical
to makefile exporter: https://github.com/ARMmbed/mbed-os/pull/9466
Single hex file should be passed to srec_cat when hex_filename
is set in targets.json or mbed_app.json.
The templ file names are both all upper case and lower case letters.
The Target Names map is usually all upper case. The match could fail
if the templ file, as we have case-sensitive comparison. Handle such
cases by perorming a case-insensitve check.
mbed export of a project to MCUXpresso could potentially always fail
irrespective of what is passed in -m option since the target names
map entry and the filename may not match. This commit fixes this issue.
Example of the issue that this commit fixes:
$ mbed export -i mcuxpresso -m lpc11u68 -v
<snip>
project.py: error: LPC11U68 not supported by mcuxpresso
<snip>
The command-line argument '--profile' looks for build
profiles provided in mbed-os/tools/profiles/. If a
directory name exists in the root folder with the
same name as one of the profile names provided by
default [e.g debug/develop/release], that directory
is processed instead resulting in incorrect behavior.
Fix this behavior by processing the default profiles first.
Currently, if you were to add a directory that only contained .inc
files, this file would not be passed as an include path to the compiler.
This ensures that .inc files are also considered header files.
Allow to use default intelliSenseEngine in visual studio code.
Add of compilerPath and forcedInclude of mbed_config header in the
created c_cpp_properties.json file.
When building secure targets, we would like compile only files that are in the the mbe-os root folder.
This Fixes an issue when sending multiple --source parameters that are all inside the mbed-os tree
$(file > $@.in, $(filter %.o, $^)) is not supported in GNU Make 3.81.
Create the linker response file with pipe redirect from echo command.
This is tested with Cygwin make and make 3.8.1 shipped with macOS.
Also, change the linker responce file name to .link_options.txt.
This is an internal file, not a build artifact.
As per the IAR Development guide, below options for CPU are valid
1. Cortex-M33
2. Cortex-M33.no_dsp (core without integer DSP extension)
3. Cortex-M33.fp (floating-point unit with support for single precision)
4. Cortex-M33.no_se (core without support for TrustZone)
5. Cortex-M4
6. Cortex-M4F
7. Cortex-M7
8. Cortex-M7.fp.dp (floating-point unit with support for double precision)
9. Cortex-M7.fp.sp (floating-point unit with support for single precision)
DAPLink implementation on Cypress kits cannot handle hex files
with 64 bytes per row: refer to https://github.com/ARMmbed/DAPLink,
source/daplink/drag-n-drop/intelhex.c, hex_line_t struct, data field.
Below are the options read from the toolchains/arm
armclang --target=arm-arm-none-eabi -mcpu=list
The following arguments to option 'mcpu' can be selected:
-mcpu=cortex-m0
-mcpu=cortex-m0plus
-mcpu=cortex-m1
-mcpu=cortex-m3
-mcpu=cortex-m4
-mcpu=cortex-m7
-mcpu=cortex-m23
-mcpu=cortex-m33
...
armlink --cpu=list
The following arguments to option 'cpu' can be selected:
--cpu=Cortex-M0
--cpu=Cortex-M0plus
--cpu=Cortex-M1
--cpu=Cortex-M1.os_extension
--cpu=Cortex-M1.no_os_extension
--cpu=Cortex-M4
--cpu=Cortex-M4.no_fp
--cpu=Cortex-M7
--cpu=Cortex-M7.fp.sp
--cpu=Cortex-M7.no_fp
--cpu=Cortex-M23
--cpu=Cortex-M33
--cpu=Cortex-M33.no_fp
--cpu=Cortex-M33.no_dsp
--cpu=Cortex-M33.no_dsp.no_fp
...
armclang --target=arm-arm-none-eabi -mfpu=list
The following arguments to option 'mfpu' can be selected:
-mfpu=fpv4-sp-d16
-mfpu=fpv5-sp-d16
-mfpu=fpv5-d16
...
Rename the existing PSoC-specific m0_core_img key in targets.json
as a more generic hex_filename key. Update makefile exporter to select
the subset of resources.hex_files matching the hex_filename value.
Without this fix, multiple prebuilt CM0+ hex files are found in the
target resources and erroneously passed to the srec_cat tool.
The fix is generic so other targets that need post-build hex merging
can use this key to pass the correct image to srecord tool.
The fix also removes sub_target key: instead, rely hex_filename json
key to detect if the hex image merging needs to be done.
The sub_target is not used in mbed-os codebase for anything else.
It is possible to override the hex file name in mbed_app.json:
{
"target_overrides": {
"*": {
"target.hex_filename": "my_custom_m0_image.hex"
}
}
Replace hard-coded numeric offsets of PSoC 6 hex file sections
with sensible constants.
Do not attempt to update the checksum and metadata contents
if the sections are not found in the original HEX file.
PSoC 6 hex files contain 4-byte chip ID at virtual offset 0x90500002
added by PSoC Creator or cymcuelftool from .cymeta ELF section.
merge_images compares chip ID in CM0+ and CM4 hex files and raises
an exception in case of mismatch. Chip ID is different for each MPN
(for example, 0xE2072100 for CY8C6347BZI-BLD53 and 0xE2062100 for
CY8C6247BZI-D54). CM0+ prebuilt images target CY8C6347BZI-BLD53
but should be compatible with other PSoC6 MPNs.
Remove the check to enable merging CM0+ images with CM4 applications
built for different MPNs, with empty or absent cymetadata.
printf was called from ISR when sleep tracing was enabled. Issue was
captured only in debug profile.
Printf is not allowed from ISR context and issues like this should be
trapped in case of debug profiles as well.
Main thread in Mbed OS is statically allocated and was not available in call
stack of Keil MDK. The RTX5 kernel requires statically allocated thread
information objects that are placed into a specific section to enable RTOS
thread awareness in Keil MDK. This fix is to keep main thread in specific
section of memory.
This is for OS2 testing. Previously, targets that were configured with
the option "default_toolchain": "uARM" would still build to a
TOOLCHAIN_ARM_STD directory. This fixes these targets to build into
TOOLCHAIN_ARM_MICRO.
The DEVICE_FOO macros are always defined (either 0 or 1).
This patch replaces any instances of a define check on a DEVICE_FOO
macro with value test instead.
Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
For binary compatibility with ARMC5, use the hard ABI variant whenever
we have FP hardware - this is ARMC5's default behaviour, which we do not
override.
Cortex-M4F was already using hard; this brings M7F and M33F into line.
### Description
PR #8607 will cause problems for the NRF52832 and the NRF52840
in the online compiler starting with 5.10.2. This PR prevents this problem
by using a toggle in `targets.json` to enable these new defines for every
target except for the NRF52832 and NRF52840.
### Pull request type
[x] Fix
[ ] Refactor
[ ] Target update
[ ] Functionality change
[ ] Docs update
[ ] Test update
[ ] Breaking change
This covers the case when a macro is set with the same name as a
parameter. Previously, the macro would be repeated on the command line,
which causes certain toolchains to break (ex. IAR assembler). Now the
config system will override the parameter's value with the macro's
value.
IAR 8 linker map puts C++14-style apostrophe digit separators in its
addresses, such as:
.data inited 0x2000'1ff0 0x4 mbed_rtx_idle.o [159]
Extend the regex pattern to allow this.
* Modify linker scripts to be compatible with bootloader and PSA
* Add memory protection
* Modify original post-build step to allow link with PSA binaries
* Config kvstore for ITS on FUTURE_SEQUANA_PSA
* Enable PSA-Crypto on PSoC6 with NVSeed
### Description
This PR moves the old memap file handling required for differential
memap from within memap to the toolchain object. This has the
advantage that we can do the `mv <app>.map <app>.map.old` the moment
before it is overwritten by the linker. This should allow multiple
reruns of memap without modifying your build directory.
### Pull request type
[ ] Fix
[x] Refactor
[ ] Target update
[ ] Functionality change
[ ] Docs update
[ ] Test update
[ ] Breaking change
This PR modifies the name of the bin file generated for SMCC FOTA feature
Description
Modify name of the bin file from '-payload.bin' to '_update.bin' in REALTEK_RTL8195AM.py file to adapt the manifest tool requirment for the SMCC FOTA feature.
Pull request type
[ ] Fix
[ ] Refactor
[x] Target update
[ ] Functionality change
[ ] Docs update
[ ] Test update
[ ] Breaking change
The 'archive' method of the toolchain class 'ARM' expects that self.ar
is a string, but the constructor of the class 'ARMC6' initializes it
with a list. This patch fixes the issue.
### Description
Arm compiler 5 builds with "short" enums and "short" wchars. This means
that C/C++ enums will be packed into the smallest power of 2 number of
bytes by the compiler and the `wchar_t` is 2 bytes. Arm compiler 6
defaults to packing enums into 4 bytes and `wchar_t` is 4 bytes.
Further, Arm Compiler 5's `-O0` (no optimizations) bulids will actually
do some amount of optimizing, similar to Arm Compiler 6's `-O1`. I have
switched the debug profile to `-O1` for maximum compatibility with our
prior behavior.
NOTE: "Compatibilize" is a word
### Pull request type
[x] Fix
[ ] Refactor
[ ] Target update
[ ] Functionality change
[ ] Docs update
[ ] Test update
[ ] Breaking change
Moved "bootloader_not_supported" check to where it was and handle that exception at only one place.
Removed ram/rom size info for realtek from targets.json. THe info we have is not correct.
was Not handling config exceptions from regions and ram_regions property
adding rom-ram info for REALTEK_RTL8195AM
1. Adding SRAM in available ram
2. If the target doesn't exist in cmsis but targets.json, handle accordingly and raise apt exceptions where needed.
3. If no sram is provided, raise exception
### Description
The prior fix assume that the dependencies through `.lib` references
would have a "sane" name. My definition of "sane" here is that the
reference will have a path that starts with the path to the `.lib` file
and _removes_ the `.lib` suffix. The online compiler does not remove the
`.lib` suffix. Instead, it keeps it. This makes the string replacement
in the prior PR fail.
Also, this is faster, and simpler.
### Pull request type
[x] Fix
[ ] Refactor
[ ] Target update
[ ] Functionality change
[ ] Docs update
[ ] Test update
[ ] Breaking change
### Description
Ignored directories are collected for the sake of exporters that use
a blacklist-style approach similar to these build tools. This ignore
list will include `/filer/<gibberish>` when exported from the online
Compiler. This patch fixes that behavoir.
### Pull request type
[x] Fix
[ ] Refactor
[ ] Target update
[ ] Functionality change
[ ] Docs update
[ ] Test update
[ ] Breaking change
### Description
The prior fix made the assumption that you wanted to compute all of the
parents for a give header file going all the way up the path. This is
not true: you probably want to stop when the project stops. We already
keep track of a virtual name within the project, so instead, we compute
parents of the name, and generate the actual location of these files in
your FS as the path. This makes the solution robust offline and online
(I tested it with my local copy of os.mbed.com)
### Pull request type
[x] Fix
[ ] Refactor
[ ] Target update
[ ] Functionality change
[ ] Docs update
[ ] Test update
[ ] Breaking change
Update the padding sequence so that the gaps
are padded after all the regions are merged.
This avoids overwriting active regions and
serializes the process.
RAM/ROM memory data of target is required for statistics and linker
files, goal here is to fetch maximum 4 RAM/ROM regions from CMSIS pack
and make them available for C/C++/Linker flags as defines
### Description
The prior logic assumed that "." would not be added to the include
paths, indicating that the project root would not be added to the
include paths correctly in the online environment ("." would be
incorrect there). This change set started by removing the addition
of "*.", and then fixed building from there.
### Pull request type
[x] Fix
[ ] Refactor
[ ] Target update
[ ] Functionality change
[ ] Docs update
[ ] Test update
[ ] Breaking change
Exporter hooks removed completely.
Cleanup and improvements to the comments, including removal of the redundant doxygen comments.
Code run through astyle. Additionally:
- changes to drivers/Timer.cpp reverted
- ipcpipe_transport.* files removed as they are not used for now,
- fixed condition in stdio_init.cpp to perform serial initialization only when STDIO is enabled,
- added missing resurce manager call in PWM initialization,
- us_ticker initialization changed to use pre-reserved clock divider (to avoid resource manager call).
Changed reporting level from info to debug in PSOC6.py.
Added missing includes for function declarations in startup files.
Fixed (removed) garbadge text in psoc6_utils.c
Precompiled binaries updated for recent changes in psoc6_utils.c and moved to a separate folder; README and LICENSE files added.
1. In drivers/Timer.cpp make sure that hardware timer is initialized outside of critical section.
This is because on PSoC 6 hardware resources are shared between both cores
and we have to make sure that the other core is not already using a particular resource.
This mechanism is based on interprocessor communication taht cannot be handled iside of
critical section.
2. Added support for post-binary hook function for PSoC 6 targets, so the hex image for M0+ CPU core
can be merged with M4 core image for the final image.
3. Added possibility to use hook function from exportes, so the M0+ hex image could be included
in the generated project.
4. Included hex images in the build dependency list, so the update of image is catched by the
build process.
Martin Kojtal
Cruz Monrreal
Aashish chaddha
Deepika
Jeroen de Bruijn
Vincent Coubard
Jimmy Brisson
Michal Paszta
Michael Schwarcz
kegilbert
Russ Butler
Naveen Kaje
David Saada
Oren Cohen
Brian Daniels
Volodymyr Medvid
Ari Parkkila
Nicolas Graziano
Aleksi Klasila
Nir Sonnenschein
Anna Bridge
Andriy.Lishchynskyi
Oren Cohen
Seppo Takalo
Mahesh Mahadevan
Kevin Gilbert
Amir Cohen
jeromecoutant
Qinghao Shi
Garrett
Kevin Bracey
Jimmy Brisson
Senthil Ramakrishnan
Alastair D'Silva
Jenny Plunkett
offirko
Alexander Zilberkant
Lu
Mikhail Maltsev
Olli-Pekka Puolitaival
kert
Yoshihiro TSUBOI
Leszek Rusinowicz