Following discussion on:
it seems now clear that the transfer API is meant to be used either
with only Rx, or only Tx or Rx and Tx with the same lenth.
Therefore we're removing support of transfers of Rx and Tx with different
lenghts - this makes porting to HAL more direct and simpler.
This commit is highly derived from an existing work from salkinium.
It adds SPI ASYNC support to STM32 F4 devices. This required a small
rework of the structure to have SYNCH and ASYNCH co-exist.
The board has a jumper that be used to select between using ethernet
or using SPI for the same pin.
Without this patch, a user that configures the board in 'SPI' mode
would get a "pinmap not found for peripheral" error.
With this change a user doesn't have to change the mbed library
when switching modes
(of course user has to take care of SW and HW matching...
SPI wouldn't work as expected if board is configured in Ethernet)
This change allows program which doesn't use the IO subsystem to
completelly get rid of it in the binary generated.
IO's are still flushed by default but it can be overriden in
configuration.
Silence the following compiler warning:
Compile: SerialBase.cpp
[Warning] SerialBase.cpp@34,23: comparison between signed and unsigned integer expressions [-Wsign-compare]
Signed-off-by: Tony Wu <tung7970@gmail.com>
This change avoid inclusion of printf and friends code in a binary when it
is compiled with the macro NDEBUG enabled (this macro is usually enabled
for production builds).
Unlike assert, the error function will still crash/halt the execution of the
application even if NDEBUG is enabled; the traces are just not outputed.
Move common device_has attributes into MCU_NRF51 and
MCU_NRF51_UNIFIED. This ensures all nrf51 devices have the correct
features enabled. Any devices that want to explicitly disable features
should use device_has_remove.
- flash-journal basicAPI fix for ARM toolchain
- Updated storage-abstraction with version 0.4.7
(commit c7c4a8c52298bbc006a6f53a059fb2599cad73cc).
- https://github.com/ARMmbed/storage-volume-manager at version v0.2.10.
- https://github.com/ARMmbed/mtd-k64f v0.4.2 version of flash.c (imported as storage_driver.c).
- update to CFSTORE to use the storage-volume-manager API to initialize volume manager and
add a volume for CFSTORE to use.
- https://github.com/ARMmbed/flash-journal at version v0.5.3
(commit 4c58165e2fa02c6ed2b9d166a9c96967e81f458f) including readFrom() support.
- Taking flash-journal-strategy-sequential v0.6.7 strategy.c
(commit b11a718761aa9f33679956968a21aaef9179bde1).
- GCC_ARM, ARM and IAR compiler warning fixes for new versions of flash-journal code.
- Fix storage-volume-manager test cases for concurrent access from 2 volumes to use
addresses within the 512-1024kB address range, which is within the cfstore added volume.
- Fix cfstore/storage-volume-manager IAR warnings when building with verbose flag.
- Add support of cortex-M7 for cthunk.
- Change the cthunk trampoline implementation to safer and quicker
solutions:
* thumb2, the behaviour was undefined. new implementation use now 2
instructions
* thumb, The new implementation use 3 instructions instead of 6.
PM will be used for SoftDevices s13x, otherwise DM will be used.
Fix - security key distribution settings - Signing is not supported.
declare usage of encryption LTK and IRK if boonding enabled
deleted unused local reference to nRF5xGap class in bleGattcEventHandler.
fix PM internal bug (For gcc with -0s optimization an application fail to save a boonding data)
fuse redeclaration of PACKED macro in nRF5 SDK sources
This patch disables the fcache stats into mbed_sdk_init if uvisor is
defined in order to prevent MEMMANAGEMENT faults during boot.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
This patch backports the virtual NVIC mechanish from CMSIS 5 for the
Cortex M3 architecture in order to support uvisor in this MCU class.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
This patch modifies:
* the Beetle GCC ARM linker script
* the Beetle startup code
in order to define the memory regions that enable uvisor.
Signed-off-by: Vincenzo Frascino <vincenzo.frascino@arm.com>
Implement the functions __cxa_guard_acquire, __cxa_guard_release and
__cxa_guard_abort so lazily initialized function-local static objects
are done so in a thread safe manner in GCC.
Fix the following linker errors:
ToolException: ./.build/LPC11U68/GCC_ARM/mbed-os/hal/targets/cmsis/TARGET_NXP/TARGET_LPC11U6X/TOOLCHAIN_GCC_ARM/TARGET_LPC11U68/startup_LPC11U68.o: In function `operator new(unsigned int)':
startup_LPC11U68.cpp:(.text._Znwj+0x0): multiple definition of `operator new(unsigned int)'
./.build/LPC11U68/GCC_ARM/mbed-os/hal/common/retarget.o:retarget.cpp:(.text._Znwj+0x0): first defined here
./.build/LPC11U68/GCC_ARM/mbed-os/hal/targets/cmsis/TARGET_NXP/TARGET_LPC11U6X/TOOLCHAIN_GCC_ARM/TARGET_LPC11U68/startup_LPC11U68.o: In function `operator new[](unsigned int)':
startup_LPC11U68.cpp:(.text._Znaj+0x0): multiple definition of `operator new[](unsigned int)'
./.build/LPC11U68/GCC_ARM/mbed-os/hal/common/retarget.o:retarget.cpp:(.text._Znaj+0x0): first defined here
./.build/LPC11U68/GCC_ARM/mbed-os/hal/targets/cmsis/TARGET_NXP/TARGET_LPC11U6X/TOOLCHAIN_GCC_ARM/TARGET_LPC11U68/startup_LPC11U68.o: In function `operator delete(void*)':
startup_LPC11U68.cpp:(.text._ZdlPv+0x0): multiple definition of `operator delete(void*)'
./.build/LPC11U68/GCC_ARM/mbed-os/hal/common/retarget.o:retarget.cpp:(.text._ZdlPv+0x0): first defined here
./.build/LPC11U68/GCC_ARM/mbed-os/hal/targets/cmsis/TARGET_NXP/TARGET_LPC11U6X/TOOLCHAIN_GCC_ARM/TARGET_LPC11U68/startup_LPC11U68.o: In function `operator delete[](void*)':
startup_LPC11U68.cpp:(.text._ZdaPv+0x0): multiple definition of `operator delete[](void*)'
./.build/LPC11U68/GCC_ARM/mbed-os/hal/common/retarget.o:retarget.cpp:(.text._ZdaPv+0x0): first defined here
collect2: error: ld returned 1 exit status
Signed-off-by: Tony Wu <tung7970@gmail.com>
One limitation of C++ is that implicit casts do not occur when
matching template overloads, as a consequence the callback's
argument type requires a strict match.
Unfortunately, the prevents the previously common pattern of using
void pointers as function arguments, causing unnecessary problems
for users porting code.
Thing *t;
void doit(void *p) { blablabla }
Callback<void()> cb(t, doit);
To avoid this, explicit overloads on void pointers were added. This
avoids a template expansion, and allows the implicit cast to occur
as the user would expect.
- Marked `call` and `operator()` functions as const
- Moved to static_cast for internal function pointer to avoid losing
compiler checked const-safety
- Added test for `operator=` with non-callback types
- Moved from zero-cast to value-initializer when callback is null
- Added `operator==` and `operator!=`
- Removed special handling of null callback
- Replicated doxygen to all overloads
- Added correct nops where uninitialized callbacks are called
- Added assertion for null callback
- Removed copy-constructor from callback constructor
This commit adds a dynamic memory tracer that calls a callback whenever
one of the basic memory allocation functions (malloc, realloc, calloc,
free) is called. The operation of the tracer is guarded by the
'MBED_MEM_TRACING_ENABLED` macro.
Infinite recursion during tracing is guarded by using atomic
increment/decrement primitives on the `trace_level` variable.
Thanks to @c1728p9 and @heky for their help and suggestions.
Additionally, the following changes were don to avoid combinatorial
explosion in function overloads as a result of adding cv-qualifiers:
- Added convenience function for inferred type
- Deprecated callback overloads qhere cv-qualifiers are not scalable
Supported overloads:
callback(void (*f)(A...));
callback(const Callback<R(A...)> &);
callback(T *t, void (*f)(T*, A...));
callback(const T *t, void (*f)(const T*, A...));
callback(volatile T *t, void (*f)(volatile T*, A...));
callback(const volatile T *t, void (*f)(const volatile T*, A...));
callback(T *t, void (T::*f)(A...));
callback(const T *t, void (T::*f)(A...) const);
callback(volatile T *t, void (T::*f)(A...) volatile);
callback(const volatile T *t, void (T::*f)(A...) const volatile);
remove target with RAM too small for RTOS GCC_ARM.
since newlib is used for RTOS re-entrance suport instead of nano-newlib :
Heap size is reduced because sdata and bss have increased.
Keep track of the current size allocated, maximum size allocated,
number of allocations, failed allocations and total size allocated for
both GCC and ARM. Report the maximum size allocated at the end of
testing.
Also, add a test to verify heap metrics are working as expected.