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Merge pull request #2518 from fvincenzo/master 

Enable uvisor on Beetle
pull/2721/head
Sam Grove 2016-09-15 14:01:07 -05:00 committed by GitHub
parent 1eaa272b38 08e6f4121c
commit da14bce7a2
7 changed files with 192 additions and 80 deletions
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2
features/FEATURE_UVISOR/importer/Makefile
View File

@ -23,7 +23,7 @@ GDB:=$(PREFIX)gdb
OBJDUMP:=$(PREFIX)objdump
# Translate between uVisor namespace and mbed namespace
TARGET_TRANSLATION:=MCU_K64F.kinetis EFM32.efm32 STM32F4.stm32
TARGET_TRANSLATION:=MCU_K64F.kinetis EFM32.efm32 STM32F4.stm32 ARM_BEETLE_SOC.beetle
TARGET_PREFIX:=../
TARGET_SUPPORTED:=$(TARGET_PREFIX)targets/TARGET_UVISOR_SUPPORTED
TARGET_UNSUPPORTED:=$(TARGET_PREFIX)targets/TARGET_UVISOR_UNSUPPORTED

161
hal/targets/cmsis/TARGET_ARM_SSG/TARGET_BEETLE/TOOLCHAIN_GCC_ARM/BEETLE.ld
View File

@ -28,7 +28,7 @@ MEMORY
{
VECTORS (rx) : ORIGIN = 0x00000000, LENGTH = 0x00000400
FLASH (rx) : ORIGIN = 0x00000400, LENGTH = 0x00040000 - 0x00000400
RAM (rwx) : ORIGIN = 0x20000140, LENGTH = 0x00020000 - 0x00000140
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 0x00020000
}
/* Linker script to place sections and symbol values. Should be used together
@ -59,25 +59,37 @@ MEMORY
*/
ENTRY(Reset_Handler)
/* Heap 1/4 of ram and stack 1/8 */
__stack_size__ = 0x4000;
__heap_size__ = 0x8000;
HEAP_SIZE = DEFINED(__heap_size__) ? __heap_size__ : 0x0400;
STACK_SIZE = DEFINED(__stack_size__) ? __stack_size__ : 0x0400;
/* Size of the vector table in SRAM */
M_VECTOR_RAM_SIZE = 0x140;
SECTIONS
{
.isr_vector :
{
__vector_table = .;
KEEP(*(.vector_table))
*(.text.Reset_Handler)
*(.text.System_Init)
. = ALIGN(4);
} > VECTORS
.cordio :
/* Note: The uVisor expects this section at a fixed location, as specified
by the porting process configuration parameter: FLASH_OFFSET. */
__UVISOR_TEXT_OFFSET = 0x0;
__UVISOR_TEXT_START = ORIGIN(FLASH) + __UVISOR_TEXT_OFFSET;
.text __UVISOR_TEXT_START :
{
*CORDIO_RO_2.1.o
*TRIM_2.1.o
} > FLASH
/* uVisor code and data */
. = ALIGN(4);
__uvisor_main_start = .;
*(.uvisor.main)
__uvisor_main_end = .;
.text :
{
*(.text*)
KEEP(*(.init))
@ -114,12 +126,67 @@ SECTIONS
} > FLASH
__exidx_end = .;
__etext = .;
.data : AT (__etext)
.cordio :
{
*CORDIO_RO_2.1.o
*TRIM_2.1.o
} > FLASH
.interrupts_ram :
{
. = ALIGN(4);
__VECTOR_RAM__ = .;
__interrupts_ram_start__ = .; /* Create a global symbol at data start */
. += M_VECTOR_RAM_SIZE;
. = ALIGN(4);
__interrupts_ram_end__ = .; /* Define a global symbol at data end */
} > RAM
/* ensure that uvisor bss is at the beginning of memory */
/* Note: The uVisor expects this section at a fixed location, as specified by
* the porting process configuration parameter: SRAM_OFFSET. */
__UVISOR_SRAM_OFFSET = 0x140;
__UVISOR_BSS_START = ORIGIN(RAM) + __UVISOR_SRAM_OFFSET;
.uvisor.bss __UVISOR_BSS_START (NOLOAD):
{
. = ALIGN(32);
__uvisor_bss_start = .;
/* protected uvisor main bss */
. = ALIGN(32);
__uvisor_bss_main_start = .;
KEEP(*(.keep.uvisor.bss.main))
. = ALIGN(32);
__uvisor_bss_main_end = .;
/* protected uvisor secure boxes bss */
. = ALIGN(32);
__uvisor_bss_boxes_start = .;
KEEP(*(.keep.uvisor.bss.boxes))
. = ALIGN(32);
__uvisor_bss_boxes_end = .;
. = ALIGN((1 << LOG2CEIL(LENGTH(RAM))) / 8);
__uvisor_bss_end = .;
} > RAM
/* Heap space for the page allocator */
.page_heap (NOLOAD) :
{
. = ALIGN(32);
__uvisor_page_start = .;
KEEP(*(.keep.uvisor.page_heap))
. = ALIGN(32);
__uvisor_page_end = .;
} > RAM
.data :
{
PROVIDE(__etext = LOADADDR(.data));
. = ALIGN(4);
__data_start__ = .;
*(vtable)
*(.data)
*(.data*)
. = ALIGN(4);
@ -147,41 +214,89 @@ SECTIONS
/* All data end */
__data_end__ = .;
} > RAM AT > FLASH
/* uvisor configuration data */
.uvisor.secure :
{
. = ALIGN(32);
__uvisor_secure_start = .;
/* uvisor secure boxes configuration tables */
. = ALIGN(32);
__uvisor_cfgtbl_start = .;
KEEP(*(.keep.uvisor.cfgtbl))
. = ALIGN(32);
__uvisor_cfgtbl_end = .;
__uvisor_cfgtbl_ptr_start = .;
KEEP(*(.keep.uvisor.cfgtbl_ptr_first))
KEEP(*(.keep.uvisor.cfgtbl_ptr))
__uvisor_cfgtbl_ptr_end = .;
/* Pointers to all boxes register gateways. These are grouped here to allow
* discoverability and firmware verification. */
__uvisor_register_gateway_ptr_start = .;
KEEP(*(.keep.uvisor.register_gateway_ptr))
__uvisor_register_gateway_ptr_end = .;
. = ALIGN(32);
__uvisor_secure_end = .;
} > FLASH
/* From now on you can insert any other SRAM region. */
.uninitialized (NOLOAD):
{
. = ALIGN(32);
__uninitialized_start = .;
*(.uninitialized)
KEEP(*(.keep.uninitialized))
. = ALIGN(32);
__uninitialized_end = .;
} > RAM
.bss :
{
. = ALIGN(4);
__START_BSS = .;
__bss_start__ = .;
*(.bss)
*(.bss*)
*(COMMON)
. = ALIGN(4);
__bss_end__ = .;
__END_BSS = .;
} > RAM
bss_size = __bss_end__ - __bss_start__;
.heap :
{
. = ALIGN(8);
__uvisor_heap_start = .;
__end__ = .;
end = __end__;
*(.heap*)
PROVIDE(end = .);
__HeapBase = .;
. += HEAP_SIZE;
__HeapLimit = .;
} > RAM
/* .stack_dummy section doesn't contains any symbols. It is only
* used for linker to calculate size of stack sections, and assign
* values to stack symbols later */
.stack_dummy :
{
*(.stack)
__heap_limit = .; /* Add for _sbrk */
__uvisor_heap_end = .;
} > RAM
/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackLimit = __StackTop - SIZEOF(.stack_dummy);
__StackLimit = __StackTop - STACK_SIZE;
PROVIDE(__stack = __StackTop);
/* Check if data + heap + stack exceeds RAM limit */
ASSERT(__StackLimit >= __HeapLimit, "region RAM overflowed with stack")
/* Provide physical memory boundaries for uVisor. */
__uvisor_flash_start = ORIGIN(VECTORS);
__uvisor_flash_end = ORIGIN(FLASH) + LENGTH(FLASH);
__uvisor_sram_start = ORIGIN(RAM);
__uvisor_sram_end = ORIGIN(RAM) + LENGTH(RAM);
} /* End of sections */

51
hal/targets/cmsis/TARGET_ARM_SSG/TARGET_BEETLE/TOOLCHAIN_GCC_ARM/startup_BEETLE.S
View File

@ -24,48 +24,6 @@
.syntax unified
.arch armv7-m
/* Memory Model
The HEAP starts at the end of the DATA section and grows upward.
The STACK starts at the end of the RAM and grows downward.
The HEAP and stack STACK are only checked at compile time:
(DATA_SIZE + HEAP_SIZE + STACK_SIZE) < RAM_SIZE
This is just a check for the bare minimum for the Heap+Stack area before
aborting compilation, it is not the run time limit:
Heap_Size + Stack_Size = 0x80 + 0x80 = 0x100
*/
.section .stack
.align 3
#ifdef __STACK_SIZE
.equ Stack_Size, __STACK_SIZE
#else
.equ Stack_Size, 0x400
#endif
.globl __StackTop
.globl __StackLimit
__StackLimit:
.space Stack_Size
.size __StackLimit, . - __StackLimit
__StackTop:
.size __StackTop, . - __StackTop
.section .heap
.align 3
#ifdef __HEAP_SIZE
.equ Heap_Size, __HEAP_SIZE
#else
.equ Heap_Size, 0xC00
#endif
.globl __HeapBase
.globl __HeapLimit
__HeapBase:
.space Heap_Size
.size __HeapBase, . - __HeapBase
__HeapLimit:
.size __HeapLimit, . - __HeapLimit
.section .vector_table,"a",%progbits
.align 2
.globl __isr_vector
@ -143,6 +101,15 @@ __isr_vector:
.globl Reset_Handler
.type Reset_Handler, %function
Reset_Handler:
ldr r0, =SystemInit
blx r0
/* The call to uvisor_init() happens independently of uVisor being enabled or
* not, so it is conditionally compiled only based on FEATURE_UVISOR. */
#if defined(FEATURE_UVISOR) && defined(TARGET_UVISOR_SUPPORTED)
/* Call uvisor_init() */
ldr r0, =uvisor_init
blx r0
#endif /* FEATURE_UVISOR && TARGET_UVISOR_SUPPORTED */
/*
* Loop to copy data from read only memory to RAM. The ranges
* of copy from/to are specified by following symbols evaluated in

4
hal/targets/cmsis/TARGET_ARM_SSG/TARGET_BEETLE/cmsis_nvic.c
View File

@ -21,7 +21,7 @@
#define NVIC_RAM_VECTOR_ADDRESS (0x20000000) //Location of vectors in RAM
#define NVIC_FLASH_VECTOR_ADDRESS (0x00000000) //Initial vector position in flash
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
uint32_t *vectors = (uint32_t*)SCB->VTOR;
uint32_t i;
@ -37,7 +37,7 @@ void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector) {
vectors[IRQn + NVIC_USER_IRQ_OFFSET] = vector;
}
uint32_t NVIC_GetVector(IRQn_Type IRQn) {
uint32_t __NVIC_GetVector(IRQn_Type IRQn) {
uint32_t *vectors = (uint32_t*)SCB->VTOR;
return vectors[IRQn + NVIC_USER_IRQ_OFFSET];
}

4
hal/targets/cmsis/TARGET_ARM_SSG/TARGET_BEETLE/cmsis_nvic.h
View File

@ -29,8 +29,8 @@
extern "C" {
#endif
void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
uint32_t NVIC_GetVector(IRQn_Type IRQn);
void __NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
uint32_t __NVIC_GetVector(IRQn_Type IRQn);
#ifdef __cplusplus
}

48
hal/targets/cmsis/core_cm3.h
View File

@ -1337,6 +1337,34 @@ typedef struct
@{
*/
#ifdef CMSIS_NVIC_VIRTUAL
#ifndef CMSIS_NVIC_VIRTUAL_HEADER_FILE
#define CMSIS_NVIC_VIRTUAL_HEADER_FILE "cmsis_nvic_virtual.h"
#endif
#include CMSIS_NVIC_VIRTUAL_HEADER_FILE
#else
#define NVIC_SetPriorityGrouping __NVIC_SetPriorityGrouping
#define NVIC_GetPriorityGrouping __NVIC_GetPriorityGrouping
#define NVIC_EnableIRQ __NVIC_EnableIRQ
#define NVIC_DisableIRQ __NVIC_DisableIRQ
#define NVIC_GetPendingIRQ __NVIC_GetPendingIRQ
#define NVIC_SetPendingIRQ __NVIC_SetPendingIRQ
#define NVIC_ClearPendingIRQ __NVIC_ClearPendingIRQ
#define NVIC_GetActive __NVIC_GetActive
#define NVIC_SetPriority __NVIC_SetPriority
#define NVIC_GetPriority __NVIC_GetPriority
#endif /* CMSIS_NVIC_VIRTUAL */
#ifdef CMSIS_VECTAB_VIRTUAL
#ifndef CMSIS_VECTAB_VIRTUAL_HEADER_FILE
#define CMSIS_VECTAB_VIRTUAL_HEADER_FILE "cmsis_vectab_virtual.h"
#endif
#include CMSIS_VECTAB_VIRTUAL_HEADER_FILE
#else
#define NVIC_SetVector __NVIC_SetVector
#define NVIC_GetVector __NVIC_GetVector
#endif /* CMSIS_VECTAB_VIRTUAL */
/** \brief Set Priority Grouping
The function sets the priority grouping field using the required unlock sequence.
@ -1347,7 +1375,7 @@ typedef struct
\param [in] PriorityGroup Priority grouping field.
*/
__STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
__STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
{
uint32_t reg_value;
uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */
@ -1367,7 +1395,7 @@ __STATIC_INLINE void NVIC_SetPriorityGrouping(uint32_t PriorityGroup)
\return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field).
*/
__STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
__STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void)
{
return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos));
}
@ -1379,7 +1407,7 @@ __STATIC_INLINE uint32_t NVIC_GetPriorityGrouping(void)
\param [in] IRQn External interrupt number. Value cannot be negative.
*/
__STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
__STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn)
{
NVIC->ISER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
}
@ -1391,7 +1419,7 @@ __STATIC_INLINE void NVIC_EnableIRQ(IRQn_Type IRQn)
\param [in] IRQn External interrupt number. Value cannot be negative.
*/
__STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
__STATIC_INLINE void __NVIC_DisableIRQ(IRQn_Type IRQn)
{
NVIC->ICER[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
}
@ -1407,7 +1435,7 @@ __STATIC_INLINE void NVIC_DisableIRQ(IRQn_Type IRQn)
\return 0 Interrupt status is not pending.
\return 1 Interrupt status is pending.
*/
__STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
__STATIC_INLINE uint32_t __NVIC_GetPendingIRQ(IRQn_Type IRQn)
{
return((uint32_t)(((NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
}
@ -1419,7 +1447,7 @@ __STATIC_INLINE uint32_t NVIC_GetPendingIRQ(IRQn_Type IRQn)
\param [in] IRQn Interrupt number. Value cannot be negative.
*/
__STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
__STATIC_INLINE void __NVIC_SetPendingIRQ(IRQn_Type IRQn)
{
NVIC->ISPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
}
@ -1431,7 +1459,7 @@ __STATIC_INLINE void NVIC_SetPendingIRQ(IRQn_Type IRQn)
\param [in] IRQn External interrupt number. Value cannot be negative.
*/
__STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
__STATIC_INLINE void __NVIC_ClearPendingIRQ(IRQn_Type IRQn)
{
NVIC->ICPR[(((uint32_t)(int32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL));
}
@ -1446,7 +1474,7 @@ __STATIC_INLINE void NVIC_ClearPendingIRQ(IRQn_Type IRQn)
\return 0 Interrupt status is not active.
\return 1 Interrupt status is active.
*/
__STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
__STATIC_INLINE uint32_t __NVIC_GetActive(IRQn_Type IRQn)
{
return((uint32_t)(((NVIC->IABR[(((uint32_t)(int32_t)IRQn) >> 5UL)] & (1UL << (((uint32_t)(int32_t)IRQn) & 0x1FUL))) != 0UL) ? 1UL : 0UL));
}
@ -1461,7 +1489,7 @@ __STATIC_INLINE uint32_t NVIC_GetActive(IRQn_Type IRQn)
\param [in] IRQn Interrupt number.
\param [in] priority Priority to set.
*/
__STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
__STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
{
if((int32_t)IRQn < 0) {
SCB->SHP[(((uint32_t)(int32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8 - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL);
@ -1483,7 +1511,7 @@ __STATIC_INLINE void NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority)
\return Interrupt Priority. Value is aligned automatically to the implemented
priority bits of the microcontroller.
*/
__STATIC_INLINE uint32_t NVIC_GetPriority(IRQn_Type IRQn)
__STATIC_INLINE uint32_t __NVIC_GetPriority(IRQn_Type IRQn)
{
if((int32_t)IRQn < 0) {

2
hal/targets/hal/TARGET_ARM_SSG/TARGET_BEETLE/mbed_sdk_init.c
View File

@ -23,8 +23,10 @@ void mbed_sdk_init(void) {
EFlash_DriverInitialize();
EFlash_ClockConfig();
#if !defined(FEATURE_UVISOR) || !defined(TARGET_UVISOR_SUPPORTED)
/* Enable Flash Cache Stats */
FCache_DriverInitialize();
FCache_Enable(1);
FCache_Invalidate();
#endif
}