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Merge pull request #2577 from theotherjimmy/gcc-arm-consolidation 

tools-exporters! - Move to Toolchain-polymorphic makefiles
pull/2721/head
Sam Grove 2016-09-15 12:58:02 -05:00 committed by GitHub
parent 729ef15307 e507b9e1c6
commit 1eaa272b38
110 changed files with 317 additions and 786 deletions
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7
tools/export/__init__.py
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@ -19,7 +19,7 @@ from os.path import join, exists, basename
from shutil import copytree, rmtree, copy
import yaml
from tools.export import uvision4, uvision5, codered, gccarm, ds5_5, iar
from tools.export import uvision4, uvision5, codered, makefile, ds5_5, iar
from tools.export import emblocks, coide, kds, simplicityv3, atmelstudio
from tools.export import sw4stm32, e2studio, zip
from tools.export.exporters import OldLibrariesException, FailedBuildException
@ -32,7 +32,10 @@ EXPORTERS = {
'uvision4': uvision4.Uvision4,
'uvision5': uvision5.Uvision5,
'lpcxpresso': codered.CodeRed,
'gcc_arm': gccarm.GccArm,
'gcc_arm': makefile.GccArm,
'make_gcc_arm': makefile.GccArm,
'make_armc5': makefile.Armc5,
'make_iar': makefile.IAR,
'ds5_5': ds5_5.DS5_5,
'iar': iar.IAREmbeddedWorkbench,
'emblocks' : emblocks.IntermediateFile,

14
tools/export/gcc_arm_arch_ble.tmpl
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@ -1,14 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block additional_variables %}
SOFTDEVICE = mbed/TARGET_ARCH_BLE/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_softdevice.hex
{% endblock %}
{% block additional_executables %}
SREC_CAT = srec_cat
{% endblock %}
{% block additional_targets %}
merge:
$(SREC_CAT) $(SOFTDEVICE) -intel $(PROJECT).hex -intel -o combined.hex -intel --line-length=44
{% endblock %}

1
tools/export/gcc_arm_arch_max.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_arch_pro.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_arm_beetle_soc.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_b96b_f446ve.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_bluepill_f103c8.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

133
tools/export/gcc_arm_common.tmpl
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@ -1,133 +0,0 @@
# This file was automagically generated by mbed.org. For more information,
# see http://mbed.org/handbook/Exporting-to-GCC-ARM-Embedded
# cross-platform directory manipulation
ifeq ($(shell echo $$OS),$$OS)
MAKEDIR = if not exist "$(1)" mkdir "$(1)"
RM = rmdir /S /Q "$(1)"
else
MAKEDIR = $(SHELL) -c "mkdir -p \"$(1)\""
RM = $(SHELL) -c "rm -rf \"$(1)\""
endif
ifeq (,$(filter .build,$(notdir $(CURDIR))))
.SUFFIXES:
OBJDIR := .build
mkfile_path := $(abspath $(lastword $(MAKEFILE_LIST)))
MAKETARGET = $(MAKE) --no-print-directory -C $(OBJDIR) -f $(mkfile_path) \
SRCDIR=$(CURDIR) $(MAKECMDGOALS)
.PHONY: $(OBJDIR) clean
all:
+@$(call MAKEDIR,$(OBJDIR))
+@$(MAKETARGET)
$(OBJDIR): all
Makefile : ;
% :: $(OBJDIR) ; :
clean :
$(call RM,$(OBJDIR))
{% block target_clean -%}
{% endblock %}
else
VPATH = {% for path in vpath %}{{path}} {% endfor %}
GCC_BIN =
PROJECT = {{name}}
OBJECTS = {% for f in to_be_compiled %}{{f}} {% endfor %}
SYS_OBJECTS = {% for f in object_files %}{{f}} {% endfor %}
INCLUDE_PATHS = {% for p in include_paths %}-I{{p}} {% endfor %}
LIBRARY_PATHS = {% for p in library_paths %}-L{{p}} {% endfor %}
LIBRARIES = {% for lib in libraries %}-l{{lib}} {% endfor %}
LINKER_SCRIPT = {{linker_script}}
{%- block additional_variables -%}{% endblock %}
###############################################################################
AS = $(GCC_BIN)arm-none-eabi-as
CC = $(GCC_BIN)arm-none-eabi-gcc
CPP = $(GCC_BIN)arm-none-eabi-g++
LD = $(GCC_BIN)arm-none-eabi-gcc
OBJCOPY = $(GCC_BIN)arm-none-eabi-objcopy
OBJDUMP = $(GCC_BIN)arm-none-eabi-objdump
SIZE = $(GCC_BIN)arm-none-eabi-size
{%- block additional_executables -%}{% endblock %}
{%- block flags -%}
{% block hardfp %}
{% if "-mfloat-abi=softfp" in cpu_flags %}
ifeq ($(HARDFP),1)
FLOAT_ABI = hard
else
FLOAT_ABI = softfp
endif
{% endif %}
{%- endblock %}
CPU = {% block cpu %}{% for cf in cpu_flags %}{{cf|replace("-mfloat-abi=softfp","-mfloat-abi=$(FLOAT_ABI)")}} {% endfor %}{% endblock %}
CC_FLAGS = {% block cc_flags %}{{common_flags|join(" ")}} {{c_flags|join(" ")}} -MMD -MP{% endblock %}
CPPC_FLAGS = {% block cppc_flags %}{{common_flags|join(" ")}} {{cxx_flags|join(" ")}} -MMD -MP{% endblock %}
ASM_FLAGS = {% block asm_flags %}{{asm_flags|join(" ")}} {{common_flags|join(" ")}}{% endblock %}
CC_SYMBOLS = {% block cc_symbols %}{% for s in symbols %}-D{{s}} {% endfor %}{% endblock %}
LD_FLAGS = {%- block ld_flags -%} {{ld_flags|join(" ")}} {% endblock %}
LD_SYS_LIBS = {% block ld_sys_libs %}-lstdc++ -lsupc++ -lm -lc -lgcc -lnosys{% endblock %}
{% endblock %}
ifeq ($(DEBUG), 1)
CC_FLAGS += -DDEBUG -O0
else
CC_FLAGS += -DNDEBUG -Os
endif
.PHONY: all lst size
{% block target_all -%}
all: $(PROJECT).bin $(PROJECT).hex size
{% endblock %}
.asm.o:
+@$(call MAKEDIR,$(dir $@))
$(CC) $(CPU) -c $(ASM_FLAGS) $(CC_SYMBOLS) $(INCLUDE_PATHS) -o $@ $<
.s.o:
+@$(call MAKEDIR,$(dir $@))
$(CC) $(CPU) -c $(ASM_FLAGS) $(CC_SYMBOLS) $(INCLUDE_PATHS) -o $@ $<
.S.o:
+@$(call MAKEDIR,$(dir $@))
$(CC) $(CPU) -c $(ASM_FLAGS) $(CC_SYMBOLS) $(INCLUDE_PATHS) -o $@ $<
.c.o:
+@$(call MAKEDIR,$(dir $@))
$(CC) $(CC_FLAGS) $(CC_SYMBOLS) $(INCLUDE_PATHS) -o $@ $<
.cpp.o:
+@$(call MAKEDIR,$(dir $@))
$(CPP) $(CPPC_FLAGS) $(CC_SYMBOLS) $(INCLUDE_PATHS) -o $@ $<
{% block target_project_elf %}
$(PROJECT).elf: $(OBJECTS) $(SYS_OBJECTS) $(LINKER_SCRIPT)
$(LD) $(LD_FLAGS) -T$(filter %.ld, $^) $(LIBRARY_PATHS) -o $@ $(filter %.o, $^) -Wl,--start-group $(LIBRARIES) $(LD_SYS_LIBS) -Wl,--end-group
{% endblock %}
$(PROJECT).bin: $(PROJECT).elf
$(OBJCOPY) -O binary $< $@
$(PROJECT).hex: $(PROJECT).elf
@$(OBJCOPY) -O ihex $< $@
$(PROJECT).lst: $(PROJECT).elf
@$(OBJDUMP) -Sdh $< > $@
lst: $(PROJECT).lst
size: $(PROJECT).elf
$(SIZE) $(PROJECT).elf
DEPS = $(OBJECTS:.o=.d) $(SYS_OBJECTS:.o=.d)
-include $(DEPS)
{% block additional_targets %}{% endblock %}
endif

14
tools/export/gcc_arm_delta_dfcm_nnn40.tmpl
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@ -1,14 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block additional_variables %}
SOFTDEVICE = mbed/TARGET_NRF51822/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_0_0/s110_nrf51822_7.0.0_softdevice.hex
{% endblock %}
{% block additional_executables %}
SREC_CAT = srec_cat
{% endblock %}
{% block additional_targets %}
merge:
$(SREC_CAT) $(SOFTDEVICE) -intel $(PROJECT).hex -intel -o combined.hex -intel --line-length=44
{% endblock %}

1
tools/export/gcc_arm_disco_f051r8.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_disco_f100rb.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_disco_f303vc.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_disco_f334c8.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_disco_f401vc.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_disco_f407vg.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_disco_f429zi.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_disco_f469ni.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_disco_f746ng.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_disco_f769ni.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_disco_l053c8.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_disco_l476vg.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

8
tools/export/gcc_arm_efm32gg_stk3700.tmpl
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@ -1,8 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block target_project_elf %} {{ super() }} @echo ""
@echo "*****"
@echo "***** You must modify vector checksum value in *.bin and *.hex files."
@echo "*****"
@echo ""
{%- endblock %}

8
tools/export/gcc_arm_efm32hg_stk3400.tmpl
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@ -1,8 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block target_project_elf %} {{ super() }} @echo ""
@echo "*****"
@echo "***** You must modify vector checksum value in *.bin and *.hex files."
@echo "*****"
@echo ""
{%- endblock %}

8
tools/export/gcc_arm_efm32lg_stk3600.tmpl
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@ -1,8 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block target_project_elf %} {{ super() }} @echo ""
@echo "*****"
@echo "***** You must modify vector checksum value in *.bin and *.hex files."
@echo "*****"
@echo ""
{%- endblock %}

8
tools/export/gcc_arm_efm32pg_stk3401.tmpl
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@ -1,8 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block target_project_elf %} {{ super() }} @echo ""
@echo "*****"
@echo "***** You must modify vector checksum value in *.bin and *.hex files."
@echo "*****"
@echo ""
{%- endblock %}

8
tools/export/gcc_arm_efm32wg_stk3800.tmpl
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@ -1,8 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block target_project_elf %} {{ super() }} @echo ""
@echo "*****"
@echo "***** You must modify vector checksum value in *.bin and *.hex files."
@echo "*****"
@echo ""
{%- endblock %}

8
tools/export/gcc_arm_efm32zg_stk3200.tmpl
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@ -1,8 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block target_project_elf %} {{ super() }} @echo ""
@echo "*****"
@echo "***** You must modify vector checksum value in *.bin and *.hex files."
@echo "*****"
@echo ""
{%- endblock %}

1
tools/export/gcc_arm_elmo_f411re.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

14
tools/export/gcc_arm_hrm1017.tmpl
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@ -1,14 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block additional_variables %}
SOFTDEVICE = mbed/TARGET_HRM1017/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s130_nrf51822_1_0_0/s130_nrf51_1.0.0_softdevice.hex
{% endblock %}
{% block additional_executables %}
SREC_CAT = srec_cat
{% endblock %}
{% block additional_targets %}
merge:
$(SREC_CAT) $(SOFTDEVICE) -intel $(PROJECT).hex -intel -o combined.hex -intel --line-length=44
{% endblock %}

4
tools/export/gcc_arm_k20d50m.tmpl
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@ -1,4 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block hardfp %}{% endblock %}
{% block cpu %}-mcpu=cortex-m4 -mthumb{% endblock %}

1
tools/export/gcc_arm_k22f.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_k64f.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_kl05z.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_kl25z.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_kl43z.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_kl46z.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

10
tools/export/gcc_arm_lpc1114.tmpl
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@ -1,10 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block target_project_elf %}
{{ super() }}
@echo ""
@echo "*****"
@echo "***** You must modify vector checksum value in *.bin and *.hex files."
@echo "*****"
@echo ""
{% endblock %}

10
tools/export/gcc_arm_lpc11u24.tmpl
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@ -1,10 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block target_project_elf %}
{{ super() }}
@echo ""
@echo "*****"
@echo "***** You must modify vector checksum value in *.bin and *.hex files."
@echo "*****"
@echo ""
{% endblock %}

10
tools/export/gcc_arm_lpc11u35_401.tmpl
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@ -1,10 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block target_project_elf %}
{{ super() }}
@echo ""
@echo "*****"
@echo "***** You must modify vector checksum value in *.bin and *.hex files."
@echo "*****"
@echo ""
{% endblock %}

10
tools/export/gcc_arm_lpc11u35_501.tmpl
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@ -1,10 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block target_project_elf %}
{{ super() }}
@echo ""
@echo "*****"
@echo "***** You must modify vector checksum value in *.bin and *.hex files."
@echo "*****"
@echo ""
{% endblock %}

10
tools/export/gcc_arm_lpc11u37h_401.tmpl
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@ -1,10 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block target_project_elf %}
{{ super() }}
@echo ""
@echo "*****"
@echo "***** You must modify vector checksum value in *.bin and *.hex files."
@echo "*****"
@echo ""
{% endblock %}

10
tools/export/gcc_arm_lpc1768.tmpl
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@ -1,10 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block target_project_elf %}
{{ super() }}
@echo ""
@echo "*****"
@echo "***** You must modify vector checksum value in *.bin and *.hex files."
@echo "*****"
@echo ""
{% endblock %}

1
tools/export/gcc_arm_lpc2368.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_lpc2460.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

10
tools/export/gcc_arm_lpc4088.tmpl
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@ -1,10 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block target_project_elf %}
{{ super() }}
@echo ""
@echo "*****"
@echo "***** You must modify vector checksum value in *.bin and *.hex files."
@echo "*****"
@echo ""
{% endblock %}

10
tools/export/gcc_arm_lpc4088_dm.tmpl
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@ -1,10 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block target_project_elf %}
{{ super() }}
@echo ""
@echo "*****"
@echo "***** You must modify vector checksum value in *.bin and *.hex files."
@echo "*****"
@echo ""
{% endblock %}

10
tools/export/gcc_arm_lpc4330_m4.tmpl
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@ -1,10 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block target_project_elf %}
{{ super() }}
@echo ""
@echo "*****"
@echo "***** You must modify vector checksum value in *.bin and *.hex files."
@echo "*****"
@echo ""
{% endblock %}

10
tools/export/gcc_arm_lpc810.tmpl
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@ -1,10 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block target_project_elf %}
{{ super() }}
@echo ""
@echo "*****"
@echo "***** You must modify vector checksum value in *.bin and *.hex files."
@echo "*****"
@echo ""
{% endblock %}

10
tools/export/gcc_arm_lpc812.tmpl
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@ -1,10 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block target_project_elf %}
{{ super() }}
@echo ""
@echo "*****"
@echo "***** You must modify vector checksum value in *.bin and *.hex files."
@echo "*****"
@echo ""
{% endblock %}

10
tools/export/gcc_arm_lpc824.tmpl
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@ -1,10 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block target_project_elf %}
{{ super() }}
@echo ""
@echo "*****"
@echo "***** You must modify vector checksum value in *.bin and *.hex files."
@echo "*****"
@echo ""
{% endblock %}

10
tools/export/gcc_arm_lpccappuccino.tmpl
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@ -1,10 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block target_project_elf %}
{{ super() }}
@echo ""
@echo "*****"
@echo "***** You must modify vector checksum value in *.bin and *.hex files."
@echo "*****"
@echo ""
{% endblock %}

1
tools/export/gcc_arm_max32600mbed.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_maxwsnenv.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_mote_l152rc.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

14
tools/export/gcc_arm_mtm_mtconnect04S.tmpl
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@ -1,14 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block additional_variables %}
SOFTDEVICE = mbed/TARGET_MTM_MTCONNECT04S/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s130_nrf51822_1_0_0/s130_nrf51_1.0.0_softdevice.hex
{% endblock %}
{% block additional_executables %}
SREC_CAT = srec_cat
{% endblock %}
{% block additional_targets %}
merge:
$(SREC_CAT) $(SOFTDEVICE) -intel $(PROJECT).hex -intel -o combined.hex -intel --line-length=44
{% endblock %}

1
tools/export/gcc_arm_mts_gambit.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_mts_mdot_f405rg.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_mts_mdot_f411re.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

14
tools/export/gcc_arm_nrf51822.tmpl
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@ -1,14 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block additional_variables %}
SOFTDEVICE = mbed/TARGET_NRF51822/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s130_nrf51822_1_0_0/s130_nrf51_1.0.0_softdevice.hex
{% endblock %}
{% block additional_executables %}
SREC_CAT = srec_cat
{% endblock %}
{% block additional_targets %}
merge:
$(SREC_CAT) $(SOFTDEVICE) -intel $(PROJECT).hex -intel -o combined.hex -intel --line-length=44
{% endblock %}

18
tools/export/gcc_arm_nrf51_dk.tmpl
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@ -1,18 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block target_all %}
all: $(PROJECT).bin $(PROJECT)-combined.hex size
{% endblock %}
{% block additional_variables %}
SOFTDEVICE = {% for f in hex_files %}{{f}} {% endfor %}
{% endblock %}
{% block additional_executables %}
SREC_CAT = srec_cat
{% endblock %}
{% block additional_targets %}
$(PROJECT)-combined.hex: $(PROJECT).hex
$(SREC_CAT) $(SOFTDEVICE) -intel $(PROJECT).hex -intel -o $(PROJECT)-combined.hex -intel --line-length=44
{% endblock %}

14
tools/export/gcc_arm_nrf51_dongle.tmpl
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@ -1,14 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block additional_variables %}
SOFTDEVICE = mbed/TARGET_NRF51822/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_0_0/s110_nrf51822_7.0.0_softdevice.hex
{% endblock %}
{% block additional_executables %}
SREC_CAT = srec_cat
{% endblock %}
{% block additional_targets %}
merge:
$(SREC_CAT) $(SOFTDEVICE) -intel $(PROJECT).hex -intel -o combined.hex -intel --line-length=44
{% endblock %}

14
tools/export/gcc_arm_nrf51_microbit.tmpl
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@ -1,14 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block additional_variables %}
SOFTDEVICE = mbed/TARGET_NRF51_MICROBIT/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_8_0_0/s110_nrf51822_8.0.0_softdevice.hex
{% endblock %}
{% block additional_executables %}
SREC_CAT = srec_cat
{% endblock %}
{% block additional_targets %}
merge:
$(SREC_CAT) $(SOFTDEVICE) -intel $(PROJECT).hex -intel -o combined.hex -intel --line-length=44
{% endblock %}

1
tools/export/gcc_arm_nucleo_f030r8.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nucleo_f031k6.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nucleo_f042k6.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nucleo_f070rb.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nucleo_f072rb.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nucleo_f091rc.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nucleo_f103rb.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nucleo_f302r8.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nucleo_f303k8.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nucleo_f303ke.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nucleo_f303re.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nucleo_f334r8.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nucleo_f401re.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nucleo_f410rb.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nucleo_f411re.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nucleo_f429zi.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nucleo_f446re.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nucleo_f446ze.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nucleo_f746zg.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nucleo_f767zi.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nucleo_l031k6.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nucleo_l053r8.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nucleo_l073rz.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nucleo_l152re.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nucleo_l476rg.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

1
tools/export/gcc_arm_nz32_sc151.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

14
tools/export/gcc_arm_rblab_blenano.tmpl
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@ -1,14 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block additional_variables %}
SOFTDEVICE = mbed/TARGET_RBLAB_BLENANO/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s130_nrf51822_1_0_0/s130_nrf51_1.0.0_softdevice.hex
{% endblock %}
{% block additional_executables %}
SREC_CAT = srec_cat
{% endblock %}
{% block additional_targets %}
merge:
$(SREC_CAT) $(SOFTDEVICE) -intel $(PROJECT).hex -intel -o combined.hex -intel --line-length=44
{% endblock %}

14
tools/export/gcc_arm_rblab_nrf51822.tmpl
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@ -1,14 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block additional_variables %}
SOFTDEVICE = mbed/TARGET_RBLAB_NRF51822/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_softdevice.hex
{% endblock %}
{% block additional_executables %}
SREC_CAT = srec_cat
{% endblock %}
{% block additional_targets %}
merge:
$(SREC_CAT) $(SOFTDEVICE) -intel $(PROJECT).hex -intel -o combined.hex -intel --line-length=44
{% endblock %}

16
tools/export/gcc_arm_rz_a1h.tmpl
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@ -1,16 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block cc_flags -%}
$(CPU) -c -g -fno-common -fmessage-length=0 -Wall -Wextra -Wno-unused-parameter -Wno-missing-field-initializers
CC_FLAGS += -fno-exceptions -fno-builtin -ffunction-sections -fdata-sections -fno-delete-null-pointer-checks -fomit-frame-pointer
CC_FLAGS += -MMD -MP
{% endblock %}
{% block target_project_elf %}
{{ super() }}
@echo ""
@echo "*****"
@echo "***** You must modify vector checksum value in *.bin and *.hex files."
@echo "*****"
@echo ""
{% endblock %}

4
tools/export/gcc_arm_samd21g18a.tmpl
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@ -1,4 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block cpu %} -mcpu=cortex-m0plus -mthumb {% endblock %}
{% block ld_sys_libs %}{{ super() }} -Wl,--start-group -lc -lc -lnosys -Wl,--end-group {% endblock %}

4
tools/export/gcc_arm_samd21j18a.tmpl
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@ -1,4 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block cpu %} -mcpu=cortex-m0plus -mthumb {% endblock %}
{% block ld_sys_libs %}{{ super() }} -Wl,--start-group -lc -lc -lnosys -Wl,--end-group {% endblock %}

4
tools/export/gcc_arm_samg55j19.tmpl
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@ -1,4 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block hardfp %}{% endblock %}
{% block cpu %}-mcpu=cortex-m4 -mthumb{% endblock %}

4
tools/export/gcc_arm_saml21j18a.tmpl
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@ -1,4 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block cpu %} -mcpu=cortex-m0plus -mthumb {% endblock %}
{% block ld_sys_libs %}{{ super() }} -Wl,--start-group -lc -lc -lnosys -Wl,--end-group {% endblock %}

4
tools/export/gcc_arm_samr21g18a.tmpl
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@ -1,4 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block cpu %} -mcpu=cortex-m0plus -mthumb {% endblock %}
{% block ld_sys_libs %}{{ super() }} -Wl,--start-group -lc -lc -lnosys -Wl,--end-group {% endblock %}

14
tools/export/gcc_arm_seeed_tiny_ble.tmpl
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@ -1,14 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block additional_variables %}
SOFTDEVICE = mbed/TARGET_ARCH_BLE/TARGET_NORDIC/TARGET_MCU_NRF51822/Lib/s110_nrf51822_7_1_0/s110_nrf51822_7.1.0_softdevice.hex
{% endblock %}
{% block additional_executables %}
SREC_CAT = srec_cat
{% endblock %}
{% block additional_targets %}
merge:
$(SREC_CAT) $(SOFTDEVICE) -intel $(PROJECT).hex -intel -o combined.hex -intel --line-length=44
{% endblock %}

10
tools/export/gcc_arm_ssci824.tmpl
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@ -1,10 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block target_project_elf %}
{{ super() }}
@echo ""
@echo "*****"
@echo "***** You must modify vector checksum value in *.bin and *.hex files."
@echo "*****"
@echo ""
{% endblock %}

1
tools/export/gcc_arm_stm32f407.tmpl
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@ -1 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}

4
tools/export/gcc_arm_teensy3_1.tmpl
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@ -1,4 +0,0 @@
{% extends "gcc_arm_common.tmpl" %}
{% block hardfp %}{% endblock %}
{% block cpu %}-mcpu=cortex-m4 -mthumb{% endblock %}

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