mirror of https://github.com/ARMmbed/mbed-os.git
[STM32F4] SPI ASYNCH support
This commit is highly derived from an existing work from salkinium. It adds SPI ASYNC support to STM32 F4 devices. This required a small rework of the structure to have SYNCH and ASYNCH co-exist.pull/2542/head
Laurent MEUNIER
parent
5fdce5fbf7
commit
478168c712
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@ -69,6 +69,8 @@ struct serial_s {
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};
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struct spi_s {
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SPI_HandleTypeDef handle;
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IRQn_Type spiIRQ;
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SPIName spi;
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uint32_t bits;
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uint32_t cpol;
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@ -80,6 +82,11 @@ struct spi_s {
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PinName pin_mosi;
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PinName pin_sclk;
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PinName pin_ssel;
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#ifdef DEVICE_SPI_ASYNCH
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uint32_t event;
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uint8_t module;
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uint8_t transfer_type;
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#endif
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};
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#include "gpio_object.h"
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@ -32,42 +32,69 @@
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#include "spi_api.h"
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#if DEVICE_SPI
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#include <stdbool.h>
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#include <math.h>
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#include <string.h>
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#include "cmsis.h"
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#include "pinmap.h"
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#include "PeripheralPins.h"
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#include "mbed_error.h"
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static SPI_HandleTypeDef SpiHandle;
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#if DEVICE_SPI_ASYNCH
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#define SPI_INST(obj) ((SPI_TypeDef *)(obj->spi.spi))
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#else
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#define SPI_INST(obj) ((SPI_TypeDef *)(obj->spi))
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#endif
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#if DEVICE_SPI_ASYNCH
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#define SPI_S(obj) (( struct spi_s *)(&(obj->spi)))
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#else
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#define SPI_S(obj) (( struct spi_s *)(obj))
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#endif
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#ifndef DEBUG_STDIO
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# define DEBUG_STDIO 0
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#endif
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#if DEBUG_STDIO
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# include <stdio.h>
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# define DEBUG_PRINTF(...) do { printf(__VA_ARGS__); } while(0)
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#else
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# define DEBUG_PRINTF(...) {}
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#endif
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static void init_spi(spi_t *obj)
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{
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SpiHandle.Instance = (SPI_TypeDef *)(obj->spi);
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struct spi_s *spiobj = SPI_S(obj);
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SPI_HandleTypeDef *handle = &(spiobj->handle);
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__HAL_SPI_DISABLE(&SpiHandle);
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handle->Instance = SPI_INST(obj);
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__HAL_SPI_DISABLE(handle);
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SpiHandle.Init.Mode = obj->mode;
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SpiHandle.Init.BaudRatePrescaler = obj->br_presc;
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SpiHandle.Init.Direction = SPI_DIRECTION_2LINES;
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SpiHandle.Init.CLKPhase = obj->cpha;
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SpiHandle.Init.CLKPolarity = obj->cpol;
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SpiHandle.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED;
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SpiHandle.Init.CRCPolynomial = 7;
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SpiHandle.Init.DataSize = obj->bits;
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SpiHandle.Init.FirstBit = SPI_FIRSTBIT_MSB;
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SpiHandle.Init.NSS = obj->nss;
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SpiHandle.Init.TIMode = SPI_TIMODE_DISABLED;
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DEBUG_PRINTF("init_spi: instance=0x%8X\r\n", (int)handle->Instance);
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if (HAL_SPI_Init(&SpiHandle) != HAL_OK) {
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handle->Init.Mode = spiobj->mode;
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handle->Init.BaudRatePrescaler = spiobj->br_presc;
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handle->Init.Direction = SPI_DIRECTION_2LINES;
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handle->Init.CLKPhase = spiobj->cpha;
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handle->Init.CLKPolarity = spiobj->cpol;
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handle->Init.CRCCalculation = SPI_CRCCALCULATION_DISABLED;
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handle->Init.CRCPolynomial = 7;
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handle->Init.DataSize = (spiobj->bits == 16) ? SPI_DATASIZE_16BIT : SPI_DATASIZE_8BIT;
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handle->Init.FirstBit = SPI_FIRSTBIT_MSB;
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handle->Init.NSS = spiobj->nss;
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handle->Init.TIMode = SPI_TIMODE_DISABLED;
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if (HAL_SPI_Init(handle) != HAL_OK) {
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error("Cannot initialize SPI");
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}
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__HAL_SPI_ENABLE(&SpiHandle);
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__HAL_SPI_ENABLE(handle);
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}
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void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel)
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{
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struct spi_s *spiobj = SPI_S(obj);
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// Determine the SPI to use
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SPIName spi_mosi = (SPIName)pinmap_peripheral(mosi, PinMap_SPI_MOSI);
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SPIName spi_miso = (SPIName)pinmap_peripheral(miso, PinMap_SPI_MISO);
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@ -77,39 +104,45 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
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SPIName spi_data = (SPIName)pinmap_merge(spi_mosi, spi_miso);
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SPIName spi_cntl = (SPIName)pinmap_merge(spi_sclk, spi_ssel);
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obj->spi = (SPIName)pinmap_merge(spi_data, spi_cntl);
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MBED_ASSERT(obj->spi != (SPIName)NC);
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spiobj->spi = (SPIName)pinmap_merge(spi_data, spi_cntl);
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MBED_ASSERT(spiobj->spi != (SPIName)NC);
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// Enable SPI clock
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if (obj->spi == SPI_1) {
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if (spiobj->spi == SPI_1) {
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__HAL_RCC_SPI1_CLK_ENABLE();
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spiobj->spiIRQ = SPI1_IRQn;
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}
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if (obj->spi == SPI_2) {
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if (spiobj->spi == SPI_2) {
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__HAL_RCC_SPI2_CLK_ENABLE();
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spiobj->spiIRQ = SPI2_IRQn;
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}
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#if defined SPI3_BASE
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if (obj->spi == SPI_3) {
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if (spiobj->spi == SPI_3) {
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__HAL_RCC_SPI3_CLK_ENABLE();
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spiobj->spiIRQ = SPI3_IRQn;
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}
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#endif
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#if defined SPI4_BASE
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if (obj->spi == SPI_4) {
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if (spiobj->spi == SPI_4) {
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__HAL_RCC_SPI4_CLK_ENABLE();
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spiobj->spiIRQ = SPI4_IRQn;
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}
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#endif
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#if defined SPI5_BASE
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if (obj->spi == SPI_5) {
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if (spiobj->spi == SPI_5) {
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__HAL_RCC_SPI5_CLK_ENABLE();
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spiobj->spiIRQ = SPI5_IRQn;
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}
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#endif
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#if defined SPI6_BASE
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if (obj->spi == SPI_6) {
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if (spiobj->spi == SPI_6) {
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__HAL_RCC_SPI6_CLK_ENABLE();
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spiobj->spiIRQ = SPI6_IRQn;
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}
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#endif
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@ -118,21 +151,23 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
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pinmap_pinout(miso, PinMap_SPI_MISO);
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pinmap_pinout(sclk, PinMap_SPI_SCLK);
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// Save new values
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obj->bits = SPI_DATASIZE_8BIT;
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obj->cpol = SPI_POLARITY_LOW;
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obj->cpha = SPI_PHASE_1EDGE;
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obj->br_presc = SPI_BAUDRATEPRESCALER_256;
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// Save default values
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spiobj->bits = 8;
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spiobj->mode = SPI_MODE_MASTER;
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obj->pin_miso = miso;
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obj->pin_mosi = mosi;
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obj->pin_sclk = sclk;
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obj->pin_ssel = ssel;
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spiobj->cpol = SPI_POLARITY_LOW;
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spiobj->cpha = SPI_PHASE_1EDGE;
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spiobj->br_presc = SPI_BAUDRATEPRESCALER_256;
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spiobj->pin_miso = miso;
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spiobj->pin_mosi = mosi;
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spiobj->pin_sclk = sclk;
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spiobj->pin_ssel = ssel;
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if (ssel != NC) {
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pinmap_pinout(ssel, PinMap_SPI_SSEL);
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} else {
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obj->nss = SPI_NSS_SOFT;
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spiobj->nss = SPI_NSS_SOFT;
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}
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init_spi(obj);
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@ -140,20 +175,28 @@ void spi_init(spi_t *obj, PinName mosi, PinName miso, PinName sclk, PinName ssel
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void spi_free(spi_t *obj)
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{
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struct spi_s *spiobj = SPI_S(obj);
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SPI_HandleTypeDef *handle = &(spiobj->handle);
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DEBUG_PRINTF("spi_free\r\n");
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__HAL_SPI_DISABLE(handle);
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HAL_SPI_DeInit(handle);
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// Reset SPI and disable clock
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if (obj->spi == SPI_1) {
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if (spiobj->spi == SPI_1) {
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__HAL_RCC_SPI1_FORCE_RESET();
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__HAL_RCC_SPI1_RELEASE_RESET();
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__HAL_RCC_SPI1_CLK_DISABLE();
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}
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if (obj->spi == SPI_2) {
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if (spiobj->spi == SPI_2) {
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__HAL_RCC_SPI2_FORCE_RESET();
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__HAL_RCC_SPI2_RELEASE_RESET();
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__HAL_RCC_SPI2_CLK_DISABLE();
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}
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#if defined SPI3_BASE
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if (obj->spi == SPI_3) {
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if (spiobj->spi == SPI_3) {
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__HAL_RCC_SPI3_FORCE_RESET();
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__HAL_RCC_SPI3_RELEASE_RESET();
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__HAL_RCC_SPI3_CLK_DISABLE();
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@ -161,7 +204,7 @@ void spi_free(spi_t *obj)
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#endif
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#if defined SPI4_BASE
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if (obj->spi == SPI_4) {
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if (spiobj->spi == SPI_4) {
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__HAL_RCC_SPI4_FORCE_RESET();
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__HAL_RCC_SPI4_RELEASE_RESET();
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__HAL_RCC_SPI4_CLK_DISABLE();
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@ -169,7 +212,7 @@ void spi_free(spi_t *obj)
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#endif
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#if defined SPI5_BASE
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if (obj->spi == SPI_5) {
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if (spiobj->spi == SPI_5) {
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__HAL_RCC_SPI5_FORCE_RESET();
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__HAL_RCC_SPI5_RELEASE_RESET();
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__HAL_RCC_SPI5_CLK_DISABLE();
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@ -177,7 +220,7 @@ void spi_free(spi_t *obj)
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#endif
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#if defined SPI6_BASE
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if (obj->spi == SPI_6) {
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if (spiobj->spi == SPI_6) {
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__HAL_RCC_SPI6_FORCE_RESET();
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__HAL_RCC_SPI6_RELEASE_RESET();
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__HAL_RCC_SPI6_CLK_DISABLE();
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@ -185,45 +228,47 @@ void spi_free(spi_t *obj)
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#endif
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// Configure GPIOs
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pin_function(obj->pin_miso, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
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pin_function(obj->pin_mosi, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
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pin_function(obj->pin_sclk, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
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pin_function(obj->pin_ssel, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
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pin_function(spiobj->pin_miso, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
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pin_function(spiobj->pin_mosi, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
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pin_function(spiobj->pin_sclk, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
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if (spiobj->nss != SPI_NSS_SOFT) {
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pin_function(spiobj->pin_ssel, STM_PIN_DATA(STM_MODE_INPUT, GPIO_NOPULL, 0));
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}
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}
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void spi_format(spi_t *obj, int bits, int mode, int slave)
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{
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struct spi_s *spiobj = SPI_S(obj);
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DEBUG_PRINTF("spi_format, bits:%d, mode:%d, slave?:%d\r\n", bits, mode, slave);
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// Save new values
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if (bits == 16) {
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obj->bits = SPI_DATASIZE_16BIT;
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} else {
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obj->bits = SPI_DATASIZE_8BIT;
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}
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spiobj->bits = bits;
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switch (mode) {
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case 0:
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obj->cpol = SPI_POLARITY_LOW;
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obj->cpha = SPI_PHASE_1EDGE;
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spiobj->cpol = SPI_POLARITY_LOW;
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spiobj->cpha = SPI_PHASE_1EDGE;
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break;
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case 1:
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obj->cpol = SPI_POLARITY_LOW;
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obj->cpha = SPI_PHASE_2EDGE;
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spiobj->cpol = SPI_POLARITY_LOW;
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spiobj->cpha = SPI_PHASE_2EDGE;
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break;
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case 2:
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obj->cpol = SPI_POLARITY_HIGH;
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obj->cpha = SPI_PHASE_1EDGE;
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spiobj->cpol = SPI_POLARITY_HIGH;
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spiobj->cpha = SPI_PHASE_1EDGE;
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break;
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default:
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obj->cpol = SPI_POLARITY_HIGH;
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obj->cpha = SPI_PHASE_2EDGE;
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spiobj->cpol = SPI_POLARITY_HIGH;
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spiobj->cpha = SPI_PHASE_2EDGE;
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break;
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}
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if (obj->nss != SPI_NSS_SOFT) {
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obj->nss = (slave) ? SPI_NSS_HARD_INPUT : SPI_NSS_HARD_OUTPUT;
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if (spiobj->nss != SPI_NSS_SOFT) {
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spiobj->nss = (slave) ? SPI_NSS_HARD_INPUT : SPI_NSS_HARD_OUTPUT;
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}
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obj->mode = (slave) ? SPI_MODE_SLAVE : SPI_MODE_MASTER;
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spiobj->mode = (slave) ? SPI_MODE_SLAVE : SPI_MODE_MASTER;
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init_spi(obj);
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}
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@ -239,11 +284,14 @@ static const uint16_t baudrate_prescaler_table[] = {SPI_BAUDRATEPRESCALER_2,
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void spi_frequency(spi_t *obj, int hz)
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{
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struct spi_s *spiobj = SPI_S(obj);
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int spi_hz = 0;
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uint8_t prescaler_rank = 0;
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DEBUG_PRINTF("spi_frequency:%d\r\n", hz);
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/* Get source clock depending on SPI instance */
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switch ((int)obj->spi) {
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switch ((int)spiobj->spi) {
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case SPI_1:
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#if defined SPI4_BASE
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case SPI_4:
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@ -275,7 +323,7 @@ void spi_frequency(spi_t *obj, int hz)
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}
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if (prescaler_rank <= sizeof(baudrate_prescaler_table)/sizeof(baudrate_prescaler_table[0])) {
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obj->br_presc = baudrate_prescaler_table[prescaler_rank-1];
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spiobj->br_presc = baudrate_prescaler_table[prescaler_rank-1];
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} else {
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error("Couldn't setup requested SPI frequency");
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}
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@ -286,31 +334,35 @@ void spi_frequency(spi_t *obj, int hz)
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static inline int ssp_readable(spi_t *obj)
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{
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int status;
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SpiHandle.Instance = (SPI_TypeDef *)(obj->spi);
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struct spi_s *spiobj = SPI_S(obj);
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SPI_HandleTypeDef *handle = &(spiobj->handle);
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// Check if data is received
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status = ((__HAL_SPI_GET_FLAG(&SpiHandle, SPI_FLAG_RXNE) != RESET) ? 1 : 0);
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status = ((__HAL_SPI_GET_FLAG(handle, SPI_FLAG_RXNE) != RESET) ? 1 : 0);
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return status;
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}
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static inline int ssp_writeable(spi_t *obj)
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{
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int status;
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SpiHandle.Instance = (SPI_TypeDef *)(obj->spi);
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struct spi_s *spiobj = SPI_S(obj);
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SPI_HandleTypeDef *handle = &(spiobj->handle);
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// Check if data is transmitted
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status = ((__HAL_SPI_GET_FLAG(&SpiHandle, SPI_FLAG_TXE) != RESET) ? 1 : 0);
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status = ((__HAL_SPI_GET_FLAG(handle, SPI_FLAG_TXE) != RESET) ? 1 : 0);
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return status;
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}
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static inline void ssp_write(spi_t *obj, int value)
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{
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SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
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SPI_TypeDef *spi = SPI_INST(obj);
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while (!ssp_writeable(obj));
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spi->DR = (uint16_t)value;
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}
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static inline int ssp_read(spi_t *obj)
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{
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SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
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SPI_TypeDef *spi = SPI_INST(obj);
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while (!ssp_readable(obj));
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return (int)spi->DR;
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}
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@ -318,8 +370,10 @@ static inline int ssp_read(spi_t *obj)
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static inline int ssp_busy(spi_t *obj)
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{
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int status;
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SpiHandle.Instance = (SPI_TypeDef *)(obj->spi);
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status = ((__HAL_SPI_GET_FLAG(&SpiHandle, SPI_FLAG_BSY) != RESET) ? 1 : 0);
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struct spi_s *spiobj = SPI_S(obj);
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SPI_HandleTypeDef *handle = &(spiobj->handle);
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status = ((__HAL_SPI_GET_FLAG(handle, SPI_FLAG_BSY) != RESET) ? 1 : 0);
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return status;
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}
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@ -336,14 +390,14 @@ int spi_slave_receive(spi_t *obj)
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int spi_slave_read(spi_t *obj)
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{
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SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
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SPI_TypeDef *spi = SPI_INST(obj);
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while (!ssp_readable(obj));
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return (int)spi->DR;
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}
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void spi_slave_write(spi_t *obj, int value)
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{
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SPI_TypeDef *spi = (SPI_TypeDef *)(obj->spi);
|
||||
SPI_TypeDef *spi = SPI_INST(obj);
|
||||
while (!ssp_writeable(obj));
|
||||
spi->DR = (uint16_t)value;
|
||||
}
|
||||
|
|
@ -353,4 +407,221 @@ int spi_busy(spi_t *obj)
|
|||
return ssp_busy(obj);
|
||||
}
|
||||
|
||||
#ifdef DEVICE_SPI_ASYNCH
|
||||
typedef enum {
|
||||
SPI_TRANSFER_TYPE_NONE = 0,
|
||||
SPI_TRANSFER_TYPE_TX = 1,
|
||||
SPI_TRANSFER_TYPE_RX = 2,
|
||||
SPI_TRANSFER_TYPE_TXRX = 3,
|
||||
} transfer_type_t;
|
||||
|
||||
|
||||
/// @returns the number of bytes transferred, or `0` if nothing transferred
|
||||
static int spi_master_start_asynch_transfer(spi_t *obj, transfer_type_t transfer_type, const void *tx, void *rx, size_t length)
|
||||
{
|
||||
struct spi_s *spiobj = SPI_S(obj);
|
||||
SPI_HandleTypeDef *handle = &(spiobj->handle);
|
||||
bool is16bit = (handle->Init.DataSize == SPI_DATASIZE_16BIT);
|
||||
// the HAL expects number of transfers instead of number of bytes
|
||||
// so for 16 bit transfer width the count needs to be halved
|
||||
size_t words;
|
||||
|
||||
DEBUG_PRINTF("SPI inst=0x%8X Start: %u, %u\r\n", (int)handle->Instance, transfer_type, length);
|
||||
|
||||
obj->spi.transfer_type = transfer_type;
|
||||
|
||||
if (is16bit) words = length / 2;
|
||||
else words = length;
|
||||
|
||||
// enable the interrupt
|
||||
IRQn_Type irq_n = spiobj->spiIRQ;
|
||||
NVIC_ClearPendingIRQ(irq_n);
|
||||
NVIC_DisableIRQ(irq_n);
|
||||
NVIC_SetPriority(irq_n, 1);
|
||||
NVIC_EnableIRQ(irq_n);
|
||||
|
||||
// enable the right hal transfer
|
||||
static uint16_t sink;
|
||||
int rc = 0;
|
||||
switch(transfer_type) {
|
||||
case SPI_TRANSFER_TYPE_TXRX:
|
||||
rc = HAL_SPI_TransmitReceive_IT(handle, (uint8_t*)tx, (uint8_t*)rx, words);
|
||||
break;
|
||||
case SPI_TRANSFER_TYPE_TX:
|
||||
// TODO: we do not use `HAL_SPI_Transmit_IT`, since it has some unknown bug
|
||||
// and makes the HAL keep some state and then that fails successive transfers
|
||||
// rc = HAL_SPI_Transmit_IT(handle, (uint8_t*)tx, words);
|
||||
rc = HAL_SPI_TransmitReceive_IT(handle, (uint8_t*)tx, (uint8_t*)&sink, 1);
|
||||
length = is16bit ? 2 : 1;
|
||||
break;
|
||||
case SPI_TRANSFER_TYPE_RX:
|
||||
// the receive function also "transmits" the receive buffer so in order
|
||||
// to guarantee that 0xff is on the line, we explicitly memset it here
|
||||
memset(rx, SPI_FILL_WORD, length);
|
||||
rc = HAL_SPI_Receive_IT(handle, (uint8_t*)rx, words);
|
||||
break;
|
||||
default:
|
||||
length = 0;
|
||||
}
|
||||
|
||||
if (rc) {
|
||||
DEBUG_PRINTF("SPI: RC=%u\n", rc);
|
||||
length = 0;
|
||||
}
|
||||
|
||||
return length;
|
||||
}
|
||||
|
||||
// asynchronous API
|
||||
void spi_master_transfer(spi_t *obj, const void *tx, size_t tx_length, void *rx, size_t rx_length, uint8_t bit_width, uint32_t handler, uint32_t event, DMAUsage hint)
|
||||
{
|
||||
struct spi_s *spiobj = SPI_S(obj);
|
||||
SPI_HandleTypeDef *handle = &(spiobj->handle);
|
||||
|
||||
// TODO: DMA usage is currently ignored
|
||||
(void) hint;
|
||||
|
||||
// check which use-case we have
|
||||
bool use_tx = (tx != NULL && tx_length > 0);
|
||||
bool use_rx = (rx != NULL && rx_length > 0);
|
||||
bool is16bit = (handle->Init.DataSize == SPI_DATASIZE_16BIT);
|
||||
|
||||
// don't do anything, if the buffers aren't valid
|
||||
if (!use_tx && !use_rx)
|
||||
return;
|
||||
|
||||
// copy the buffers to the SPI object
|
||||
obj->tx_buff.buffer = (void *) tx;
|
||||
obj->tx_buff.length = tx_length;
|
||||
obj->tx_buff.pos = 0;
|
||||
obj->tx_buff.width = is16bit ? 16 : 8;
|
||||
|
||||
obj->rx_buff.buffer = rx;
|
||||
obj->rx_buff.length = rx_length;
|
||||
obj->rx_buff.pos = 0;
|
||||
obj->rx_buff.width = obj->tx_buff.width;
|
||||
|
||||
obj->spi.event = event;
|
||||
|
||||
DEBUG_PRINTF("SPI: Transfer: %u, %u\n", tx_length, rx_length);
|
||||
|
||||
// register the thunking handler
|
||||
IRQn_Type irq_n = spiobj->spiIRQ;
|
||||
NVIC_SetVector(irq_n, (uint32_t)handler);
|
||||
|
||||
// enable the right hal transfer
|
||||
if (use_tx && use_rx) {
|
||||
// transfer with the min(tx, rx), then later either transmit _or_ receive the remainder
|
||||
size_t size = (tx_length < rx_length)? tx_length : rx_length;
|
||||
spi_master_start_asynch_transfer(obj, SPI_TRANSFER_TYPE_TXRX, tx, rx, size);
|
||||
} else if (use_tx) {
|
||||
spi_master_start_asynch_transfer(obj, SPI_TRANSFER_TYPE_TX, tx, NULL, tx_length);
|
||||
} else if (use_rx) {
|
||||
spi_master_start_asynch_transfer(obj, SPI_TRANSFER_TYPE_RX, NULL, rx, rx_length);
|
||||
}
|
||||
}
|
||||
|
||||
uint32_t spi_irq_handler_asynch(spi_t *obj)
|
||||
{
|
||||
// use the right instance
|
||||
struct spi_s *spiobj = SPI_S(obj);
|
||||
SPI_HandleTypeDef *handle = &spiobj->handle;
|
||||
int event = 0;
|
||||
|
||||
// call the CubeF4 handler, this will update the handle
|
||||
HAL_SPI_IRQHandler(handle);
|
||||
|
||||
if (HAL_SPI_GetState(handle) == HAL_SPI_STATE_READY) {
|
||||
// adjust buffer positions
|
||||
size_t tx_size = (handle->TxXferSize - handle->TxXferCount);
|
||||
size_t rx_size = (handle->RxXferSize - handle->RxXferCount);
|
||||
// 16 bit transfers need to be doubled to get bytes
|
||||
if (handle->Init.DataSize == SPI_DATASIZE_16BIT) {
|
||||
tx_size *= 2;
|
||||
rx_size *= 2;
|
||||
}
|
||||
// adjust buffer positions
|
||||
if (obj->spi.transfer_type != SPI_TRANSFER_TYPE_RX) {
|
||||
obj->tx_buff.pos += tx_size;
|
||||
}
|
||||
if (obj->spi.transfer_type != SPI_TRANSFER_TYPE_TX) {
|
||||
obj->rx_buff.pos += rx_size;
|
||||
}
|
||||
|
||||
if (handle->TxXferCount > 0) {DEBUG_PRINTF("SPI: TxXferCount: %u\n", handle->TxXferCount);}
|
||||
if (handle->RxXferCount > 0) {DEBUG_PRINTF("SPI: RxXferCount: %u\n", handle->RxXferCount);}
|
||||
|
||||
int error = HAL_SPI_GetError(handle);
|
||||
if(error != HAL_SPI_ERROR_NONE) {
|
||||
// something went wrong and the transfer has definitely completed
|
||||
event = SPI_EVENT_ERROR | SPI_EVENT_INTERNAL_TRANSFER_COMPLETE;
|
||||
|
||||
if (error & HAL_SPI_ERROR_OVR) {
|
||||
// buffer overrun
|
||||
event |= SPI_EVENT_RX_OVERFLOW;
|
||||
}
|
||||
} else {
|
||||
// figure out if we need to transfer more data:
|
||||
if (obj->tx_buff.pos < obj->tx_buff.length) {
|
||||
//DEBUG_PRINTF("t%u ", obj->tx_buff.pos);
|
||||
// we need to transfer more data
|
||||
spi_master_start_asynch_transfer(obj, SPI_TRANSFER_TYPE_TX,
|
||||
obj->tx_buff.buffer + obj->tx_buff.pos, // offset the initial buffer by the position
|
||||
NULL, // there is no receive buffer
|
||||
obj->tx_buff.length - obj->tx_buff.pos); // transfer the remaining bytes only
|
||||
} else if (obj->rx_buff.pos < obj->rx_buff.length) {
|
||||
//DEBUG_PRINTF("r%u ", obj->rx_buff.pos);
|
||||
// we need to receive more data
|
||||
spi_master_start_asynch_transfer(obj, SPI_TRANSFER_TYPE_RX,
|
||||
NULL, // there is no transmit buffer
|
||||
obj->rx_buff.buffer + obj->rx_buff.pos, // offset the initial buffer by the position
|
||||
obj->rx_buff.length - obj->rx_buff.pos); // transfer one byte at a time, until we received everything
|
||||
} else {
|
||||
// everything is ok, nothing else needs to be transferred
|
||||
event = SPI_EVENT_COMPLETE | SPI_EVENT_INTERNAL_TRANSFER_COMPLETE;
|
||||
DEBUG_PRINTF("SPI: Done: %u, %u\n", obj->tx_buff.pos, obj->rx_buff.pos);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (event) DEBUG_PRINTF("SPI: Event: 0x%x\n", event);
|
||||
|
||||
return (event & (obj->spi.event | SPI_EVENT_INTERNAL_TRANSFER_COMPLETE));
|
||||
}
|
||||
|
||||
uint8_t spi_active(spi_t *obj)
|
||||
{
|
||||
struct spi_s *spiobj = SPI_S(obj);
|
||||
SPI_HandleTypeDef *handle = &(spiobj->handle);
|
||||
HAL_SPI_StateTypeDef state = HAL_SPI_GetState(handle);
|
||||
|
||||
switch(state) {
|
||||
case HAL_SPI_STATE_RESET:
|
||||
case HAL_SPI_STATE_READY:
|
||||
case HAL_SPI_STATE_ERROR:
|
||||
return 0;
|
||||
default:
|
||||
return 1;
|
||||
}
|
||||
}
|
||||
|
||||
void spi_abort_asynch(spi_t *obj)
|
||||
{
|
||||
struct spi_s *spiobj = SPI_S(obj);
|
||||
SPI_HandleTypeDef *handle = &(spiobj->handle);
|
||||
|
||||
// disable interrupt
|
||||
IRQn_Type irq_n = spiobj->spiIRQ;
|
||||
NVIC_ClearPendingIRQ(irq_n);
|
||||
NVIC_DisableIRQ(irq_n);
|
||||
|
||||
// clean-up
|
||||
__HAL_SPI_DISABLE(handle);
|
||||
HAL_SPI_DeInit(handle);
|
||||
HAL_SPI_Init(handle);
|
||||
__HAL_SPI_ENABLE(handle);
|
||||
}
|
||||
|
||||
#endif //DEVICE_SPI_ASYNCH
|
||||
|
||||
#endif
|
||||
|
|
|
|||
Loading…
Reference in New Issue