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6372 Commits (b140fd0766e959b755fa791749b1b81bda82cbcd)

Author SHA1 Message Date
Martin Kojtal b140fd0766
Merge pull request #12369 from hugueskamba/hk-fixlpc1768-baremetal 
LPC1768: Fix ARM toolchain baremetal by defining 2 memory region
 2020-02-05 11:26:57 +00:00
Martin Kojtal 841b846b46
Merge pull request #12362 from ABOSTM/L0_CUBE_HAL_REWORK_NO_MORE_OVERRUN 
TARGET_STM: L0 CUBE SPI async mode send next byte after previous one is read
 2020-02-05 10:17:13 +00:00
Hugues Kamba 193e49c6b7 LPC1768: Fix ARM toolchain baremetal by defining 2 memory region 
The changes are based on the scatter file in TOOLCHAIN_ARM_MICRO
 2020-02-05 08:50:11 +00:00
Martin Kojtal b33573ed27
Merge pull request #12317 from NXPmicro/MXRT_FlashSupport 
MXRT1050 Flash support
 2020-02-04 15:25:22 +00:00
Martin Kojtal cee2a352a7
Merge pull request #12357 from ABOSTM/F103_ADC3_NOT_SUPPORTING_COMMON_SETTINGS 
TARGET_STM32F1: don't set ADC common register when ADC doesn't support it
 2020-02-04 15:24:51 +00:00
Alexandre Bourdiol 315220832f TARGET_STM: L0 CUBE SPI async mode send next byte after previous one read 
In STM32 Cube HAL, in interrupt mode (async),
2 bytes can be prepared in hardware registers without any read
(1 in regular register, the other in shift register),
but Only 1 RX byte can stored in hardware register, specially when there is no hardware FIFO.
If interrupt handling is fast enough, each read is made in parralele of the write.
But if interrupt handling is too long or is interrupted for too long,
it can happen that one read byte is lost (overrun).
For STM32F4, Tickless has been deactivated to avoid such issue.
For STM32L0, we don't want to deactivate tickless,
because those chips are specially design for lowpower.

So instead of removing SPI async mode,
we propose to change the HAL behavior specially for L0:
each byte is send only when previous read is performed.
Thus only 1 RX byte at a time which is saved in hardware register.
This prevent overrun, but it introduceS some latency between each byte send,
this is why it is not applied to all STM32 families.
 2020-02-04 13:26:49 +01:00
Martin Kojtal f73a62afbf
Merge pull request #12356 from mprse/NRF_gipo_irq_fix 
Fix NRF51, NRF52 gpio_irq_init() function
 2020-02-04 10:09:12 +00:00
Martin Kojtal c63daa5fb8
Merge pull request #12355 from panmasuo/hani_iot_new_target 
HANI_IOT: add new target board support
 2020-02-04 08:37:12 +00:00
Mahesh Mahadevan b5eb7bc9a9 MIMXRT1050: Enable FlashIAP support 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2020-02-03 12:23:59 -06:00
Mahesh Mahadevan fa3a72e716 MIMXRT1050: Reduce NOR size used by mbed-os 
Reserve 4MB for mbed-os. The rest is used by storage driver

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2020-02-03 12:23:59 -06:00
Mahesh Mahadevan 42a90cc8b0 MXRT1050: Add support for Flash driver 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2020-02-03 12:23:59 -06:00
Martin Kojtal 250e58134f
Merge pull request #12286 from pea-pod/target-nucleo_l452re-p 
Add new target: NUCLEO_L452RE-P
 2020-02-03 16:34:36 +00:00
Martin Kojtal 443802a1a7
Merge pull request #12353 from OpenNuvoton/nuvoton_m2351_iar 
M2351: Support IAR
 2020-02-03 15:13:34 +00:00
Alexandre Bourdiol 03b03feb8d TARGET_STM32F1: don't set ADC common register when ADC doesn't support it 
STM32F103ZE: ADC3 doesn't support common settings.
__LL_ADC_COMMON_INSTANCE(ADC3) returns 0
 2020-02-03 15:56:49 +01:00
Pawel Zarembski 66d729af9a hani_iot: add SPDX identifier to all new ARM copyrighted files 2020-02-03 15:54:59 +01:00
Pawel Zarembski 4934e4f248 hani_iot: update licenses dates, remove unnecessary comment 2020-02-03 15:26:59 +01:00
Przemyslaw Stekiel 575f9c2d64 Fix NRF51, NRF52 gpio_irq_init() function 
Acording to the description in `gpio_irq_hal_api.h` file `gpio_irq_init()` should return 0 on success.
Currently, it returns 1 causing the FPGA test to fail.
 2020-02-03 14:23:41 +01:00
Pawel Zarembski 620442305f hani_iot: add spif storage config 2020-02-03 14:03:09 +01:00
Pawel Zarembski 9ee212a1e7 hani_iot: add target files and update targets.json 2020-02-03 14:03:09 +01:00
Martin Kojtal 0f4a9867be
Merge pull request #12332 from jamesbeyond/analogIn_fix 
FIX: Disable Analogin D13(PA_5) on some NUCLEO targets
 2020-02-03 12:44:07 +00:00
Qinghao Shi f7d9850fe7 Disable Analogin D13(PA_5) on some NUCLEO targets 
- pins are connected to the LED, can't be used as analogin
 2020-02-03 11:39:31 +00:00
Martin Kojtal 02c5e0806f
Merge pull request #12350 from maciejbocianski/fix_fpga_i2c_test 
implements i2c_free for STM
 2020-02-03 09:56:59 +00:00
Mahesh Mahadevan e46e48249a MXRT1050: Update Flexspi driver to move functions to RAM 
These functions are used to READ/WRITE to the Flexspi NOR

Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2020-02-01 07:59:24 -06:00
Kevin Bracey 236c336526
Merge pull request #12299 from NXPmicro/MXRT_WDOG 
MIMXRT1050: Add Watchdog support
 2020-01-31 16:25:22 +02:00
Maciej Bocianski 0b634e54b4 implement i2c_free for STM family 2020-01-31 14:51:54 +01:00
Maciej Bocianski 95996fb924 disable PA_8 i2c pin on NUCLEO_F411RE 
pin PA_8 by default is connected to MCO
 2020-01-31 14:48:00 +01:00
Kevin Bracey ba5dd4d8c1
Merge pull request #12153 from mprse/spi_fpga_test_extend 
Hackathon: Increase coverage of the SPI master FPGA test
 2020-01-31 15:00:02 +02:00
Kevin Bracey 44add981ff
Merge pull request #12331 from jeromecoutant/PR_OSPI 
STM32: enable QSPI test with MX25LM51245G octo SPI
 2020-01-30 15:46:52 +02:00
Kevin Bracey c8d7778235
Merge pull request #12324 from dustin-crossman/pr/fix-cypress-crc-reversal 
Fix inconsistency between mbed crc and psoc6 crc implementations.
 2020-01-30 13:40:25 +02:00
Chun-Chieh Li 94762d02a1 M2351: Support IAR 
1.  Enable IAR on non-secure targets
2.  Disable IAR on secure targets because:
    (1) IAR toolchain bug: As of IAR 8.32, cmse_nonsecure_caller() is not always inlined.
    (2) TFM hasn't supported IAR yet.
 2020-01-30 13:12:31 +08:00
Chun-Chieh Li 152f6f1975 M2351: Refine MBED_TZ_DEFAULT_ACCESS placement 
1.  On M2351, SYS/CLK registers are hard-wired to secure. Define MBED_TZ_DEFAULT_ACCESS to 1 so that all non-secure user threads have access to call secure functions to control these registers.
2.  MBED_TZ_DEFAULT_ACCESS is only meaningful for non-secure target. Define it only for non-secure target in targets.json.
3.  On TFM target, MBED_TZ_DEFAULT_ACCESS has defined in mbed_lib.json. Avoid duplicate definition which IAR assembler doesn't allow.
 2020-01-30 13:12:29 +08:00
jeromecoutant 84b48410f0 STM32: enable QSPI test with MX25LM51245G octo SPI 2020-01-29 16:18:38 +01:00
Kevin Bracey 91464b2729
Merge pull request #12306 from jeromecoutant/PR_STM32L5_NUCLEO 
STM32L5: NUCLEO-L552ZE-Q new target
 2020-01-29 16:07:44 +02:00
pea-pod f7c4693747 Add new target: NUCLEO_L452RE-P 2020-01-27 18:41:18 -06:00
Anna Bridge ceaf562a11
Merge pull request #12283 from jeromecoutant/PR_STM32WB 
STM32WB - Update CubeDriver from v1.0.0 to v1.4.0
 2020-01-25 11:54:29 +00:00
Anna Bridge f45a5a78b5
Merge pull request #12231 from devran01/upd_musca_a 
Import latest python scripts and MCUBoot image
 2020-01-25 11:53:34 +00:00
Dustin Crossman b204dfd943 Fix inconsistency between mbed crc and psoc6 crc implementations. 2020-01-24 18:23:25 +00:00
Mahesh Mahadevan 72bd899e02 MIMXRT1050: Add Watchdog support 
Signed-off-by: Mahesh Mahadevan <mahesh.mahadevan@nxp.com>
 2020-01-24 07:24:46 -06:00
Anna Bridge 6e762a2850
Merge pull request #12210 from mprse/disable_lp_ticker_stm_no_lse 
Fix for issue #10725: disable lp-ticker for STM targets which uses RTC/LSI for lp-ticker
 2020-01-24 11:22:57 +00:00
Anna Bridge 0d48a26f82
Merge pull request #12154 from hugueskamba/hk-baremetal-nrf51822-fix 
NRF51822: Fix baremetal linker error
 2020-01-24 11:21:25 +00:00
jeromecoutant e4d0629d18 STM32L5 : Introduce NUCLEO_L552ZE_Q board 2020-01-23 17:55:07 +01:00
jeromecoutant c1386cf52d STM32L5 : update generic STM files for L5 2020-01-23 17:54:55 +01:00
jeromecoutant bee5d44a1f STM32L5: add API L5 family files 2020-01-23 17:54:52 +01:00
jeromecoutant 5d59c99b99 STM32L5: TOOLCHAIN automatic updates 2020-01-23 17:54:41 +01:00
jeromecoutant 77e5bb45b9 STM32L5: STM32Cube_FW_L5_V1.0.0 files 2020-01-23 13:30:31 +01:00
Anna Bridge d984480f08
Merge pull request #12295 from jeromecoutant/PR_PR_H7_TIM17 
STM32H7 correct PWMOUT instances
 2020-01-23 11:50:44 +00:00
jeromecoutant 25da13bc18 STM32WB remove extra file 2020-01-23 10:53:09 +01:00
PARKJIHOON 8b0fb5f5bd comments the performance of TRNG 
Signed-off-by: PARKJIHOON <jh6186.park@samsung.com>
 2020-01-22 14:40:51 +09:00
PARKJIHOON 3ba075b57b Tidy up comments 
Signed-off-by: PARKJIHOON <jh6186.park@samsung.com>
 2020-01-22 14:40:51 +09:00
PARKJIHOON 4ef74efed0 fix typo 'modifyh' 
Signed-off-by: PARKJIHOON <jh6186.park@samsung.com>
 2020-01-22 14:40:51 +09:00