Enable the Watchdog Timer for the low-power stop modes of operation,
including the VLPS used in deepsleep.
Enable the Watchdog Timer for the Debug mode.
The proposed review fixes by Jerome, cherry-picked in.
(cherry picked from commit fb15f023a9b7b679301b45eaa160ae8cb2e1f23c)
Signed-off-by: Janne Kiiskila <janne.kiiskila@arm.com>
Updated Serial Flash interface & Network buffer classes to avoid warnings and improve robustness. Fixed issue with mbed_overrides trying to use an old implementation of cy_serial_flash_init() function.
Protocols like mdns requires IPv6 link local address to be advertised in its
records (AAAA record). LWIP::Interface::bringup() API is creating IPv6 link
local address;But as of now there is no API exposed by mbed-os to get the
IPv6 link local address.
This new API is required to deliver mDNS library support on mbed-os for Cypress
platforms. Unit tested it by invoking get_ipv6_link_local_address with a simple
application.
- Enable FLASHIAP for all H7 boards
- Use "TDB_INTERNAL" for all H7 boards
- Define specific internal_base_address only for DISCO_H747I_CM7
(default address is the end of FLASH which is correct for other H7 boards)
- Correct GetSectorBase function with Dual Bank information
Implementation of pwmout_read() is not consistent with the requirements.
This function should return the current float-point output duty-cycle in range <0.0f, 1.0f>.
Currently it returns decimal percentage value.
Analogin test fails on D13(PA_5) pin. When logic one (3.3V) is provided on this pin ADC reads 0.86 value. On other pins we got 0.98.
This is caused because this pin is connected to led2.
This copies the approach of the STM32F7 flash driver submitted via
PR https://github.com/ARMmbed/mbed-os/pull/10248
With this change the board finally passes all of the device key
tests 10/10 times correctly.
Recent measurements have shown that the total wake-up latency can be more
than the 3ms initially set. It was measured as 3,7ms on DISCO_L475VG_IOT01A
target and 3,1ms on NUCLEO_L073RZ target. So set it to 4ms to be on the
safe side.
i2c_byte_write implementation was broken.
Data sending was inside addressing block
Changed from:
i2c_byte_write
{
if (start) {
if (read_address)
start read;
esle
start write;
write byte;
}
}
to:
i2c_byte_write
{
if (start) {
// if first call after start
// address for reading or writing
if (read_address)
start read;
esle
start write;
} else {
// send data byte
write byte;
}
}
This is to meet platform name 'NU_PFM_M2351' registered in mbed-os-tools. This tool
uses the platform name as a key to search platform related properties in targets.json.
For example, the property 'forced_reset_timeout' is critical for Greentea test.
ARM Compiler 6.13 testing revealed linker errors pointing out
conflicting use of `__user_setup_stackheap` and
`__user_initial_stackheap` in some targets. Remove the unwanted
`__user_initial_stackheap` from the targets - the setup is
centralised in the common platform code.
Looking into this, a number of other issues were highlighted
* Almost all targets had `__initial_sp` hardcoded in assembler,
rather than getting it from the scatter file. This was behind
issue #11313. Fix this generally.
* A few targets' `__initial_sp` values did not match the scatter
file layout, in some cases meaning they were overlapping heap
space. They now all use the area reserved in the scatter file.
If any problems are seen, then there is an error in the
scatter file.
* A number of targets were reserving unneeded space for heap and
stack in their startup assembler, on top of the space reserved in
the scatter file, so wasting a few K. A couple were using that
space for the stack, rather than the space in the scatter file.
To clarify expected behaviour:
* Each scatter file contains empty regions `ARM_LIB_HEAP` and
`ARM_LIB_STACK` to reserve space. `ARM_LIB_STACK` is sized
by the macro `MBED_BOOT_STACK_SIZE`, which is set by the tools.
`ARM_LIB_HEAP` is generally the space left over after static
RAM and stack.
* The address of the end of `ARM_LIB_STACK` is written into the
vector table and on reset the CPU sets MSP to that address.
* The common platform code in Mbed OS provides `__user_setup_stackheap`
for the ARM library. The ARM library calls this during startup, and
it calls `__mbed_user_setup_stackheap`.
* The default weak definition of `__mbed_user_setup_stackheap` does not
modify SP, so we remain on the boot stack, and the heap is set to
the region described by `ARM_LIB_HEAP`. If `ARM_LIB_HEAP` doesn't
exist, then the heap is the space from the end of the used data in
`RW_IRAM1` to the start of `ARM_LIB_STACK`.
* Targets can override `__mbed_user_setup_stackheap` if they want.
Currently only Renesas (ARMv7-A class) devices do.
* If microlib is in use, then it doesn't call `__user_setup_stackheap`.
Instead it just finds and uses `ARM_LIB_STACK` and `ARM_LIB_HEAP`
itself.
Notes:
- CRC and TRNG are disabled on this board since the MCU on this board does not have the required hardware.
- QSPI and QSPIF are temporarily removed due to issues related to supporting the new S25FS512S flash chip we have on this board. These will be enabled as soon as we can get the issues resolved.
https://github.com/ARMmbed/mbed-os/issues/11722
None of the USB drivers currently support entering deep sleep mode
while USB is active. To protect USB from malfunctioning lock deep
sleep in USBPhyHw::init.This is done for similar
This was done for all other implementations as part of
https://github.com/ARMmbed/mbed-os/commit/8ffbe5c6033
- Use a switch statement rather than shifting and masking to compute
the AlternateBytes value.
- Rename rounded_size to alt_bytes to clarify its purpose.
The port configuration api was not correctly setting the port-pins'
direction. Changed the port driver to call the gpio driver for
configuration (read and write still are optimized for port-level
operations) so that the behavior is consistent.
The TC flag is used in function serial_is_tx_ongoing to check if there is
an ongoing serial transmission. So this Flag must not be cleared at the
end of the transmission, otherwise, serial_is_tx_ongoing will notify that
TX is ongoing.
The impact is that it may prevent deep sleep to be entered.
Also there is no need to clear this flag at the end of the transaction
because it will be cleared automatically by HW when a new transmission
starts.
Add 2 targets for DISCO_H747I dualcore:
* DISCO_H747I -> for CM7 core
* DISCO_H747I_CM4 -> for CM4 core
Current restrictions:
* TICKLESS deactivated
* DeepSleep not supported (DeepSleep wrapped to sleep)
Warning: use of the same IP (example I2C1) by both core at the same time is not prevented,
but is strongly not recommended.
Some Hardware Semaphore are use for common IP, to manage concurrent access by both cores: Flash, GPIO, RCC.
Warning: Drag and drop of binary to DISCO_H747I will flash CM7.
In order to flash CM4, one can use STM32 CubeProgrammer tool.