This commit changes the conversion function to do all the calculation
inside the HAL in ticks instead of microseconds.
The conversion will be done in Mbed OS side.
As SystemCoreClock is not a constant, it can not be used to initialise
the ticker_info_t structure.
Change-Id: I8fd4bf20dc5be8b965aca45f800a631275ccc724
Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
This commit changes the code to fix the compiler warnings on ARM,
GCC_ARM and IAR.
Change-Id: I92676d2cc85daacde9f43f1898377a2cea750c50
Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
This commit changes the clock frequency to the good value of 25 MHz.
Change-Id: I18e559718619e3b1942c42fda2413b690c7b5852
Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
This commit does not bring functional changes.
Here is the list of changes:
- merge CMSDK_CM3DS.h and SMM_MPS2.h into CM3DS.h
- remove unused code
- split copyright headers from first comment of each file
Change-Id: I79b7ee01689439b7d2fde9d13035a5edf17f69ff
Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
This patchs adds TRNG support using the upstreamed, open-source, TZ-TRNG
driver.
It also implements the HAL for TRNG and add it in features.
The mbed-os.py script deletes files that are unused by mbed-os.
Change-Id: Idf8eefd809f00d40e0ad3cf7657f2a8c2eca3505
Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
This patch changes the linker files and defines to use the ZBT SSRAM
instead of the FPGA Block RAM for code and data.
The section 4.1.1, Code and RAM memory map, of the CM3DS Eval RTL and
testbench user guide explains the available memories.
This switch improves code memory from 256 kB to 4 MB and data memory
from 128 kB to 4 MB.
However, the ZBT SSRAM1 for code memory begins at 0x00400000 while the
processor can only boot at address 0x00000000 which means that it
expects the vector table to be at that address. That is why we have to
create 2 load regions in the linker scripts: one with only the vector
table at address 0x0 and one with code + data at address 0x00400000.
Because of these two load regions, linker will produce different
behaviours:
* GCC_ARM and IAR will only create 1 binary with both load regions
padding with 0 in between. The binary will then be very large (at least
4 MB) and the flash process will take longer.
* ARM and ARMC6 will create 2 binaries for the two load regions. The
load addresses of the two binaries can be written in the images.txt file
on the MPS2 board. You can also use the --bincombined option of fromelf
utility to produce only 1 large binary.
This patch also adds the memory_zones.h file to try to put in common all
the memory addresses that were previously hard coded in the linker
scripts / startup files.
With that patch in, the simplest option is to directly use the .elf file
with the MPS2, which is only possible with mbb_v225.ebf and more recent
firmwares. It will now be the default for CM3DS.
This commit works with greentea thanks to the now merged pull request
ARMmbed/htrun#181 in order to copy .elf file to the MPS2 board.
Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
Few targets need more than just pending IRQ set. They include some flags to be
set that are checked in IRQ handler. This is the case for targets in this
commit.
This commit adds the UART driver and updates the UART HAL implementation
to use this driver.
It also removes legacy definitions.
Change-Id: Ie8e7a7bb64c763a2d97bc66d949fab3596736bbc
Signed-off-by: Avinash Mehta <avinash.mehta@arm.com>
This commit adds the SPI driver which is now called by the SPI HAL
implementation.
It also removes legacy definitions.
Change-Id: Iadb20dda9dfa571db3de66c3a1ce45d80d8b81b6
Signed-off-by: Tamas Kaman <tamas.kaman@arm.com>
This commit adds the GPIO drivers. The HAL implementations
(gpio_api.c, gpio_irq_api.c, port_api.c) now call these drivers.
Legacy definitions have been removed.
Serial HAL implementation has been changed to compile at this stage.
Change-Id: Ib76a3186358f5029ed350da671132e8aa11194f7
Signed-off-by: Galanakis, Minos <minos.galanakis@arm.com>
The HAL implementation (us_ticker.c and lp_ticker.c) now calls function
in cmsdk_ticker.c file. This file contains the necessary logic to be
able to only use one hardware timer (CMSDK timer) per mbed ticker.
This commit also updates the timer driver and removes legacy definition.
Change-Id: If40413822832117f9b78f38d2cdda7847284b035
Signed-off-by: Galanakis, Minos <minos.galanakis@arm.com>
Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
This patch changes the way data is put in the TX_DATA_PORT register when
sending packet over Ethernet.
When this driver is compiled with release compilation profile
(space optimization compiler options) with Arm compiler version 5,
the line:
SMSC9220->TX_DATA_PORT = *pktptr;
generates the assembly instruction to get the pktptr pointed value:
LDM r2!, {r3}
with pktptr = r2
However, the code does not prevent the pktptr value from being unaligned
(to a 32 bits boundary) in that zone and the LDM instruction causes a
HardFault if this is the case. When the compiler option is not activated
(debug and develop compilation profiles), the compiler generates LDR
instruction instead which does not cause a HardFault.
The ARM v7-M states page B3-601: "Unaligned load-store multiples and
word or halfword exclusive accesses always fault."
To face that problem, we check if the data pointer is aligned or not. If
it is, we apply the same algorithm than before. If not, a local variable
is created and we copy in it, byte per byte, the contents at the
unaligned pointer. However, it will impact performances adding 8
instructions (one LD and one ST for each copied byte).
Change-Id: I11f6e82ce5521960d2ecf499f718f76fec29c0b0
Signed-off-by: Hugues de Valon <hugues.devalon@arm.com>
fire_interrupt function should be used for events in the past. As we have now
64bit timestamp, we can figure out what is in the past, and ask a target to invoke
an interrupt immediately. The previous attemps in the target HAL tickers were not ideal, as it can wrap around easily (16 or 32 bit counters). This new
functionality should solve this problem.
set_interrupt for tickers in HAL code should not handle anything but the next match interrupt. If it was in the past is handled by the upper layer.
It is possible that we are setting next event to the close future, so once it is set it is already in the past. Therefore we add a check after set interrupt to verify it is in future.
If it is not, we fire interrupt immediately. This results in
two events - first one immediate, correct one. The second one might be scheduled in far future (almost entire ticker range),
that should be discarded.
The specification for the fire_interrupts are:
- should set pending bit for the ticker interrupt (as soon as possible),
the event we are scheduling is already in the past, and we do not want to skip
any events
- no arguments are provided, neither return value, not needed
- ticker should be initialized prior calling this function (no need to check if it is already initialized)
All our targets provide this new functionality, removing old misleading if (timestamp is in the past) checks.
This patch updates CMSDK_CM3DS.h to remove the
DMA peripheral memory map and defines, as
that peripheral is not present in the system.
In addition, some define names where updated
concerning rtc. RTC_api was updated accordingly.
This patch also updates SMM_MPS2 to align defines and
comments.
Signed-off-by: Marc Moreno <marc.morenoberengue@arm.com>
This patch implements pin_function and gpio_set
with some fixes in the PinNames.
The patch also updates the serial and spi
drivers to use the pin_function.
Signed-off-by: Marc Moreno <marc.morenoberengue@arm.com>
1. Add startup code and linker script for IAR and
GCC_ARM compilers.
2. Enable IAR and GCC_ARM compilers in targets.json.
Change-Id: I742a89ae73a4e5ede980a8af0821c3f0e5a461ef
Signed-off-by: Mate Toth-Pal <mate.toth-pal@arm.com>
Based on lwip_ethernetif.c skeleton file,
use init, receive and transfer
functionality of SMSC9220 Ethernet driver
for the lightweight IP stack.
Receive mechanism is interrupt driven.
HW buffer sizes:
Tx = 4608 bytes (MTU)
Rx = 10560 bytes
lwIP fine tuning:
mbed-os/features/FEATURE_LWIP/lwip-interface/lwip/src/include/lwip/opt.h
Change-Id: I0ea95650c65fb32cafb5c2d3dde11420c61dba66
Signed-off-by: Gabor Kertesz <gabor.kertesz@arm.com>
- Creates new target in targets.json
- Creates device specific files under ARM_SSG/CM3DS_MPS2 directory
- Driver layer files under CM3DS_MPS2 are based on Beid target
- Device specific files under CM3DS_MPS2/device are based on CMSIS_5 and Beetle
Change-Id: I29ea7a7f42b11cf25b516cce4b9255ab828ca019
Signed-off-by: Tamas Kaman <Tamas.Kaman@arm.com>
Signed-off-by: Marc Moreno <marc.morenoberengue@arm.com>
Restore cmsis_nvic (cmsis_nvic.c and cmsis_nvic.h) files for the
implementations which use a mechanism other than the VTOR to set
interrupts. These are vendor specific and were done for M0 devices
which do not have a VTOR.
Note - There were two cmsis_nvic files which did not use the VTOR that
which not restored in this patch. This is because these targets were
not M0 devices and could use the new unified implementation instead.
These files are:
targets\TARGET_ARM_SSG\TARGET_MPS2\TARGET_MPS2_M0P\device\cmsis_nvic.c
targets\TARGET_ONSEMI\TARGET_NCS36510\device\cmsis_nvic.c
Note - cmsis_nvic.c and cmsis_nvic.h were initial removed in
(and restored from) the commit:
b97ffe8fdc -
"CMSIS5: Replace target defined NVIC_Set/GetVector with CMSIS implementation"
There is an easy default implementation of spi_master_block_write that
just calls spi_master_write in a loop, so the default implementation
of spi_master_block_write has been added to all targets.
Karl Zhang
Bartek Szatkowski
Przemyslaw Stekiel
Martin Kojtal
Jimmy Brisson
Hugues de Valon
Cruz Monrreal
Amanda Butler
paul-szczepanek-arm
Cruz Monrreal
Martin Kojtal
Avinash Mehta
Tamas Kaman
Galanakis, Minos
Deepika
Marc Moreno Berengue
Sam Grove
mattot01
Tamas Ban
gabker01
Russ Butler
Christopher Haster