c74013e932
Merge pull request #4383 from snelson-senet/master
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#4354 Fix MOTE_L152RC GPIO Write
2017-05-26 16:27:25 -05:00
d11289b576
Merge pull request #4165 from adustm/can_init
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fix #3863 Add an mbed API that allows the init of the CAN at the bus frequency
2017-05-26 10:45:19 -05:00
58e88813a9
Merge pull request #4282 from kl-cruz/FlashAPI_nRF52840
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Flash api nRF52840
2017-05-26 10:31:05 -05:00
049402c39f
Merge pull request #4315 from theotherjimmy/thinkberg-master
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Add support for ubirch boards
2017-05-26 10:26:40 -05:00
e352f1b7f8
k64f: Added SPI block write using DSPI_MasterTransferBlocking
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performance improvements:
naive block writes 3.997Mbps
DSPI block writes 17.809Mbps
2017-05-25 12:08:39 -05:00
c1de19e49e
spi: Added default spi_master_block_write implementation to all targets
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There is an easy default implementation of spi_master_block_write that
just calls spi_master_write in a loop, so the default implementation
of spi_master_block_write has been added to all targets.
2017-05-25 12:04:58 -05:00
30579e8131
4354 Fix MOTE_L152RC GPIO Write
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Add #define GPI_IP_WITHOUT_BRR
2017-05-24 11:37:15 -04:00
a3f7d06101
Partially Revert "Remove Cortex A boards as Cortex-A it is not supported in CMSIS5/RTX2"
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This partially reverts commit e535493a01
2017-05-23 13:57:59 -05:00
da9b8f3dee
Move duplicated NRF52 + MCU_NRF51822 files into NRF52
2017-05-22 11:26:43 -05:00
0ca9a6b479
Merge pull request #4353 from theotherjimmy/fix-static-nrf5
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Add static to NRF5 SDK11 macro definition
2017-05-19 16:44:43 -05:00
e4739835ce
Add static to NRF5 SDK11 macro definition
2017-05-19 15:06:41 -05:00
5dc49b7d6c
STM32L4 replace deprecated macro name
2017-05-19 11:59:38 +02:00
5d0ce3c531
Merge pull request #4338 from andreaslarssonublox/ublox_odin_driver_os_5_v1.3_rc2
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u-blox ODIN driver v1.3 rc2 for mbed OS 5
2017-05-19 08:42:14 +01:00
a2a1581e2e
Merge pull request #4263 from Pliny/master
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stm32f4xx: Consider all DMA ready/busy states in conditionals
2017-05-19 01:45:00 -05:00
0178969e90
STM32Cube_FW_L4_V1.8.0
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CMSIS v1.1.1 => v1.3.1
STM32L4 HAL v1.5.1 => v1.7.1
2017-05-18 14:36:32 +02:00
e563fd477a
Updated ODIN driver binaries for v1.3 rc2
2017-05-17 23:14:57 +02:00
e177bcfd1f
Refactored the driver class
2017-05-17 23:13:29 +02:00
e0de402c77
Added BD_ADDR macros
2017-05-17 23:13:14 +02:00
dcc303225c
Added quality of service functions
2017-05-17 23:12:54 +02:00
db2623d318
Added cbBSM_setStaticLinkKeyNvdsId
2017-05-17 23:12:19 +02:00
9e61a52c12
Added cbHW_setSysTickMode
2017-05-17 23:12:05 +02:00
233b92ce3f
Added cbSTATUS_RECEIVE_DATA_MODE + macros
2017-05-17 23:11:50 +02:00
fba7b7f6c1
Fixed startHandle type for cbGATT_addService
2017-05-17 23:11:25 +02:00
358fa5d564
Minor comment fixes
2017-05-17 23:11:01 +02:00
8d4e602313
Moved stream interface to cb_cert_utils.h
2017-05-17 23:10:25 +02:00
27f5806c37
Moved stream interface to cb_cert_utils.h
2017-05-17 23:09:42 +02:00
8f295177ce
Merge pull request #4317 from c1728p9/reduce_test_overhead
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Reduce test overhead in preperation for CMSIS 5
2017-05-17 10:13:25 +01:00
5cac624a2d
nRF52840: Align sources after rebase
2017-05-17 09:21:51 +02:00
4bb818cd97
nRF52840: Fixed flashapi test and casting issue
2017-05-17 09:21:39 +02:00
98d4a13959
nRF52840: Aligned sources to coding standard
2017-05-17 09:21:27 +02:00
7761af2b8d
nRF52840: Removed unused, commented code
2017-05-17 09:21:17 +02:00
bd25d3bbda
nRF52840: Added checking if sd is enabled in flashapi
2017-05-17 09:21:05 +02:00
5e057a685d
nRF52840: Cleaned up code
2017-05-17 09:20:54 +02:00
39b0ef5394
nRF52840: Added flash_api implementation
2017-05-17 09:20:29 +02:00
eabc0cf70c
Enable CMSIS_VECTAB_VIRTUAL for Nordic platforms
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This change is part of CMSIS5 update. Enabling CMSIS_VECTAB_VIRTUAL for
Nordic platform is necessary to preserve platform specific NVIC ops.
2017-05-15 17:39:19 -05:00
2f73d3b4a7
STM32F3: Remove dependence upon a specific flash vector table location
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The STM32F3 cmsis_nvic code is currently checking for a specific flash
address when determining if the vector table is in flash or RAM. By
changing the test to instead see if the vector table base is NOT set to
the RAM address, it simplifies the code, and removes the dependency on
the flash vectors being located at a specific address. This becomes
important when adding a custom boot loader, which requires that the
flash vector table location in the mbed project be at a different
address.
2017-05-15 14:20:50 -04:00
0a3b2561bc
Merge pull request #4316 from c1728p9/remove_cortex_a
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Remove Cortex A boards as Cortex-A it is not supported in CMSIS5/RTX2
2017-05-15 11:55:36 -05:00
cd84f17ac4
Merge pull request #4312 from c1728p9/remove_systick
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BEETLE: Remove unused and conflicting systick
2017-05-15 16:24:40 +01:00
349315a207
Merge pull request #4310 from c1728p9/fix_ncs36510_vector_table
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Fix RAM vector table for NCS36510
2017-05-15 16:23:44 +01:00
cb3531c438
Merge pull request #4305 from LMESTM/fix_increase_stm32_spi_timeout
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Increase stm32 timeout for spi transfers
2017-05-15 16:22:59 +01:00
5af3b0d03b
Merge pull request #4302 from ytsuboi/master
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[RO359B] platform added
2017-05-15 16:22:28 +01:00
a75b29bcac
Merge pull request #4296 from LMESTM/dev_stm32_hal_F1_V1.5.0
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Dev stm32 hal f1 v1.5.0
2017-05-15 16:20:51 +01:00
1705d10790
Merge pull request #4272 from jeromecoutant/PR_F429_D11
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STM32 NUCLEO boards with Ethernet connector: solve conflict with D11 arduino pin
2017-05-15 16:12:06 +01:00
ef56d9569b
Merge pull request #4245 from nvlsianpu/merge_nrf52840_to_nrf5
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[NRF5 + NRF52840]: Merge nrf52840 to [NRF5] sources
2017-05-15 16:10:32 +01:00
3ca5c36768
Merge pull request #4241 from OpenNuvoton/nuvoton
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[NUC472/M453] Fix serial error with sync/async calls interlaced
2017-05-15 16:07:11 +01:00
d98da4089a
Merge pull request #4231 from jamike/USBH0ST_TARGET_STM_HUB_SUPPORT
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USBHOST hub support for TARGET_STM
2017-05-15 16:01:34 +01:00
444ff098fd
Merge pull request #4226 from Wiznet/master
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[WIZnet][W7500*] Support for mbed OS 5
2017-05-15 16:00:23 +01:00
c983b3a142
Use target inheritance for USENSE and UBRIDGE
2017-05-15 09:47:32 -05:00
a769d2b6a5
add comment in peripheral pin of DISCO_L476VG so that
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the user is aware of conflicts
2017-05-15 15:06:29 +02:00
577a0d972b
STM targets: the free irq function was not well implemented
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the index of the table was out of range
2017-05-15 14:27:22 +02:00
6c1fc983b7
RENESAS: add call to can_frequency and use hz parameter of can_init_freq
2017-05-15 14:27:22 +02:00
9115dd9b98
Add can_init_freq for STM devices
2017-05-15 14:27:22 +02:00
3d44a3fcc3
add can_init_freq for NUVOTON platforms
2017-05-15 14:27:22 +02:00
1fe20b281a
Add can_init_frequency for NXP platforms
2017-05-15 14:27:22 +02:00
c82c40f378
Temporarily increase max number of tasks for small boards
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Affected boards: NRF51_DK, NRF52_DK, Beetle. This change is temporary and
will be overwritten by RTX update. It's necessary for the boards to pass
updated tests.
2017-05-15 13:23:08 +01:00
a912d05f3b
Add can_init_frequency to RENESAS targets
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hz is not used in can_init functions
2017-05-15 14:14:26 +02:00
e535493a01
Remove Cortex A boards as Cortex-A it is not supported in CMSIS5/RTX2
2017-05-12 17:14:04 -05:00
2cf7403edc
fix ubridge and usense target
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fix ubridge and usense target
2017-05-12 15:15:12 -05:00
b6d5d9bf5d
fixed clock config, fixed UART pins
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fixed clock config, fixed UART pins
fixed clock config, fixed UART pins
fixed clock config, fixed UART pins
2017-05-12 15:14:47 -05:00
0d5023430b
add usense support
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add usense support
add usense support
2017-05-12 15:14:46 -05:00
2a665882e9
mbed kinetis low power modes
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mbed kinetis low power modes
mbed kinetis low power modes
2017-05-12 15:14:46 -05:00
265c04697f
patch latest clock settings for ubirch#1
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fix lpuart clock source settings, retrieve clock frequency accordingly
2017-05-12 15:14:24 -05:00
0e504da9f6
fix uart settings
2017-05-12 15:14:03 -05:00
b1a532553c
Add USENSE and UBRIDGE targets, and add trng to K82F and KL82Z
2017-05-12 15:13:32 -05:00
f32be95c9d
BEETLE: Remove unused and conflicting systick
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Remove the systick_timer driver from the BEETLE. This driver is both
unused and conflicts with the upcoming RTX5 PR.
2017-05-12 14:46:53 -05:00
5cf2255afb
Fix RAM vector table for NCS36510
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Fix the ram address of the vector table on the NCS36510. Also reserve
space for it in the linker scripts.
2017-05-12 14:20:30 -05:00
2ddf4b33cb
CMSIS5: Remove ARM7 support and targets
2017-05-12 13:48:43 -05:00
0501a14e73
Merge pull request #4308 from c1728p9/MAX32630FTHR_fix_NVIC_SetVector
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Fix NVIC_SetVector type in HAL for MAX32630FTHR
2017-05-12 13:14:00 -05:00
42f66eec60
stm32f4xx: Revert #3424
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According to @betzw, #3424 was put in for I2S with DMA. However, the latest I2S library now works without this patch.
The changes in DMA HAL for this potentially introduced corner case
scenarios. So it's best to revert the DMA changes.
2017-05-12 10:11:08 -07:00
bccda51c68
[RO359B] removed itself from extra_labels
2017-05-12 23:19:01 +09:00
92c55e7f31
Correct compilation issue
2017-05-12 15:38:25 +02:00
7d17532911
STM32 SPI do not use a timeout for spi transfers
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Default timeout of 10ms was reported as an issue in #4300
There seems to be conditions or use cases where the system is loaded with
higher priority tasks so that SPI transfer would be delayed more than 10ms.
Recommendation from MBED team is to not implement any timeout at all as
there is no defined API in MBED to inform application of error cases.
2017-05-12 11:25:47 +02:00
14cfe8bac8
Limit ISR stack to 4k on NUCLEO_F429ZI
2017-05-11 18:11:36 -05:00
d4bab30923
MAX32630FTHR: Fix NVIC_SetVector type in HAL
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Change the irq_handler parameter of NVIC_SetVector from a function
pointer to a uin32_t so it matches the cmsis specification. This
prevents the following problem from occurring in RTX5 when building
for IAR:
The error: Error[Pe167]: argument of type "void (*)(void)" is incompatible
with parameter of type "uint32_t".
2017-05-11 18:09:58 -05:00
3c1399482f
[RO359B] platform added
2017-05-11 20:39:45 +09:00
927cba8fa5
STM32F4: remove deprecated macro
2017-05-11 12:38:49 +02:00
c98342eaa1
Fixing Typo in MACRO
2017-05-11 09:20:39 +02:00
a8bd3b2cb7
Removes FLASH capabilities for the ARCH_PRO.
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This platform is failing a flash test at this time. This commit disables
the capability (and therefore the test) until it is fixed.
2017-05-10 15:16:22 -05:00
00163067fb
STM32 NUCLEO boards with Ethernet connector: solve conflict with D11 arduino pin
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If you are using Ethernet, and not SPI Arduino pins:
=> keep your board with the default configuration
If you are using SPI Arduino pins, and not Ethernet:
=> you should remove the JP6 bridge on the front side of the board
If you need SPI Arduino and Ethernet:
=> you have to patch the NUCLEO board on the back side: set solder bridge SB121 to off, and SB122 to on
=> D11 is no more connected to PA_7 but to PB_5
=> overwrite d11_configuration config value in json file
2017-05-10 11:15:14 +02:00
39d981cf70
STM32Cube_FW_F4_V1.16.0
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CMSIS v2.5.0 => v2.6.1
STM32F4 HAL v1.5.0 => v1.7.1
2017-05-10 10:00:42 +02:00
943035a159
STM32 F1: update state check in Serial after HAL update
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The states definition in HAL have changed so F1 driver needs updates
accordingly (as done previously on other families)
2017-05-09 16:48:36 +02:00
675d78d180
STM32 remove usage of deprecated MACROs
2017-05-09 16:48:34 +02:00
c581230cd3
USBHOST: TARGET_STM fix in hal for hub support
2017-05-09 16:18:33 +02:00
1f1168a51e
NRF5: changes for code review of merg nrf52840 to NRF5 sources
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s140 headers renamed form ble_* to nrf_ble_*,
Removed s130 and s132 headers named form ble_*
(Them had been added by #2ff572682798562e812015dc775b5896e0fda5a4)
Headers inclusinons were changed in order to meet above changes.
Revrted bad change in us_ticker.c:
use __disable_irq lock instead of core_util_critical_section_enter lock
for setting rtc1 tick for systick emulation as was good before.
2017-05-09 15:43:30 +02:00
08c778d18d
[NUC472/M453] Change comment for serial_getc/serial_putc
2017-05-09 09:22:41 +08:00
6aca976433
Merge pull request #4149 from monkiineko/master
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STM32F3: Correct handling of USB ISTR and endpoint registers
2017-05-08 11:16:31 -05:00
c1cbd26f1d
Merge pull request #4256 from arostm/dev_disco_lora
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DISCO_L072CZ_LRWAN1: add a new platform
2017-05-08 11:15:00 -05:00
ef079dbb52
Merge pull request #4270 from bulislaw/fix_odin_wifi
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Odin: Disable sleep as it's not compatible with WiFi driver
2017-05-08 11:14:25 -05:00
34da12ace2
modify GCC_ARM startup code & mbed_rtx.h syntax error correct.
2017-05-08 09:04:15 +09:00
a85873c863
Merge pull request #4248 from screamerbg/fix/stm32-usb-support
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Fixed STM32 USB Device support for mbed Classic
2017-05-05 13:51:38 +01:00
2d22db23db
Merge pull request #4169 from 0x6d61726b/master
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[NXP LPC176X] flash_api.c implementation
2017-05-04 15:41:17 +01:00
5b8033e144
Odin: Disable sleep as it's not compatible with WiFi driver
2017-05-04 10:57:47 +01:00
63accf1469
Fix Typo in include file name
2017-05-04 10:51:40 +02:00
a8d666fe6f
F1 CUBE V1.5.0
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HAL V1.1.0
LL V1.1.0
CMSIS V4.2.0
2017-05-04 10:31:59 +02:00
0c2af26523
Merge pull request #4249 from kegilbert/button-mapping-kg
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Add consistent button names across targets
2017-05-03 11:26:36 -05:00
138dbee5fc
Merge pull request #4260 from adamgreen/fixXadowM0ExtraLabels
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Inherit Xadow M0 target from LPC11U35_501
2017-05-03 09:08:29 -05:00
3dac027747
DISCO_L072CZ_LRWAN1: change date in periperalPins.c
2017-05-03 09:20:01 +02:00
0268c85101
Fixed typos
2017-05-02 13:16:14 -05:00
a638febc94
Inherit Xadow M0 target from LPC11U35_501
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targets/targets.json already added MCU_LPC11U35_501 as an extra label
but it didn't have LPC11U35_501 (without the MCU_ prefix). Both of
these target names are used as folder names to organize files
specific to this device. For example the LPC11U35.ld linker script used
by GCC_ARM for this target is located in a TARGET_LPC11U35_501 folder.
I switched to using inheritance to properly setup the target labels
based on @theotherjimmy comments on PR #4252 . Everything in the
XADOW_M0 targe appears to have been copy/pasted from LPC11U35_501
anyway so inheritance seems to be the best way to set the values of
the XADOW_M0 properties.
2017-05-02 10:26:51 -07:00
418d83b6c2
Addressed review comments: fixed unmapped switches and added Hexiware buttons
2017-05-02 12:20:05 -05:00
8073f9ed64
Merge pull request #4190 from netzimme/patch-1
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LPC4088: Enable LWIP feature
2017-05-02 11:30:42 -05:00
23c86fc539
Merge pull request #4236 from LMESTM/packed_warning
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STM32 Fixed warning related to __packed redefinition
2017-05-02 11:24:38 -05:00
c9173db9cf
DISCO_L072CZ_LRWAN1: peripheralPins add and change comments
2017-05-02 12:53:25 +02:00
e51c6942cf
DISCO_L072CZ_LRWAN1: prepipheralPins and PinNames correction
2017-05-02 12:53:25 +02:00
4f2850e283
DISCO_L072CZ_LRWAN1: Typo correction
2017-05-02 12:53:25 +02:00
6572660204
DISCO_L072CZ_LRWAN1: Typo correction in peipheralPins.c and PinNames.h
2017-05-02 12:53:25 +02:00
64f8c9650b
DISCO_L072CZ_LRWAN1: PinsName.h => PA_5 changed with PB_13 for the
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SPI_SCLK
2017-05-02 12:53:25 +02:00
a65bf18c19
DISCO_L072CZ_LRWAN1: targets.json correction
2017-05-02 12:53:25 +02:00
d7c48d6dbd
DISCO_L072CZ_LRWAN1: typo correction
2017-05-02 12:53:25 +02:00
729ed8f493
DISCO_L072CZ_LRWAN1: PinNames.h correction (USB TX and RX)
2017-05-02 12:53:25 +02:00
bffe629563
DISCO_L072CZ_LRWAN1: Clock configuration => 30MHz to 32MHz
2017-05-02 12:53:25 +02:00
29d5818837
DISCO_L072CZ_LRWAN1: PreipheralPins.c corrections
2017-05-02 12:53:25 +02:00
97605ddd5a
DISCO_L072CZ_LRWAN1: Change LED PIN definition
2017-05-02 12:53:25 +02:00
93bce7364c
DISCO_L072CZ_LRWAN1: typo correction
2017-05-02 12:53:25 +02:00
a59c4ff8a7
DISCO_L072CZ_LRWAN1: add LRWAN1 to the name
2017-05-02 12:53:25 +02:00
19109d9404
DISCO_L072CZ: Modifications and verifications to build
2017-05-02 11:50:24 +02:00
7529b8300b
DISCO_L072CZ: Add all files (pinout, startup, etc...)
2017-05-02 11:46:40 +02:00
e7b737ddad
[NUC472/M453] Fix serial error with sync/async calls interlaced
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Serial implementation uses different vector handlers for sync/async calls respectively. The issue can be reproduced with the following flow:
1. Register sync mode callback with Serial.attach().
2. Sync call with Serial.putc()/getc().
3. Change to async call with Serial.write()/read().
4. Change back to sync call with Serial.putc()/getc().
Now, vector handller is still for async mode, not for sync mode.
To fix it:
1. Introduce internal function serial_enable_interrupt() for both sync/async vector handler enable/disable.
Original HAL function serial_irq_set() is reduced to call it for sync mode vector handler enable/disable.
2. Introduce internal function serial_rollback_interrupt() to roll back sync mode vector handler at end of async transfer.
2017-05-02 09:31:09 +08:00
7d9e1d4b75
reserved topmost 32 bytes of RAM used by IAP functions
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NXP LPC176x/5x User Manual UM10360 Rev 4.1:
32.3.2.8 RAM used by IAP command handler
Flash programming commands use the top 32 bytes of on-chip RAM. The maximum stack
usage in the user allocated stack space is 128 bytes and it grows downwards.
2017-04-30 14:16:52 +02:00
6c3f9bd485
reserved topmost 32 bytes of RAM used by IAP functions
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NXP LPC176x/5x User Manual UM10360 Rev 4.1:
32.3.2.8 RAM used by IAP command handler
Flash programming commands use the top 32 bytes of on-chip RAM. The maximum stack
usage in the user allocated stack space is 128 bytes and it grows downwards.
2017-04-30 14:16:05 +02:00
c2fa163322
reserved topmost 32 bytes of RAM used by IAP functions
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NXP LPC176x/5x User Manual UM10360 Rev 4.1:
32.3.2.8 RAM used by IAP command handler
Flash programming commands use the top 32 bytes of on-chip RAM. The maximum stack
usage in the user allocated stack space is 128 bytes and it grows downwards.
2017-04-30 14:15:23 +02:00
6e46c7ad98
reserved topmost 32 bytes of RAM used by IAP functions
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NXP LPC176x/5x User Manual UM10360 Rev 4.1:
32.3.2.8 RAM used by IAP command handler
Flash programming commands use the top 32 bytes of on-chip RAM. The maximum stack
usage in the user allocated stack space is 128 bytes and it grows downwards.
2017-04-30 14:14:58 +02:00
0125f9f1a1
reserved topmost 32 bytes of RAM used by IAP functions
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NXP LPC176x/5x User Manual UM10360 Rev 4.1:
32.3.2.8 RAM used by IAP command handler
Flash programming commands use the top 32 bytes of on-chip RAM. The maximum stack
usage in the user allocated stack space is 128 bytes and it grows downwards.
2017-04-30 14:14:04 +02:00
131379aa0c
reserved topmost 32 bytes of RAM used by IAP functions
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NXP LPC176x/5x User Manual UM10360 Rev 4.1:
32.3.2.8 RAM used by IAP command handler
Flash programming commands use the top 32 bytes of on-chip RAM. The maximum stack
usage in the user allocated stack space is 128 bytes and it grows downwards.
2017-04-30 14:13:05 +02:00
5f13d955ad
Fix C++11 build error w/ u-blox EVK-ODIN-W2
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When attempting to perform a test build of various mbed-os targets with
GCC configured to build -std=gnu++11, all of the targets built
successfully except for this one. It gave errors like this:
../mbed-os/targets/TARGET_STM/TARGET_STM32F4/TARGET_UBLOX_EVK_ODIN_W2/sdk/wifi_emac/wifi_emac_api.cpp: In function 'emac_interface_t* wifi_emac_get_interface()':
../mbed-os/targets/TARGET_STM/TARGET_STM32F4/TARGET_UBLOX_EVK_ODIN_W2/sdk/wifi_emac/wifi_emac_api.cpp:331:38: error: use of deleted function 'emac_interface::emac_interface()'
_intf = new emac_interface_t();
^
In file included from ../mbed-os/targets/TARGET_STM/TARGET_STM32F4/TARGET_UBLOX_EVK_ODIN_W2/sdk/wifi_emac/wifi_emac_api.cpp:9:0:
../mbed-os/hal/emac_api.h:150:16: note: 'emac_interface::emac_interface()' is implicitly deleted because the default definition would be ill-formed:
typedef struct emac_interface {
^
../mbed-os/hal/emac_api.h:150:16: error: uninitialized const member in 'struct emac_interface'
../mbed-os/hal/emac_api.h:151:32: note: 'const emac_interface_ops_t emac_interface::ops' should be initialized
const emac_interface_ops_t ops;
This commit contains a proposed change which fixes this issue by not
using the new operator to allocate the emac_interface_t structure but
instead using the malloc() function since the construction is being
handled explicitly in the subsequent lines of the
wifi_emac_get_interface() function anyway.
I also added code which only completes the initialization of the _intf
object if its allocation succeeds and just returns NULL otherwise.
I see no deallocation of the _intf object occurring so no change from
delete to free() needed to be made.
2017-04-28 14:09:31 -07:00
28d1ac5a44
Added mapping to USER_BUTTON-labelled switches
...
Revert HRM1017 file source deletion
Added in small comment next to additions
Added mapping to BTN-labelled switches
Added mapping to USER_BUTTON-labelled switches
Undo incorrect mapping to SWIO pin in NORDIC target
2017-04-28 11:37:23 -05:00
83a510751b
Added mapping to BTN-labelled switches
2017-04-28 11:31:48 -05:00
301ce550c9
Fixed STM32 USB Device support by migrating all specific target headers to unsupported features where they belong until USB support is officially introduced in mbed OS 5
2017-04-28 17:23:07 +01:00
382a067d4f
Fix compilation errors on linux machine
2017-04-28 16:46:32 +02:00
708dd4703d
remove orphaned NRF5_SDK13 hal api driver
2017-04-28 13:47:44 +02:00
e6dbbde6ad
[NRF5] coding style format.
2017-04-28 13:13:27 +02:00
c71557c605
add to support gcc & iar
2017-04-28 14:25:35 +09:00
77cc87b050
Adding consistent button pin mappings
2017-04-27 18:42:47 -05:00
6f654ea6aa
delete dead code. -> gpio_irq_api.c
...
modified coding style. -> pinmap.c
2017-04-27 17:49:30 +09:00
4eea8fa863
STM32 Fixed warning related to __packed redefinition
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Before this patch, many warnings like below were generated
during compilation with ArmCC
[Warning] lwip_ethernet.h@57,0: #3135-D: attribute does not apply to any entity
This happens here as ``--gnu`` option of ArmCC is being used, which
enables the GNU compiler extensions that the ARM compiler supports.
This is solve by adding a extra check on __CCARM .
2017-04-27 10:32:00 +02:00
415f975587
modified typo
2017-04-27 08:51:40 +09:00
fe4edaeeb1
Modified coding style of mbed.
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- deleted dead code
- deleted test code
2017-04-27 08:34:33 +09:00
7f12ad2a8c
STM32F3: Correct handling of USB ISTR and endpoint registers
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The USB ISTR register consists of a mix of bits that are
write-zero-to-clear and read only bits. As such, to clear a bit in
the ISTR, you should simply write the bitwise-NOT of the bit to clear.
Previously, the __HAL_PCD_CLEAR_FLAG() macro would do a bitwise-AND
with the ISTR register contents to clear a bit, but this could result
in another bit being inadvertently cleared if it is set by hardware
between the read and the write of the ISTR register.
Similarly, the USB endpoint registers have two bits that are
write-zero-to-clear, USB_EP_CTR_RX and USB_EP_CTR_TX, but the
PCD_CLEAR_RX_EP_CTR() and PCD_CLEAR_TX_EP_CTR() macros wrote back the
last read value for one of these bits when clearing the other bit.
This could result in inadvertent clearing of one of these bits if it
were set by the hardware between the read and the write. These macros
have now both been adjusted to always write one to the bit not being
cleared to prevent inadvertent clears.
2017-04-26 10:23:02 -04:00
2ff5726827
[NRF5]
...
HAL driver: Add changes from needad for nrf52840 support
us_ticker, spi, sleep, serial, pwmout, pinmap, object, i2c, gpio, analogin
Add compatibility patches for:
- SoftDevice headers renamed (redirec by a few h files)
- sdk configuration (redirect by sdk_config.h files)
- renaming of func in softdevice handler module
2017-04-26 15:19:38 +02:00
c62a33e5c1
NORDIC: moving nRF52840 files to NRF5 "common" port.
...
TARGET_NRF5_SDK13/sdk -> TARGET_NRF5/TARGET_SDK13
TARGET_NRF5/sdk -> TARGET_NRF5/TARGET_SDK11
TARGET_NRF5_SDK13/TARGET_MCU_NRF52840 -> TARGET_NRF5/TARGET_MCU_NRF52840
2017-04-26 11:38:17 +02:00
4fa76dc4f9
Modifying the code to support mbed OS 5 -> add mbed_rtx.h
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Modifying the code for mbed ci shield test -> analogin_api.c, W7500x_adc.c, gpio_irq_api.c, W7500x_gpio.c
Modifying the code for fix bug -> W7500x_uart.c(register control driver problem), W7500x_uart.h, pinmap.c(pullup, pulldown problem)
2017-04-26 08:52:04 +09:00
fe4d375466
fixed missing device_name for xDot and removed progen
2017-04-25 20:23:42 +01:00
39061b0264
Merge pull request #4187 from maclobdell/ncs36510_heap_fix
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[NCS36510] Reduce default heap size allocated by IAR to 1/4 of RAM
2017-04-24 10:59:28 -05:00
16a1693534
Move target files
2017-04-22 20:49:20 +03:00
189083eeb0
Add USB capabilities to NUCLEO-F446RE board
2017-04-22 20:47:55 +03:00
bbd0574b86
Fix formatting in targets/targets.json
2017-04-22 20:47:55 +03:00
1c77628149
Merge pull request #4153 from jeromecoutant/PR_AF2_LEVEL0
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STM32F2: Internal ADC channels rework
2017-04-21 14:11:44 +01:00
bc58c1ba2d
Merge pull request #4180 from u-blox/c030-dev
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[UBLOX_C030] create target hierarchy for the specific versions of the C030 board
2017-04-20 16:54:18 +01:00
7a3aa7a094
Merge pull request #4174 from nvlsianpu/nRF52840_rtc_ovf_bugfix
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[NRF52840]: fix rtc overflow-while-set-timestamp issue
2017-04-20 16:51:28 +01:00
e3f457b4d5
Merge pull request #4154 from jeromecoutant/PR_F7_LEVEL0
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STM32F7 Internal ADC channels rework
2017-04-20 16:50:34 +01:00
743ab7eb59
Merge pull request #4176 from jeromecoutant/PR_L4_LEVEL0
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STM32L4 Internal ADC channels rework
2017-04-20 16:39:38 +01:00
5b86a108d9
Merge pull request #4137 from NXPmicro/Kinetis_Fix_ARM_Linker_Scripts
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MCUXpresso: Update ARM linker files to eliminate reserving RAM for stack & heap
2017-04-20 16:10:30 +01:00
6a6455dfc2
Merge pull request #4031 from jeromecoutant/PR_IAR_BIG_HEAP
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STM32 increase IAR heap size for big RAM targets
2017-04-20 15:50:21 +01:00
78c48504c1
Merge pull request #4016 from nvlsianpu/nrf5_rtc_ovf_bugfix
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[NRF5]: fix rtc overflow-while-set-timestamp issue
2017-04-20 15:48:03 +01:00
4c5e89a5df
[UBLOX_C030] make the UBLOX_C030 target private and introduce UBLOX_C030_U201 and UBLOX_C030_N211 for the two versions of the board (for the Sara U201 module and Sara N211 module respectively). These targets then inherit the UBLOX_C030 "base" target. The two targets are the same right now but will diverge when the cellular API is introduced.
2017-04-20 14:03:47 +01:00
32a7e6ba5e
[NUC472/M453] Fix pwmout power-down condition
2017-04-20 16:13:37 +08:00
e55553e749
[NUC472/M453] Fix DMA channel over-allocate
2017-04-20 14:57:09 +08:00
01767268cd
Merge pull request #4142 from productize/master
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EFM32: Fixed `pwmout_all_inactive` being inversed
2017-04-19 02:27:19 -05:00
8a2ae245d0
Merge pull request #4175 from nvlsianpu/nRF52840_rm_apptimer
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[NRF52840]: Remove unwanted nRF5 SDK's app_timer libarary.
2017-04-19 02:21:16 -05:00
7bd8c32f2d
Merge pull request #4133 from u-blox/c030-debug-8mhz-xtal
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U-BLOX_C030: Default XTAL is now 12MHz onboard. Option to use Debug 8MHz
2017-04-19 02:14:51 -05:00
0beb95f1a6
Merge pull request #4074 from stevew817/siliconlabs/update_tbsense_2_pinout
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[Silicon Labs] Update pinout
2017-04-19 02:06:54 -05:00
87610e700b
Merge pull request #4152 from jeromecoutant/PR_ADC_F4_NEW
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STM32F4 Internal ADC channels rework
2017-04-19 00:38:16 -05:00
fb8fda3cee
Merge pull request #4097 from bulislaw/build_debug_macro
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Debug build flag + change to sleep behavior in debug mode
2017-04-18 15:05:02 -05:00
7c33ba8691
LPC4088: Enable LWIP feature
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This patch enable the LWIP feature for the LPC4088 and LPC4088_DM boards.
The lwIP stack support already this hardware.
See: ./features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_NXP/lpc17_emac.c
2017-04-16 11:16:51 +02:00
5b866b79d1
MCUXpresso: Update ARM linker files to reduce RAM reserved for stack & heap
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Heap and stack size is determined via the RTOS.
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2017-04-14 11:21:28 -05:00
77f4e23c0f
[NCS36510] Reduce default heap size allocated by IAR to 1/4 of total RAM.
...
Allows mesh minimal example to compile with IAR.
2017-04-13 22:48:34 -05:00
67276e3785
[NRF52840]: fix coding style us_ticker.c
2017-04-12 14:34:14 +02:00
03972ebb0c
STM32L4 Internal ADC channels rework
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Internal ADC pins are now out of PinMap_ADC array
2017-04-12 13:14:58 +02:00
55fbd7a299
[NRF52840]: Removed unwanted nRF5 SDK's app_timer libarary.
...
The Library is unused by the port. It breaks "non-rtos" compilation.
2017-04-12 11:43:11 +02:00
560bd7403d
[NRF52840]: fix:
...
- rtc overflow-while-set-timestamp issue
- timer has a race condition
2017-04-12 11:10:48 +02:00
ae0ef24004
device feature "FLASH" added
...
device feature "FLASH" added
2017-04-11 21:54:12 +02:00
029736612b
typo corrected
...
typo corrected
2017-04-11 21:28:11 +02:00
8c6dd8949b
Update flash_api.c
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mbed_critical.h replaced with "platform/mbed_critical.h" (to match template)
typo corrected
2017-04-11 21:24:40 +02:00
b0451324c4
deprecated include updated
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critical.h is deprecated, replaced with "platform/mbed_critical.h"
typo corrected
2017-04-11 21:23:19 +02:00
d6686f14e0
NXP LPC176X: "FLASH_CMSIS_ALGO" activated
...
Due to implementation of "flash_api.c" for NXP LPC176X the corresponding extra_labels were activated
2017-04-11 21:06:33 +02:00
29c7b34dfa
LPC176X flash_api.h implementation
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For LPC176X (LPC1768/LPC1769) the flash driver has been implemented according to the CMSIS-PACK Keil.LPC1700_DFP.2.3.0 driver with the following changes in FlashPrg.c:
1. EraseChip() function removed (not used by flash_api)
2. Clock reconfiguration removed and clock value taken from function parameter to avoid unexpected behavior.
Full patch of FlashPrg.c:
--- Keil.LPC1700_DFP.2.3.0\Flash\LPC_IAP\FlashPrg_orig.c 2016-12-08 13:10:10.000000000 +0200
+++ Keil.LPC1700_DFP.2.3.0\Flash\LPC_IAP\FlashPrg.c 2017-04-11 20:02:37.000000000 +0200
@@ -191,90 +191,15 @@
* fnc: Function Code (1 - Erase, 2 - Program, 3 - Verify)
* Return Value: 0 - OK, 1 - Failed
*/
int Init (unsigned long adr, unsigned long clk, unsigned long fnc) {
-#if defined LPC1XXX || defined LPC11U6X
- CCLK = 12000; // 12MHz Internal RC Oscillator
+ CCLK = clk / 1000; // CCLK value is in kHz, clk in Hz
- MAINCLKSEL = 0; // Select Internal RC Oscillator
- MAINCLKUEN = 1; // Update Main Clock Source
- MAINCLKUEN = 0; // Toggle Update Register
- MAINCLKUEN = 1;
-// while (!(MAINCLKUEN & 1)); // Wait until updated
- MAINCLKDIV = 1; // Set Main Clock divider to 1
-
- MEMMAP = 0x02; // User Flash Mode
-#endif
-
-#ifdef LPC17XX
- IAP.stat = 0; // Note: Some Bootloader versions don't set the status if this command is executed
- IAP.cmd = 54; // Read Part ID
- IAP_Call (&IAP.cmd, &IAP.stat); // Call IAP Command
- if (IAP.stat) return (1); // Command Failed
-
- switch ((IAP.res[0] >> 24) & 0xFF) {
- case 0x25:
- // Part ID LPC1759 = 0x25113737
- // Part ID LPC1758 = 0x25013F37
- // Part ID LPC1756 = 0x25011723
- // Part ID LPC1754 = 0x25011722
- // Part ID LPC1752 = 0x25001121
- // Part ID LPC1751 = 0x25001118 / 0x25001110
- case 0x26:
- // Part ID LPC1769 = 0x26113F37
- // Part ID LPC1768 = 0x26013F37
- // Part ID LPC1767 = 0x26012837
- // Part ID LPC1766 = 0x26013F33
- // Part ID LPC1765 = 0x26013733
- // Part ID LPC1764 = 0x26011922
- CCLK = 4000; // 4MHz Internal RC Oscillator
- break;
- case 0x27:
- // Part ID LPC1778 = 0x27193F47
- // Part ID LPC1777 = 0x27193747
- // Part ID LPC1776 = 0x27191F43
- // Part ID LPC1774 = 0x27011132
- // Part ID LPC1772 = 0x27011121
- case 0x20: // found out during test
- case 0x28:
- // Part ID LPC1788 = 0x281D3F47
- // Part ID LPC1787 = 0x281D3747
- // Part ID LPC1786 = 0x281D1F43
- // Part ID LPC1785 = 0x281D1743
- case 0x48: // Part ID LPC4088 = 0x481D3F47
- case 0x47: // Part ID LPC4078 = 0x47193F47
- // Part ID LPC4076 = 0x47191F43
- // Part ID LPC4074 = 0x47011132
- CCLK = 12000; // 12MHz Internal RC Oscillator
- break;
- default:
- CCLK = 4000; // 4MHz Internal RC Oscillator
- }
-
- CLKSRCSEL = 0x00; // sysclk = IRC
-
- PLL0CON = 0x00; // Disable PLL (use Oscillator)
- PLL0FEED = 0xAA; // Feed Sequence Part #1
- PLL0FEED = 0x55; // Feed Sequence Part #2
-
- switch ((IAP.res[0] >> 24) & 0xFF) {
- case 0x27: // LPC177x
- case 0x20: // LPC178x
- case 0x28: // LPC178x
- case 0x48: // LPC407x
- case 0x47: // LPC408x
- CCLKSEL = 0x01; // use Sysclk devided by 1 for CPU
- break;
- default:
- CCLKSEL = 0x00; // CPU clk divider is 1
- }
-
MEMMAP = 0x01; // User Flash Mode
-#endif
return (0);
}
/*
@@ -283,37 +208,12 @@
* Return Value: 0 - OK, 1 - Failed
*/
int UnInit (unsigned long fnc) {
return (0);
}
-
-
-/*
- * Erase complete Flash Memory
- * Return Value: 0 - OK, 1 - Failed
- */
-
-int EraseChip (void) {
-
- IAP.cmd = 50; // Prepare Sector for Erase
- IAP.par[0] = 0; // Start Sector
- IAP.par[1] = END_SECTOR; // End Sector
- IAP_Call (&IAP.cmd, &IAP.stat); // Call IAP Command
- if (IAP.stat) return (1); // Command Failed
-
- IAP.cmd = 52; // Erase Sector
- IAP.par[0] = 0; // Start Sector
- IAP.par[1] = END_SECTOR; // End Sector
- IAP.par[2] = CCLK; // CCLK in kHz
- IAP_Call (&IAP.cmd, &IAP.stat); // Call IAP Command
- if (IAP.stat) return (1); // Command Failed
-
- return (0); // Finished without Errors
-}
-
/*
* Erase Sector in Flash Memory
* Parameter: adr: Sector Address
* Return Value: 0 - OK, 1 - Failed
*/
2017-04-11 21:03:45 +02:00
d1fa95184f
STM32F7 Internal ADC channels rework
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Internal ADC pin are now out of PinMap_ADC array
2017-04-11 12:56:13 +02:00
43ab8812d7
STM32F2 Internal ADC channels rework
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Internal ADC pin are now out of PinMap_ADC array
2017-04-11 11:16:46 +02:00
7da6960cfe
NUCLEO_F207ZG: I2C_3 is not available
2017-04-11 10:41:57 +02:00
613cc3d6d9
STM32F4 Internal ADC channels rework
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Internal ADC pin are now out of PinMap_ADC array.
2017-04-11 10:12:25 +02:00
2352ee49a4
Revert "STM32F4 Internal ADC channels rework"
2017-04-10 12:08:15 -05:00
0559aa431c
Merge pull request #4126 from jeromecoutant/PR_F4_PIN_LEVEL0
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STM32F4 : remove SERIAL_TX and SERIAL_RX from available pins
2017-04-10 11:09:51 -05:00
bfb86a7f51
Merge pull request #4125 from jeromecoutant/PR_F4_USB_CONFIG_FILE
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STM32 USB configuration file move
2017-04-10 11:07:59 -05:00
516f32fc86
Merge pull request #4118 from jeromecoutant/PR_REWORK_INTERNAL_ADC_F4
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STM32F4 Internal ADC channels rework
2017-04-10 11:06:12 -05:00
833a201042
Merge pull request #4102 from wdwalker/lpc-pindefs
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Add SCL and SDA defs for I2C[0-2]; redefine I2C_[SCL,SDA] to I2C2
2017-04-10 10:49:50 -05:00
1b4a3c3204
Merge pull request #4008 from OpenNuvoton/nuvoton
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[NUC472/M453] Support Bootloader and FlashIAP
2017-04-10 10:21:21 -05:00
4cd6068b73
MAX32630: Fix sleep definitions
2017-04-10 11:40:04 +01:00
d396306a10
EFM32: Fixed `pwmout_all_inactive` being inversed
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If one of the CC channel pins is enabled, `pwmout_all_inactive` it
means a channel is active so it should return `true`.
This commit also contains some cleanup in `pwm_init`.
2017-04-10 11:59:44 +02:00
a39ed809c4
U-BLOX_C030: Default XTAL is now 12MHz onboard. Option to use Debug 8MHz
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XTAL by using Macro USE_DEBUG_8MHz_XTAL
2017-04-07 12:01:46 +01:00
ce843e4859
Update pinmap of EFM32PG12 as well
2017-04-06 19:35:10 +02:00
680feb439e
Support SPI CPP objects with different pinouts sharing the same peripheral
2017-04-06 19:35:09 +02:00
7a35a4df51
Merge pull request #3992 from u-blox/c030-dev
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Introducing UBLOX_C030 platform.
2017-04-06 11:07:58 -05:00
1069dfc91a
Merge pull request #3982 from mjrgh/patch-3
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Ticker - kl25z bugfix for handling events in the past
2017-04-06 11:02:15 -05:00
f3499f5014
Merge pull request #4109 from jeromecoutant/PR_L476RG
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NUCLEO_L476RG : minor serial pin update
2017-04-06 10:56:50 -05:00
58f4b4103f
Merge pull request #4030 from jeromecoutant/PR_IAR_SMALL_HEAP
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[STM32L0] reduce IAR heap and stack size for small targets
2017-04-06 08:49:02 -05:00
d5058aa3fd
Merge pull request #4015 from bcostm/dev_disco-l053c8_usb
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DISCO_L053C8: Add support of USB Device
2017-04-06 08:47:49 -05:00
6c6c2fa0ec
Merge pull request #4014 from NXPmicro/Update_GCC_ARM_Linker
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Issue 3763: Reduce heap allocation in the GCC linker file
2017-04-06 08:47:11 -05:00
d740bde646
STM32F4 : remove SERIAL_TX and SERIAL_RX from available pins
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Pins are used for debug printf
2017-04-06 13:58:06 +02:00
5303211056
STM32F3 USB configuration file move
2017-04-06 11:53:06 +02:00
3bbbabf202
STM32L4 USB configuration file move
2017-04-06 11:51:26 +02:00
Sam Grove
Christopher Haster
Shaun Nelson
Jimmy Brisson
jeromecoutant
Martin Kojtal
andreas.larsson
kl-cruz
Bartek Szatkowski
Bradley Scott
Russ Butler
adustm
Matthias L. Jugel
Russ Butler
Dave Desrochers
Yoshihiro TSUBOI
Laurent MEUNIER
Bartosz Szatkowski
Martin Kojtal
Brian Daniels
Michel Jaouen
Andrzej Puzdrowski
ccli8
justinkim
Anna Bridge
arostm
Kevin Gilbert
Adam Green
Alexis ROCHE
0x6d61726b
Mihail Stoyanov
Chris
Indrek Ardel
Rob Meades
Daniel Zimmermann
Mahadevan Mahesh
maclobdell
Seppe Stas
Steven Cooreman