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2385 Commits (7256af0d5b29ff252ddfab569531300e9cd2f3f7)

Author SHA1 Message Date
jeromecoutant a7bddff5cc STM32F3: STDIO_UART_TX and STDIO_UART_RX can be now user defined 2018-01-08 11:12:04 +01:00
jeromecoutant 785862e69e STM32F2: STDIO_UART_TX and STDIO_UART_RX can be now user defined 2018-01-08 11:11:57 +01:00
jeromecoutant f97d84654e STM32F1: STDIO_UART_TX and STDIO_UART_RX can be now user defined 2018-01-08 11:11:51 +01:00
jeromecoutant 88678315f1 STM32F0: STDIO_UART_TX and STDIO_UART_RX can be now user defined 2018-01-08 11:11:43 +01:00
Prashant Ravi 62667a4732 Fixing changes as requested 2018-01-08 10:49:46 +08:00
Prashant Ravi f71de8a0d7 Commit to fix the Online compiler issue for ARM mbed-os on REALTEK_RTL8195AM 2018-01-06 00:00:50 +08:00
Steven Cartmell e14bee5209 Fix potential race condition in critical section HAL API 
Call underlying HAL implementation to enter critical section/disable interrupts
before incrementing the global critical section counter.

Modify HAL implementations to track first entrances to the critical section and
only update the saved state on first enter.
 2018-01-05 14:55:58 +00:00
Steven Cartmell 3c9ae7bf1c NRF51_DK: Add Critical Section HAL implementation 2018-01-05 14:55:57 +00:00
jeromecoutant e4169b7a9e STM32: update init procedure 
- STDIO_UART define is no more used
- configuring a new serial with the same UART as STDIO is no more allowed
 2018-01-05 15:16:38 +01:00
jeromecoutant 9f4bec2f2e STM32F0 : ST CUBE version update to V1.9.0 
- Previous ST Cube version: V1.7.0
- CMSIS part update from 2.3.1 to 2.3.3
- HAL part update from 1.5.0 to 1.7.0
 2018-01-05 14:46:33 +01:00
bcostm d96e76e7bd STM32 CAN: fix wrong ID and MASK filter 2018-01-05 10:11:17 +01:00
ccli8 67386b9ebd [NUC472/M487] Fix DMA input/output buffers are overlapped in AES alter. 2018-01-05 09:18:26 +08:00
ccli8 d96bcda606 [NUC472/M487] Fix indefinite loop in SHA alter. 2018-01-05 09:18:25 +08:00
ccli8 a00f8d0e8b [NUC472/M487] Guard from reordering DMA wait and post-wait for crypto modules 2018-01-05 09:18:25 +08:00
ccli8 3a8c1aa687 [NUC472/M487] Use interrupt signal rather than polling to check operation completion in DES alter. 
This is to be consistent with PRNG/AES.
 2018-01-05 09:18:24 +08:00
ccli8 0c1098483f [NUC472/M487] Refine flow control code between crypto start and crypto ISR 2018-01-05 09:18:24 +08:00
ccli8 e1fbf0f6a7 [NUC472/M487] Add comment for crypto_zeroize 2018-01-05 09:18:24 +08:00
ccli8 9edda18b0f [NUC472] Update BSP crypto driver 2018-01-05 09:18:23 +08:00
ccli8 a0a8a955a9 [NUC472/M487] Strengthen crypto DMA buffer check 
1. Catch incompatible buffer range, where buffer base = 0xffffff00 and buffer size = 0x100.
2. Add buffer size alignment check.
 2018-01-05 09:18:21 +08:00
ccli8 b0228d020d [NUC472/M487] Fix compile error as mbedtls is not included 
Currently, trng_api.c is located in targets/ and AES/DES/SHA alter. are located in mbedtls/.
They have shared crypto code.
If they could locate at same location e.g. mbedtls/, the shared crypto code placement would be more reasonable.
 2018-01-05 09:18:20 +08:00
ccli8 6464649c41 [NUC472/M487] Coordinate crypto interrupt handler among AES/PRNG 2018-01-05 09:18:20 +08:00
ccli8 d66074fecc [NUC472/M487] Coordinate crypto init among AES/DES/SHA/PRNG 
Add counter to track crypto init among crypto sub-modules. It includes:
1. Enable crypto clock
2. Enable crypto interrupt

As counter gets zero, crypto clock is disabled to save power.
 2018-01-05 09:18:18 +08:00
Jimmy Brisson af9e07357a
Merge pull request #5740 from ashok-rao/master 
Adding MTB ublox ODIN W2 as a new target.
 2018-01-04 10:05:02 -06:00
Jimmy Brisson 7bdbdbe1eb
Merge pull request #5703 from dave-wu/cog-adc-fix 
AD: Fix ADC driver
 2018-01-04 10:02:32 -06:00
Jimmy Brisson 324e53b770
Merge pull request #5697 from bcostm/dev_flash_f3 
STM32: Add support of Flash API for STM32F3 devices
 2018-01-04 10:00:41 -06:00
Jimmy Brisson e9c76bb85e
Merge pull request #5606 from nvlsianpu/bugfix/nrf52840_tickless 
Enable tickless on nRF52840
 2018-01-04 09:53:48 -06:00
Jimmy Brisson b2495c7a8d
Merge pull request #5595 from nvlsianpu/bugfix/nordic_critical_section 
fix nordic critical section
 2018-01-04 09:52:32 -06:00
Jimmy Brisson 62a7ecddd3
Merge pull request #5570 from jeromecoutant/PR_STDIO 
STM32 UART init update
 2018-01-04 09:50:18 -06:00
Jimmy Brisson 432e5bf436
Merge pull request #5253 from amq/patch-3 
Add missing device_name for targets with bootloader
 2018-01-04 09:47:41 -06:00
bcostm 058f011254 STM32F1: Remove flash functions doc 2018-01-04 15:43:54 +00:00
bcostm ca24ee4cd7 STM32F0: Remove flash functions doc 2018-01-04 15:43:54 +00:00
bcostm a47f9b3480 STM32F0: Add Flash API support 2018-01-04 15:43:54 +00:00
bcostm 6f5d8ff92e STM32F1: Add Flash API support 2018-01-04 15:43:54 +00:00
bcostm 0d3e189545 STM32F2: Remove flash functions doc 2018-01-03 15:26:10 +01:00
bcostm c86f1efd9c STM32F2: Add Flash API support 2018-01-03 15:26:10 +01:00
Andrzej Puzdrowski ae41c7db17 Implementation of critical section primitives 
which can be called from diferent contexts.

Orginal nordic critical primitives must been called in pairs
from exacly the same function. As mbed hal call it in separate
methods, so they are not suitable here.
 2018-01-03 11:39:15 +01:00
bcostm 8203a8ddf5 STM32F3: Remove flash functions doc + typos 2018-01-02 14:28:09 +01:00
bcostm 563338ad58 STM32F3: reset PGERR flash flag 2018-01-02 14:28:09 +01:00
bcostm b5324cae32 STM32F3: flash_api typos 2018-01-02 14:28:09 +01:00
bcostm 92394e4f13 STM32F303xE: add FLASH support in targets.json 2018-01-02 14:28:09 +01:00
bcostm 0d09f6d788 STM32F3: add Flash api 2018-01-02 14:28:09 +01:00
Martin Kojtal a8fc394942 VK RZ A1H: remove target from mbed 2 release 
As it does not share the codebase with RZ A1H, it needs to be disabled until
bring it up to date with the latest changes to cmsis. There are changes
regarding caches, mmu and others
 2018-01-02 11:51:04 +00:00
Martin Kojtal fed5dd1170 VK RZ A1H: fix errors from the latest cmsis updates 
Use mbed critical section
 2018-01-02 11:48:56 +00:00
gorazd 676e56d6fe ff_lpc546xx: change led1 and led3 and p26 pins 2018-01-01 15:55:25 +01:00
gorazd f6283f5b03 ff_lpc546xx: add enet 
fsl_phy.c/.h move to ../drivers to reuse it
lwip: add hardware_init.c
 2018-01-01 15:55:24 +01:00
Martin Kojtal 3247a96588 renesas: os tick only for rtos 
As this is os tick implementation for rtos, it should not be compilied if rtos
not present (mbed 2)
 2017-12-31 17:21:02 +01:00
Anna Bridge 20ad454f2b
Merge pull request #5613 from andreaslarssonublox/ublox_init_odin_evk_leds 
Added init for ODIN EVK LEDs to be off by default
 2017-12-29 14:30:50 +00:00
Adam Heinrich da81229186 NUCLEO_F413ZH: Add support for the NUCLEO-F413ZH board 
Merged from the existing TARGET_DISCO_F413ZH code (which has the same MCU)
and TARGET_NUCLEO_F412ZG code (which has the same Nucleo-144 board and
pinout).
 2017-12-29 15:30:10 +01:00
Anna Bridge a4d1dee25e
Merge pull request #5617 from bcostm/usbhost_clean-up 
STM32: USBHost clean-up
 2017-12-29 10:48:03 +00:00
Cruz Monrreal II 3ebc99fe35
Merge pull request #5681 from slashdevteam/mk24bootloader 
Adding bootloader support to MK24F1 target
 2017-12-28 20:34:27 +00:00
Cruz Monrreal II 2b718feba3
Merge pull request #5628 from TomoYamanaka/master 
Reregistration GR-PEACH as mbed support board
 2017-12-28 20:20:31 +00:00
Cruz Monrreal II 10076bd0f6
Merge pull request #5691 from dlfryar/nrf52_linker 
Nordic add app_start config system support for NRF52840 for bootloader
 2017-12-28 18:29:00 +00:00
Martin Kojtal dd5bd73a88
Merge pull request #5720 from kjbracey-arm/STM32F7_DMB 
Add memory barriers to STM32F7xx Ethernet
 2017-12-22 11:07:46 +00:00
Ashok Rao e324d16fab Fixing indentation 2017-12-21 15:38:58 +00:00
jeromecoutant 8c662132f4 STM32 : issue to exit deepsleep when RTC has not been initialized 2017-12-21 10:50:47 +01:00
TomoYamanaka 8f42cf7ef5 Revert "Remove Cortex-A mbed OS 5 support" 
I changed the python and json files to re-registering GR-PEACH to Mbed OS 5.
 2017-12-21 14:09:24 +09:00
TomoYamanaka 1bb2ca68ea Supplement the lack of "extended RTC" in RZ_A1H/rtc_api.c 
Although the extened RTC is supported by #5363 commit ("Add support and tests for extended RTC"), it seems that the changes was overlooked in RZ_A1H_api.c.
So I added the changes with reference to other rtc_api.c.
 2017-12-21 14:09:24 +09:00
TomoYamanaka f526f19661 Change the way of enter/exit of critical section of code 
I changed disable_irq() / enable_irq() to core_util_critical_section_enter() / core_util_critical_section_exit() by utilizing "mbed_critical" function in the below drivers.
- serial_api.c
- us_ticker.c
 2017-12-21 14:09:24 +09:00
TomoYamanaka 904fdaea7a Add the lacked definitions to mbed_rtx.h 
I added the below definitions for working "Dynamic Stack" and "Dynamic heap" on Mbed OS by referencing with the codes of Cortex-M target board.
"ISR_STACK_START", "ISR_STACK_SIZE", "INITIAL_SP", "HEAP_START" and "HEAP_SIZE"
 2017-12-21 14:09:24 +09:00
TomoYamanaka 2d11d6ef77 Add GIC_SetConfigration function to satisfy Cortex-A interrupt spec 
By updating to the codes of CMSIS5/RTX5, GIC_SetConfigration() function was added for Cortex-A, this function is set the interrupt configuration using GIC's ICFGR register. Therefore, I added this function to satisfy Cortex-A interrupt spec in the below files.
"can_api.c", "ethernet_api.c", "gpio_irq_api.c", "i2c_api.c", "spi_api.c" and "us_ticker.c"
 2017-12-21 14:09:24 +09:00
TomoYamanaka 15e91c1579 Revise startup processing having CMSIS5/RTX5 been available on GR-PEACH 
For supporting tp CMSIS5/RTX5, I changed the start-up processing of 3 toolchains(ARMCC, GCC_ARM, IAR) and updated the register definition of PEACH specific.
In addition,
I changed the linker script files to implement the dynamic HEAP the same as Cortex-M targets.Since GR-PEACH's HEAP was a fixed area, I changed the label name(ZI_DATA to RW_IRAM1) and replaced the allocation of STACK/HEAP.
 2017-12-21 14:09:24 +09:00
Dave Wu fc481049f8 Cleared data structures in analogin_init(); 
Set buffer for 1 sample in analogin_read_u16. Before it assumes the
buffer is set outside by the higher layer. Now it's temporarily
located on the stack since only the ADC value is returned.
 2017-12-21 09:59:13 +11:00
Ashok Rao dc3c7fc11e Adding MTB ublox ODIN W2 2017-12-20 18:52:04 +00:00
Martin Kojtal 9ebefcd63d
Merge pull request #5470 from ashok-rao/master 
Add device_name for TB_SENSE_12.
 2017-12-20 14:54:48 +00:00
Martin Kojtal 13dbb67891
Merge pull request #5649 from Archcady/realtek-PR-master 
Fix greentea test mbed-os-tests-netsocket-connectivity
 2017-12-20 14:43:37 +00:00
Martin Kojtal 806b762473
Merge pull request #5677 from u-blox/c030_bq24295_voltage_fix 
C030 Battery Charger Voltage Fix
 2017-12-20 14:42:18 +00:00
Dexter Fryar 30e1e0a349 Add app_start config system support for NRF52840 for bootloader 2017-12-20 08:25:14 -06:00
Kevin Bracey 05e2ae7a70 Add memory barriers to STM32F7xx Ethernet 
Pending official update from STM, add memory barriers to the Ethernet
HAL code for the STM32F7xx family.

Cortex-M7 has a merging write buffer that is not automatically flushed
by accesses to devices, so without these DMBs, we sometimes lose synch
with the transmitter.

The DMBs are architecturally needed in every version of this HAL, but
adding just to the STM32F7 version for now to clear test, as the
problem has only been observed on Cortex-M7-based devices.

Fixes #5622.
 2017-12-20 15:05:29 +02:00
jeromecoutant 8bc92bdd22 STM32F4 : compilation issue 
Issue comes only when ST HAL macro USE_FULL_ASSERT is enabled
 2017-12-13 13:57:26 +01:00
jeromecoutant 4637279f51 STM32L4 : compilation issue 
Issue comes only when ST HAL macro USE_FULL_ASSERT is enabled
 2017-12-13 13:57:17 +01:00
jeromecoutant 75db24ff15 STM32F3 : compilation issue 
Issue comes only when ST HAL macro USE_FULL_ASSERT is enabled
 2017-12-13 13:56:42 +01:00
Bilal 0469dfb892 Bracket moved to next line 2017-12-13 16:37:19 +05:00
Martin Kojtal cee180f472
Merge pull request #5667 from productize/fix-stm32-can3 
STM32: Fix CAN3
 2017-12-12 17:39:41 +00:00
Martin Kojtal be52ba2156
Merge pull request #5363 from mprse/extended_rtc 
Add support and tests for extended RTC
 2017-12-12 17:36:44 +00:00
Martin Kojtal da43d655ff
Merge pull request #5459 from jeromecoutant/PR_LPT_RTC 
STM32 Low Power Timer feature updates
 2017-12-12 17:33:31 +00:00
Martin Kojtal aff1d3002f
Merge pull request #5577 from VeijoPesonen/realtek_rtl8195am_gt_wifi-set-credential 
REALTEK_RTL8195AM Wifi driver - adds check of credentials validity
 2017-12-12 17:31:04 +00:00
Martin Kojtal 6c59e13e76
Merge pull request #5581 from SiliconLabs/feature/remove-custom-sleepmodes 
Remove custom Silicon Labs sleep management
 2017-12-12 17:30:17 +00:00
Martin Kojtal 047455eee9
Merge pull request #5591 from helmut64/NUCLEO_STM32L433_NEW 
Support the STM NUCLEO_L433RC-P board
 2017-12-12 17:29:51 +00:00
Martin Kojtal 84192fe676
Merge pull request #5610 from garivetm/bugfix-STM32CAN 
STM32 - CAN - Fix RTR position bit in TX mailbox register
 2017-12-12 17:27:57 +00:00
Martin Kojtal 2eaa32f35f
Merge pull request #5627 from li-ho/ev_cog_armc6 
ADI: Add ARMC6 compatible code
 2017-12-12 17:27:20 +00:00
Prashant Ravi a4ce936947 reverting all tabs to spaces 2017-12-12 21:05:27 +08:00
Prashant Ravi 01ec0da7f2 Replacing formatting issues 2017-12-12 17:09:42 +08:00
Prashant Ravi 01808db8ff Moving changes to RTW driver 2017-12-12 16:57:28 +08:00
Prashant Ravi 199ab8711a Revert "Fixing changes to make greentea test mbed-os-tests-netsocket-connectivity pass for target Realtek AMEBA" 
This reverts commit 1fcfced203.
 2017-12-12 16:53:45 +08:00
Maciej Rogozinski bb4a72c39d Bootloader support for MK24F1 for IAR toolchain 2017-12-11 09:54:21 +01:00
Maciej Rogozinski c9500c6c58 Bootloader support for MK24F1 for Keil toolchain 2017-12-11 09:51:06 +01:00
Maciej Rogozinski aaa09d5482 Added missing subscription 2017-12-10 15:32:45 +01:00
Bilal 5c1623c9e1 Licenses added in header files 2017-12-08 19:51:25 +05:00
Bilal a40469e7c5 C030 Battery Charger Voltage Fix 2017-12-08 17:39:21 +05:00
bcostm f08c04d81f STM32 CAN3: add CAN_3 declaration for DISCO_F769NI 2017-12-07 18:12:54 +01:00
Adam Heinrich 9ee222a8e6 STM32: Set valid filter number for CAN3 
Filter numbers 14 to 27 are reserved for dual CAN configuration.
However, CAN3 operates in single CAN configuration according to the
reference manual).
 2017-12-07 18:06:05 +01:00
bcostm bfc4d68ae0 STM32 CAN3: remove test of CAN_2 and CAN_3 
CAN_2 and CAN_3 are enum and not #define and this causes compilation error with GCC_ARM

Instead put back the test of CAN_NUM (which are defined in can_device.h).
 2017-12-07 18:04:34 +01:00
Edmund Hsu 165b2c665f Realign ADuCM4x50 and ADuCM302x instance memory blocks 
Ensure all instance memory blocks meet 4 byte alignment requirement
  without relying on compiler's or liker's optional settings:
  - gpioMemory[]                                    for adi_gpio_Init()
  - aRtcDevMem0[]                                   for adi_rtc_Open()
  - i2c_Mem[] or I2C_Mem[]                          for adi_i2c_Open()
  - spi_Mem0[], spi_Mem1[], spi_Mem2[] or SPI_Mem[] for adi_spi_Open()
 2017-12-07 14:57:08 +11:00
Adam Heinrich d33c0a6fa5 STM32: Pass correct id to can_irq() for CAN3 2017-12-06 19:41:20 +01:00
jeromecoutant 17a54840c7 STM32 RTC : update and comment prescaler values 2017-12-05 12:52:52 +01:00
Przemyslaw Stekiel 106561669f Update RTC drivers for extended RTC. 2017-12-05 07:54:02 +01:00
jeromecoutant 01b2b1baf3 STM32: RTC_LSI macro is replaced by lse_available config 2017-12-04 17:35:31 +01:00
jeromecoutant 354ed44a65 STM32 LOW_POWER_TIMER update : use error 2017-12-04 17:35:30 +01:00
jeromecoutant 85c337d0b9 STM32 LOW_POWER_TIMER update : rtc_init procedure 2017-12-04 17:35:29 +01:00
jeromecoutant c13ffaf477 STM32 LOW_POWER_TIMER update : sleep 
RSF synchro after deepsleep is not specific to Low Power Timer feature
And we have to check if RTC is configured before synchro
 2017-12-04 17:35:29 +01:00
jeromecoutant 0bf364ea55 STM32 LOW_POWER_TIMER update : rtc_api.c 
Add RSF synchro during init
Set a better WakeUp clock for long wake up period in order to stay in sleep mode
Use rtc_isenabled function before init as rtc_init is called at each set_time call
 2017-12-04 17:35:28 +01:00
jeromecoutant b65e861b20 STM32 LOW_POWER_TIMER update : lp_ticker 
Removed unnecessary part
 2017-12-04 17:35:27 +01:00
jeromecoutant feaa789c34 STM32 LOW_POWER_TIMER update : targets.json 
Move LSI configuration from macro to config part
Add missing boards to the LPT supported targets
 2017-12-04 17:35:26 +01:00
Prashant Ravi 1fcfced203 Fixing changes to make greentea test mbed-os-tests-netsocket-connectivity pass for target Realtek AMEBA 2017-12-04 19:18:24 +08:00
Steven Cooreman 813216306c Remove custom Silicon Labs sleep management 
Standardize on the mbed sleep manager by removing the sleepmodes API, and statically redirecting hal_sleep to EM1 and hal_deepsleep to EM2.
 2017-12-01 12:13:06 +01:00
Edmund Hsu 7239be2bd7 Update trng_api.c 
- Maintain compatible code for ARM 5 and ARM 6 while default alignment
   settings differ.
 - Instance memory containing memory pointers must be 4 byte aligned for
   all compilers regardless compilers' settings.
 - uint32_t is recommended to replace uint8_t for instance memory
   declaration because uint32_t guarantee 4 byte alignment.
 2017-12-01 13:23:24 +11:00
Edmund Hsu 7c8cbd6ca2 Add ARMC6 feature to EV_COG_AD4050LZ and EV_COG_AD3029LZ 2017-12-01 09:59:43 +11:00
Martin Kojtal c7e5eb2f97
Merge pull request #5397 from sakuraio/stm_sco-evb-01 
add target SAKURAIO_EVB_01.
 2017-11-30 18:16:09 +00:00
Martin Kojtal e4133501f1
Merge pull request #5531 from tung7970/feature-fota 
RTL8195AM - refactor bootloader and fota support
 2017-11-30 18:12:48 +00:00
Martin Kojtal a6df4ca119
Merge pull request #5550 from sarahmarshy/patch-13 
Fix bug in K64F trng_api.c
 2017-11-30 18:11:46 +00:00
Martin Kojtal 45e9e4cab3
Merge pull request #5565 from LMESTM/fix_slave_3wires 
STM32: SPI 3 wires mode not supported in SPI slave
 2017-11-30 18:11:16 +00:00
Martin Kojtal 118c1bb2b4
Merge pull request #5579 from SiliconLabs/feature/rail-2.1 
Upgrade Silicon Labs radio driver to v2.1.1
 2017-11-30 18:10:46 +00:00
Martin Kojtal 221b8a84b1
Merge pull request #5580 from bcostm/dev_usb_speed_disco-f746ng 
DISCO_F746NG: add usp_speed configuration
 2017-11-30 18:09:47 +00:00
Martin Kojtal 2b84a1742f
Merge pull request #5584 from SiliconLabs/feature/emlib-5.3.3 
Upgrade to Silicon Labs HAL
 2017-11-30 18:09:04 +00:00
Martin Kojtal aa176ee616
Merge pull request #5585 from SiliconLabs/bugfix/timer_precision 
Fix issue with timer timebase on EFR32
 2017-11-30 18:06:37 +00:00
Martin Kojtal 244d8a9c9d
Merge pull request #5601 from andreaslarssonublox/ublox_odin_driver_os_5_v2.3_rc1 
Updated ODIN drivers to v2.3 RC1
 2017-11-30 18:02:38 +00:00
Martin Kojtal 7767651858
Merge pull request #5609 from 0xc0170/fix_lpc546xx_enet 
LPC546XX: Add ENET support
 2017-11-30 18:00:30 +00:00
Martin Kojtal 6d50868756
Merge pull request #5611 from JanneKiiskila/rtl8195am-a3-fix 
Realtek RTL8195AM A3 fix
 2017-11-30 17:59:44 +00:00
Martin Kojtal 9314607050
Merge pull request #5616 from soramame21/ren-disco-f429zi 
Support bootloader for DISCO_F429ZI
 2017-11-30 17:57:35 +00:00
bcostm fe507af862 STM32 USBHOST: Corrections for DISCO_F746NG 2017-11-30 13:52:10 +01:00
Boting Ren f48ac95a38 Support bootloader for DISCO_F429ZI. 2017-11-30 19:41:41 +09:00
Alessandro Angelino 1b0922e97b EFM32: Use SECURE_ACCESS to access the ROM table 
To allow enabling of uVisor on EFM32, the ROM table must be accessed
through the CMSIS-provided SECURE_ACCESS macro.
 2017-11-30 11:08:11 +01:00
andreas.larsson 1eef1cd771 Added license header 2017-11-30 08:50:11 +01:00
bcostm 29b4aaf9af STM32 USBHOST: Corrections for DISCO_F769NI in targets.json 2017-11-29 18:54:04 +01:00
bcostm 18a6b96242 STM32 USBHOST: Add support of DISCO_F469NI and DISCO_F769NI 2017-11-29 18:54:04 +01:00
Janne Kiiskilä 791343a1f7 Realtek RTL8195AM - define A3-A5 as NC 
Based on the Mbed OS website the A3 is connected to "DAC", however there
is no define for DAC. In order to get the Realtek RTL8195AM to even compile
with mbed-os-example-client now, we must have the A3 defined - it is one of
the standard Arduine header pins. Therefore, setting it as NC.

A4-A5 are not connected either, so adding them as "NC" as well.

Realtek will hopefully push a proper fix sooner or later, if there is a
more meaningful define for the A3 pin. They do state however that the
A0-A3 pins are not GPIO capable anyway.

Ref: https://os.mbed.com/platforms/Realtek-RTL8195AM/
 2017-11-29 12:35:02 +02:00
andreas.larsson b5e9a5ca14 Added init for ODIN EVK LEDs to be off by default 2017-11-29 08:24:42 +01:00
Mathieu Garivet 6ee3d80b1c Fix RTR position bit in TX mailbox register 2017-11-28 18:44:28 +01:00
Mahadevan Mahesh 1da73df27d FF_LPC546XX: Remove LWIP feature 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-11-28 16:18:44 +00:00
Mahadevan Mahesh f2d2ed44cd LPC546XX: Add ENET support 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-11-28 16:18:36 +00:00
Tony Wu a4575a965f rtl8195am - refactor bootloader and ota support 
1. move ota region 1 from 0x00b000 to 0x040000
2. move ota region 2 from 0x0c0000 to 0x120000
3. refactor bootloader header as follows:

   uint32_t tag;
   uint32_t ver;
   uint64_t timestamp;
   uint32_t size;
   uint8_t hash[32];
   uint8_t campaign[16];
   uint32_t crc32;

   where,
   a. hash is the sha256 checksum of the payload.
   b. crc32 is the crc32 checksum of headers from tag to campaign.

4. Call NVIC_SystemReset for soft reset.

Signed-off-by: Tony Wu <tung7970@gmail.com>
 2017-11-28 21:33:51 +08:00
Andrzej Puzdrowski ceef097f38 Enable tickless for nRF52840 2017-11-28 13:35:52 +01:00
andreas.larsson f2de0956b4 Updated ODIN drivers to v2.3 RC1 2017-11-28 12:22:45 +01:00
Andrzej Puzdrowski b084812eff current critical section implementation makes possible that interrupt 
signals are lost. It was observed at last for tests-api-spi ci-test-shield's
test.

This patch introduce usage of sdk5 origin implementation in which
sd_nvic_critical_region_enter/exit is calling each time critical region
is enter/exit. This fixes the issue.
 2017-11-28 09:44:28 +01:00
Helmut Tschemernjak 63ad3aeae3 Added the proper defines for the STM32L432 bootloader support 2017-11-27 15:41:30 +01:00
Helmut Tschemernjak 4778a40643 Changed NVIC Flash base address to support the bootloader 2017-11-27 15:32:53 +01:00
Helmut Tschemernjak 65866dd10a Enbaled bootloader support for STM32L432KC 
Added NUCLEO_L433RC_P target
 2017-11-27 15:26:00 +01:00
Helmut Tschemernjak 632b2f1660 Updated wrongly defined UART3_BASE into USART3_BASE 2017-11-27 15:19:43 +01:00
Helmut Tschemernjak 66a1967fb4 Added TARGET_STM32L433RC stack size define into mbed_rtx.h 2017-11-27 15:15:17 +01:00
Helmut Tschemernjak fb914149dd Updated to toolchain startup/linker files to support the 433 devices 
Also added the symbolic MBED_APP_START/MBED_APP_END defines
 2017-11-27 15:03:43 +01:00
Helmut Tschemernjak 94c46b102b defined STM32L433xx 2017-11-27 14:52:37 +01:00
Helmut Tschemernjak e25dfc07f0 Added stm32l433xx.h defined STM32L433xx 2017-11-27 14:51:46 +01:00
Helmut Tschemernjak 6907b6d9e5 Updated PeripheralNames.h, PeripheralPins.c and PinNames.h for STM32L433 devices 2017-11-27 14:44:35 +01:00
Helmut Tschemernjak 90bb8fc368 Copied TARGET_STM32L432 to TARGET_STM32L433, renamed 432 files to 433 2017-11-27 14:36:47 +01:00
bcostm 26f24ada10 DISCO_F746NG: typo in config name 2017-11-27 09:46:36 +01:00
Steven Cooreman c95728f6fc Fix issue with timer timebase on EFR32 
Timer code was written based on integer multiple HF clock frequencies. EFR32 doesn't conform to that (38.4), and so the timestamp ticks were off by 1%. Enough to trip up some CI tests on TB_SENSE_12 (#5496)
 2017-11-25 11:23:41 +01:00
bcostm b1073c165f DISCO_F746NG: add usp_speed config 2017-11-24 16:52:59 +01:00
Steven Cooreman e900d5a04d Squash warnings by defining 'NC' as unsigned type 2017-11-24 16:14:56 +01:00
Steven Cooreman 73bd5ff5fb Remove deprecated em_int 2017-11-24 16:01:00 +01:00
Steven Cooreman 6c6e762c49 Support USARTs up to USART5 in SPI 2017-11-24 15:53:44 +01:00