Commit Graph

27 Commits (419805385704dabb19a46a788892aad0f03cfad1)

Author SHA1 Message Date
Alexandre Bourdiol 315220832f TARGET_STM: L0 CUBE SPI async mode send next byte after previous one read
In STM32 Cube HAL, in interrupt mode (async),
2 bytes can be prepared in hardware registers without any read
(1 in regular register, the other in shift register),
but Only 1 RX byte can stored in hardware register, specially when there is no hardware FIFO.
If interrupt handling is fast enough, each read is made in parralele of the write.
But if interrupt handling is too long or is interrupted for too long,
it can happen that one read byte is lost (overrun).
For STM32F4, Tickless has been deactivated to avoid such issue.
For STM32L0, we don't want to deactivate tickless,
because those chips are specially design for lowpower.

So instead of removing SPI async mode,
we propose to change the HAL behavior specially for L0:
each byte is send only when previous read is performed.
Thus only 1 RX byte at a time which is saved in hardware register.
This prevent overrun, but it introduceS some latency between each byte send,
this is why it is not applied to all STM32 families.
2020-02-04 13:26:49 +01:00
Alexandre Bourdiol 7647b39adc TARGET_STM: I2C sequential communication revert PR #3324 to original cube HAL 2019-08-22 10:44:20 +02:00
Martin Kojtal ccb63d771e
Merge pull request #10857 from ARMmbed/feature-watchdog
Add Watchdog and ResetReason
2019-07-03 11:43:52 +01:00
jeromecoutant daf8d114c4 STM32L0 warning compilation
[-Wparentheses-equality]
2019-06-07 18:10:17 +02:00
jeromecoutant feec85cc37 STM32 WATCHDOG : update STM32L0 HAL_IWDG_Init to a newest version 2019-05-24 11:35:41 +02:00
jeromecoutant e29d64fc19 STM32 WATCHDOG : compilation issue with typed define 2019-05-24 11:35:40 +02:00
jeromecoutant 087cd26dd4 STM32L0 ADC TEMPERATURE CHANNEL rework 2019-01-03 17:03:07 +01:00
jeromecoutant 6b226ffcef STM32 RTC update for easy maintenance 2018-12-04 11:08:30 +01:00
jeromecoutant baec3b9e90 STM32 remove html release notes files 2018-11-22 16:27:59 +01:00
jeromecoutant 4d3a54443d STM32L0 ADC internal channels update 2018-05-22 13:17:16 +02:00
bcostm 61576f8131 L0 ST CUBE V1.10.0: spi and i2c corrections 2018-04-18 14:06:20 +02:00
bcostm 8191487a4d L0 ST CUBE V1.10.0 2018-04-18 14:06:20 +02:00
jeromecoutant eeca430b23 STM32L0 : correct compilation warnings 2018-04-12 10:55:11 +02:00
jeromecoutant 6086c51234 STM32LX : HAL_RCC_OscConfig update in PLL configuration
check PLL settings before retuuning error
2018-01-22 13:35:11 +01:00
jeromecoutant 341713b2ae STM32L0 : json clock source configuration
- default value is the same as before patch
- system_stm32l0xx.c file is copied to family level with all other ST cube files
- specific clock configuration is now in a new file: system_clock.c (target level)
2017-07-19 16:23:43 +02:00
Laurent MEUNIER 8576993a1a Introduce stm32_assert.h for MBED port
When we want to activate USE_FULL_ASSERT macro in STM32 CUBE, there is a
need to have the assert map to MBED.

The easiest way to have this definition in a single place for all STM32
HAL and LL files using it, is to add a specific header file where the
porting to MBED is done.
2017-05-29 13:48:29 +02:00
Jimmy Brisson c1cbd26f1d Merge pull request #4256 from arostm/dev_disco_lora
DISCO_L072CZ_LRWAN1: add a new platform
2017-05-08 11:15:00 -05:00
Alexis ROCHE 19109d9404 DISCO_L072CZ: Modifications and verifications to build 2017-05-02 11:50:24 +02:00
Laurent MEUNIER 4eea8fa863 STM32 Fixed warning related to __packed redefinition
Before this patch, many warnings like below were generated
during compilation with ArmCC
[Warning] lwip_ethernet.h@57,0:  #3135-D: attribute does not apply to any entity

This happens here as ``--gnu`` option of ArmCC is being used, which
enables the GNU compiler extensions that the ARM compiler supports.

This is solve by adding a extra check on __CCARM .
2017-04-27 10:32:00 +02:00
Laurent MEUNIER 32d04ead8a STM32: L0 LL layer
Introduce the L0 LL Layer from STM32 cube.
2017-01-23 18:01:30 +01:00
Sam Grove 4524c5f917 Merge pull request #3411 from jeromecoutant/PR_ST_L0_ASSERT
STM32L0 : map ST HAL assert into MBED assert
2016-12-15 10:30:03 -06:00
jeromecoutant 2c5249b196 STM32L0 : refactor stm32l0xx_hal_conf.h and map ST HAL assert into MBED assert 2016-12-14 11:09:32 +01:00
Laurent MEUNIER 23926a2418 [STM32] HAL I2C (V2) sequential transmit / receive
In case of sequential transmit / receive, there is a need to:
- not use the reload option
- generate a new START on each new transaction

This applies to all HAL supporting the IP version V2.
2016-11-30 08:23:13 +01:00
Laurent MEUNIER 77364f9fe2 [STM32] HAL L0: I2C / DMA updates
This is prelim update before official V1.8.0 HAL to the needed HAL API
available as in F0 HAL which is using the same IP.
2016-11-30 08:23:13 +01:00
Laurent MEUNIER 64a037cc8d STM32L0 - update spi HAL driver
This is a temporary update waiting for the next official release
2016-11-18 09:59:53 +01:00
Laurent MEUNIER ab0a8ad508 STM32L0: Cube update V1.5.0 to v1.7.0
Including HAL and CMSIS udpate
2016-11-10 11:03:46 +01:00
Christopher Haster 26ced98734 restructure - Restructured cmsis directory
targets/cmsis -> cmsis
targets/cmsis/TARGET_* -> targets/TARGET_*/device
targets/cmsis/TARGET_*/mbed_rtx.h -> targets/TARGET_*/mbed_rtx.h
2016-10-04 17:51:44 -05:00