tools/test/toolchains/api_test.py is problematic as it contains code
for checking tools. This contains license code in strings - scancode things these are the licenses in the file.
We skip it checking in travis
The goal: check license offenders in pull request
This is similar to what astyle does in Travis. We get list of files being changed. Because scancode does not support list of files being scanned but rather a file or directory, we copy files to SCANCODE folder. Execute scancode license check in this folder and check for offenders.
The rules there are: code files must have a license and SDPX identifier. If they don't, we print these and ask for review.
It functions nicely there is just one workaround needed. SPDX is not always 100 percent correctly found, therefore we recheck file if no SPDX manually in the script. This proves to remove false positives.
This bug results from BSP update:
- CRPT: Base address of secure or non-secure crypto module, dependent on partition
- CRPT_S: Base address of secure crypto module
- CRPT_NS: Base address of non-secured crypto module
The clock source selection of LPUART depends on System clocks but also on
the serial baudrate. There is a specific computation done in serial driver
targets/target_STM/serial_api.c
At first start-up the LPUART1 clock selected in SetSysClock was anyway
overridden by the serial driver, so this was of no effect. But in case
of deep sleep SetSysClock is called again, while the driver isn't, so
SetSyClock was corrupting the serial clock configuration.
So let's remove these few lines of code which are causing trouble.
Remove an obsolete HAL implementation from LPC408X to fix the GCC_ARM
build with the "-flto" flag.
With the lto enabled, unreferenced buffers defined in ethernet_api.c
were not excluded at link time overflowing the 16kB peripheral SRAM1
(ld error: "section '.AHBSRAM1' will not fit in region 'ETH_RAM'").
The Ethernet HAL API is deprecated in favor of EMAC.
While testing it has been found that all tests are skipped in the FPGA uart test on the NRF52840 target.
This is caused by the following change:
https://github.com/ARMmbed/mbed-os/pull/12379 - Add STDIO UART as restricted for FPGA testing for all targets
NRF targets have MUXed pins and mainly do not provide pin-maps. There are only dummy pin-maps for testing.
These pin-maps hold only pins and do not specify the peripheral or function of the pin (always 0). Because of that if we restrict STDIO uart peripheral (0) all FPGA uart test cases will be skipped.
To fix this we will remove this restriction for NRF52840. Restriction for testing the USBTX, USBRX pins is sufficient in this case.
ARCH_MAX board uses 0x01 as PHY address, different from other NUCLEO STM32 boards. To faciliate change of PHY address of customized boards, a configuration entry eth-phyaddr was added and can be overriden as needed in mbed_app.json by adding "stm32-emac.eth-phyaddr": X. Macro ETH_ARCH_PHY_ADDRESS was also renamed to ETH_PHY_ADDRESS, because it is not only used by ARCH_MAX board but also other boards.
Moved the existing BufferedBlockDevice to features/storage unittests and switched it to gmock.
Added gmock-based unit tests to all other BlockDevice classes.
SlicingBlockDevice test left as a module test.
Martin Kojtal
Michal Paszta
Chun-Chieh Li
Dustin Crossman
Mark Edgeworth
Alvin Lee
Laurent Meunier
Filip Jagodzinski
Przemyslaw Stekiel
Zhiyonh Li
Hugues Kamba