The DEVICE_FOO macros are always defined (either 0 or 1).
This patch replaces any instances of a define check on a DEVICE_FOO
macro with value test instead.
Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
In case of unusing RTOS, there is no processing against IRQ handler and it causes a linker error.
Therefore, I added this processing with WEAK attribute. Also I added cmain.S file at cmsis/TARGET_CORTEX_A folder.
In case of unusing RTOS, IRQ handler executes "while(1)" and it causes a program freeze.
Therefore, I revised this processing. Also I added the heap setting processing and set the align to 8 byte.
If the specified frequency exceeds the upper limit and lower limit at SPI driver, an error is output, but this does not match policy with other renesas drivers. Thus I revises the processing as follows.
- If "hz" is maximum over, it is rounded by the maximum value.
- If "hz" is minimum under, it is rounded by the minimum value.
For Arm toolchain build, Mbed 2(classic) programs occur an unexpected error if there is "#include "mem_XXXX.h"" in the script file.
It seems that the linker script can't find the include file because "mem_XXXX.h" file is not in the same path with the linker script.
(Refer to Issue #6975.)
To address this issue, I remove inclusion processing and define the related macros at ARMCC linker script file.
--legacyalign, --no_legacyalign are deprecated from ARMC6 compiler, in order to
remove deprecated flags all linker files (GCC and IAR as well to have uniformity)
should strictly align to 8-byte boundary
Currently the return value of flash_get_page_size() is 1 since the min size per one writing is 1 byte by Flash spec.
However, I noticed that this value causes a enormous write time When writing large data such as FW update.
So I revised this value to 8 byte by considering the writing time, memory alignment and memory hole.
MTU2(Multi function Timer pulse Unit 2) can create the low freaquency.
Currently GR-LYCHEE uses MTU2 channel 3 for LPTicker, but I noticed that a part of it is used by another function.
Thus, I changed MTU2 channel number for LPTicker to 2.
I changed _page_program() func because "buf" which is an argument of data_send() for writing must be a RAM address in order to operate in SPI mode.
(ex: if it is ROM table data, writing will be failure.)
Also, I changed the period of interrupt disable/enable at _page_program() func and _sector_erase() func because lock period is too long.
I modified the _page_program() because when the request of the size exceeding the maximum size(256 byte) per one writing of Flash recieved, it was not able to loop the writing with sifting the address every 256 byte.
Also I modified the return value of flash_get_page_size() because I found that the minimum size per one writing of Flash is 1 byte by reviewing Flash spec.
"FLASH_PAGE_SIZE" macro's value is remain 256, it doesn't be used at flash_get_page_size(), used at _page_program() for refferencing of the maximum page size.
Although other venders implement this feature by using RTC, in my H/W(RZ_A1), I cannot use RTC because it does not satisfy the spec of LP Ticker (ms order and low frequency between 8 KHz and 64 KHz).
Therefore I implemented this feature by creating 1024 division by MTU2(Multi function Timer pulse Unit 2) in order to satisfy this spec.
As a result of investigating, the most unaffected channel among MTU2 placed on GR-PEACH and GR-LYCHEE was channel 3, so I use channel 3 for this feature.
- mbed_drv_cfg.h
I added a macro of MTU2 channel to this file for commonalizing code for GR-PEACH and GR-LYCHEE, and referenced it's macro at us_ticker.c.
- targets.json
I added a macro for enabling LP Ticker.
- mtu2.c mtu2.h
I defined fuction of MTU2's clock supply and stop.
Because MTU2 is utilized by pwm driver too, those function were referenced at lp_ticker driver and pwm driver.
- lp_ticker.c lp_ticker_init()
In order to satisfy the LP Ticker spec, I implemented by creating 1024 division by MTU2.
When an interrupt is required, it will be set with ticker_set_interrupt().
- lp_ticker.c lp_ticker_free()
This function stops the counting and powerdown the lp_ticker.
- lp_ticker.c lp_read()
This function returns the timer counter of MTU2.
- lp_ticker.c lp_ticker_set_interrupt()
In order to satisfy specifications, I implemented lp_ticker_set_interrupt() function.
- lp_ticker.c lp_ticker_fire_interrupt()
In order to satisfy spec, I implemented lp_ticker_fire_interrupt() function.
Also I added GIC_EnableIRQ for allowing the interrupt at end of function.
- lp_ticker.c lp_ticker_get_info()
To satisfy the spec, I implemented lp_ticker_get_info() function. The value of freq includes rounding off.
I modified RAM size of ARMCC compiler for GR-LYCHEE.
In case of GR-LYCHEE, RAM size is 3M Byte(including Non-Cache area), but there was a typo at MACRO definition.
The mainly changes is below:
- Update scatter file, linker file for bootloader support
- Update the file for RZ/A1 serial flash boot loader
- Add "device name" and "bootloader_supported" in targets.json
The mainly changes is below:
- Add flash_api.c
- Add the definition of SPI multi I/O Bus controller that is used for flash access
- Add "FLASH" as device feature
- Add the macro regarding information of the incorporated Flash
- Add the processing to expand code to RAM
I implemented the RTC feature.
The mainly changing is here.
- rtc_init()
Previously, I have initialized the time information register in the function, so the time count was cleaned by every calling rtc_init().
Currently, rtc_init() doesn't stop RTC from counting, and rtc_init() is safe to call repeatedly.
Therefore in order to satisfy specifications,I removed the initialization process of the time information register in the function.
- rtc_free()
Previously, I have initialized the RTC related register same as rtc_init(), so the time count was cleaned by calling rtc_free().
Currently, rtc_free() doesn't stop RTC from counting.
Therefore in order to satisfy specifications,I removed the process and decided not to do anything in the function.
If powerdown the RTC, Supply of the clock to the RTC is stopped, cannot keeping the count.
I implemented USTICKER feature.
The mainly changing is here.
- I added a macro to mbed_drv_cfg.h for commonalizing code for GR-PEACH and GR-LYCHEE with different clock frequencies, and referenced it's macro at us_ticker.c.
- ticker_init()
Currently, ticker_init() keep counting, disables the ticker interrupt, and is safe to call repeatedly.
Therefore, in order to satisfy specifications, I removed GIC_EnableIRQ at end of function and added GIC_DisableIRQ at begin of function.
When an interrupt is required, it will be set with ticker_set_interrupt().
If executing the following, the counter has been initialized. So it will not call after executing the first time.
OSTM1TT = 0x01; /* Stop the counter and clears the OSTM1TE bit. */
OSTM1TS = 0x1; /* Start the counter and sets the OSTM0TE bit. */
- ticker_free()
this function stops the counting and powerdown the us_ticker.
To satisfy the mbed specificationm, I implemented free() function.
- ticker_read()
Currently, Mbed spec's frequeny is between 250KHz and 8MHz, but the frequency that is used at my ticker is 33MHz.
Therefore, in order to satisfy specifications, I changed the process to return the timer counter value divided by 32(33MHz / 32).
Since the calcurate function by using 64 bit is no longer necessay, I removed it.
- ticker_set_interrupt()
Same as the above read(),
In order to satisfy specifications, I changed the process to set the value multiplied by 32.
- ticker_fire_interrupt()
In order to satisfy specifications, I implemented fire_interrupt() function.
Also I added GIC_EnableIRQ for allowing the interrupt at end of function.
- ticker_get_info()
To satisfy the mbed specificationm, I implemented ticker_get_info() function. The value of freq includes rounding off.
I implemented the SLEEP feature for Rnesas mbed boards.
The mainly changing is here.
- hal_sleep()
To satisfy the mbed specificationm, I implemented this function newly by using "sleep" that is one of low power mode that is incorporated in our hardware(RZ_A1).
In the "sleep", peripheral and memory state are maintained, and the peripherals continue to work and can generate interrupts.
- hal_deepsleep()
To satisfy the mbed specificationm, I implemented this function newly by combined using "sleep" and "module standby" that is the low power mode that is incorporated in our hardware(RZ_A1).
The "module standby" is peripheral module's powerdown.
Also in case of our "module standby", it need to read register as dummy when access to each register.
Implementation of unified EMAC driver for Renesas mbed boards
Based on the driver so far, Renesas implemented the emac driver for GR-PEACH and VK-RZ/A1H.
The mainly changes is below.
- Add the connection part with LWIP according to the unified emac specification.
- Add three new multicast functions(add, remove, set_all).
The Greentea test netsocket and emac test passed.
Mbed-os 5.4.7 was the last unofficial working support for this target.
Since Mbed-os 5.6.0, the support is now official and VK_RZ_A1H is now "codebase aligned" with GR_PEACH (RZ_A1H) & GR_LYCHEE (RZ_A1LU) !
Renesas mbed boards incorporate NVIC Wrapper because Cortex-A9 use GIC. For example, NVIC_SystemReset() is defined in nvic_wrapper.c and declared in nvic_wrapper.h.
Because I removed one of include processing accidentally, I fixed the lack.
This supplements PR #5890.
Related to the review of #5857, I fixed the TRNG function for GR-LYCHEE.
- I modified to zeroize "recv_data" before the function return.
- I added the processing that check the return value of I2C.read function. If return value is error, "output" is zeroized before function return.
- In trng_get_bytes_esp32 function, there is a time lag in the period from ESP32 reset to start working, error may occur when "Write" is called. Thus, I added a retry counter due to address this concern. There is not this counter for "Read" since it is called after "Write".
I modified the lack of license header in the below header files.
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/TARGET_MBED_MBRZA1H/reserved_pins.h
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_GR_LYCHEE/TARGET_MBED_MBRZA1LU/reserved_pins.h
I supported the TRNG function when target is GR-LYCHEE.
GR-LYCHEE generates TRNG by acquiring the random number of Wifi module(ESP32) incorporated in it using I2C.
For supporting to CMSIS5/RTX5, I added the start-up processing of 3 toolchains (ARMCC, GCC_ARM, IAR) and the register definition of RZ/A1LU specific.
In addition, I added the linker script files to implement the dynamic HEAP the same as GR-PEACH(RZ/A1H).
I modified the lack of copyright in the below header files that I added for commonizing the RZ_A1 related files.
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/mbed_drv_cfg.h
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_VK_RZ_A1H/mbed_drv_cfg.h
Martin Kojtal
TomoYamanaka
Alastair D'Silva
David Saada
Cruz Monrreal
Deepika
Yossi Levy
Michael Coulter
Kevin Bracey
Bartek Szatkowski
Cruz Monrreal
mbedNoobNinja
Martin Kojtal