Commit Graph

6511 Commits (0542b40f3640c89b42b39ee5ff114c8f409e6cbe)

Author SHA1 Message Date
Martin Kojtal a17866e623
Merge pull request #12559 from jeromecoutant/PR_DISCO_L4R9
DISCO_L4R9I correct LED pins
2020-03-04 07:48:32 +00:00
Martin Kojtal b3583f04cf
Merge pull request #12464 from jeromecoutant/PR_ETHERNET
STM32 EMAC : add configuration choice and connection check
2020-03-03 16:04:18 +00:00
Martin Kojtal 4f07086d85
Merge pull request #12557 from OpenNuvoton/nuvoton_m487_wdt_reset_powerdown
M487: Fix crash on WDT reset from power-down
2020-03-03 14:24:25 +00:00
jeromecoutant 3e30033822 DISCO_L4R9I correct LED pins 2020-03-03 13:36:57 +01:00
Martin Kojtal bad9c57085
Merge pull request #12460 from mprse/spi_init_nc_fix
Allow MISO/MOSI set to NC during SPI initialisation (fix for issue #12435)
2020-03-03 09:56:47 +00:00
jeromecoutant 1b40076376 STM32 EMAC : more configurable
- PHY default configuration can be changed
  - AutoNegotiation
  - Speed
  - DuplexMode
- PHY register offset can be updated depending on chosen PHY

All unused parameters are cleaned.
2020-03-02 16:19:26 +01:00
Dustin Crossman c7ec670886 Remove reset reason from Future Sequana targets. 2020-02-27 09:59:43 -08:00
Martin Kojtal fc5f3259de
Merge pull request #12458 from GaborAbonyi/add_musca_b1_platform
Add Musca B1 target
2020-02-27 13:53:58 +00:00
Martin Kojtal 2d93a4578d
Merge pull request #12451 from jeromecoutant/PR_QSPI_TRACE
STM32 : enable MBED trace for QSPI
2020-02-27 10:02:46 +00:00
Chun-Chieh Li cbf1a8a6fd M487: Get around h/w issue with reset from power-down mode
When UART interrupt enabled and WDT reset from power-down mode, in the next
cycle, UART interrupt keeps breaking in and cannot block unless via NVIC. To
get around it, we deliberately make up a signal of WDT wake-up from power-down
mode in the start of boot proces when WDT reset is detected.
2020-02-27 17:46:19 +08:00
Chun-Chieh Li 55f88a0942 M487: Re-implement Reset_Handler() in naked inline assembly
This is to guarantee SRAM bank2, not initialized yet, isn't used for stack by function preamble code at the very start.
2020-02-27 17:38:53 +08:00
Martin Kojtal 5c16018c96
Merge pull request #12509 from SiliconLabs/bugfix/rtcc_lpticker_coexistence
EFM32: RTCC bugfix for #12374
2020-02-27 07:21:14 +00:00
Martin Kojtal 98db25537a
Merge pull request #12440 from dustin-crossman/pr/reset_reason
Implement reset_reason api for cypress targets
2020-02-25 15:24:54 +00:00
Steven Cooreman 9bc59fe2d7 Bugfix for #12374
Use an RTCC retention register to keep track of user timebase for RTC API. RTC and LP Ticker implementations use the same counter, but they shouldn't share timebases.
2020-02-25 11:44:12 +01:00
Martin Kojtal 1629103fb1
Merge pull request #12421 from dustin-crossman/pr/cy_targets_reorganization
Cypress Targets Reorganization
2020-02-24 16:25:08 +00:00
Martin Kojtal 119931e56d
Merge pull request #12478 from OpenNuvoton/nuvoton_m2351_minor
M2351: Fix some minor issues
2020-02-24 12:51:52 +00:00
Martin Kojtal f47e569da5
Merge pull request #12496 from amq/efm32_fix_pinmap_test
EFM32: fix mbed_hal-pinmap test
2020-02-24 11:58:06 +00:00
Martin Kojtal ec2da1ae54
Merge pull request #12492 from miteshdedhia7/pr/psoc6cm0p-update-1.1.1
Update psoc6cm0p asset to version 1.1.1.
2020-02-24 11:27:18 +00:00
amq ca9424f6ba EFM32: fix mbed_hal-pinmap test 2020-02-24 11:25:01 +01:00
Martin Kojtal dc733d8883
Merge pull request #12477 from fkjagodzinski/hal-gpio-get_capabilities
HAL: Add a get_capabilities() function to GPIO API
2020-02-24 07:47:39 +00:00
midd 6baafdaf81 Update psoc6cm0p asset to version 1.1.1. This version is built with PSoC 6 Peripheral Driver Library (PDL) 1.4.1 2020-02-21 10:52:33 -08:00
Dustin Crossman 404dacc9ea Implemented reset reason api. 2020-02-21 09:48:26 -08:00
Tamas Kaman 551c3c553c Add ARM_MUSCA_B1 as a new target platform
Musca-B1 is a Cortex-M33 based target with security extension enabled.

- ARM_MUSCA_B1 is the non-secure target running mbed-os.
- ARM_MUSCA_B1_S is the secure target running TF-M.
- TF-M sources were imported and patched in previous commits.
- TF-M secure bootloader (McuBoot) for MUSCA_B1 is submitted by a
  pre-built binary.
- A post-build hook concatenates The secure and non-secure binaries,
  signs it and then concatenates the bootloader with the signed binary.

Change-Id: I4b36290941b5f0bb7aa7c12dda2f38b5c1e39ae2
Signed-off-by: Tamas Kaman <tamas.kaman@arm.com>
Signed-off-by: Gabor Abonyi <gabor.abonyi@arm.com>
2020-02-21 14:34:39 +01:00
Martin Kojtal 8f1bf967d3
Merge pull request #11942 from michalpasztamobica/remove_deprecated_apis
IPCore String-based API removal
2020-02-21 12:14:06 +00:00
Martin Kojtal 72b2fcf29a
Merge pull request #12384 from jeromecoutant/PR_WBDEBUG
STM32WB : update BLE part with better support
2020-02-21 12:12:42 +00:00
Martin Kojtal 685e0be935
Merge pull request #12473 from amock/fix-MCUXpresso-dac
Fix Freescale MCUXpresso AnalogOut
2020-02-20 15:18:14 +00:00
Martin Kojtal 3662759a0e
Merge pull request #12438 from hugueskamba/hk-fix-baremetal-cy9cproto
Fix CY8CPROTO_062_4343W baremetal build
2020-02-20 12:50:29 +00:00
jeromecoutant 9977ace2c9 STM32 : enable MBED trace for QSPI 2020-02-20 12:20:24 +01:00
jeromecoutant a1570f936f STM32WB : Add ReadMe file
Help on FW update procedure
2020-02-20 09:20:44 +01:00
jeromecoutant 9d016022b6 STM32WB clean SetSysClock 2020-02-20 09:20:44 +01:00
jeromecoutant ebae0e56d4 STM32WB align deepsleep functions with CubeFW 2020-02-20 09:20:43 +01:00
Alan Mock b3c0ef81dc The DAC init was using the ADC pinmap. This fixes that. 2020-02-19 22:33:07 -08:00
Filip Jagodzinski 09ecd2fdc0 Nuvoton: Add gpio_get_capabilities()
TARGET_NANO100, TARGET_NUC472 & TARGET_M451 do not support input pull
mode configuration.
2020-02-19 18:58:47 +01:00
Filip Jagodzinski 1b894aa67a K64F: Add gpio_get_capabilities()
Remove the gpio_pinmap() for this target. GPIO tests are skipped based
on pin's capabilities.
2020-02-19 18:58:47 +01:00
Martin Kojtal 043f68b9a7
Merge pull request #12454 from OpenNuvoton/nuvoton_spi_no_miso
Nuvoton: Optimize spi_master_write(...) in case of no SPI MISO pin
2020-02-19 14:33:42 +00:00
Martin Kojtal 1f8778b15b
Merge pull request #12449 from eavelardev/patch-2
Add missing pins def for ARDUINO_NANO33BLE
2020-02-19 14:32:51 +00:00
Martin Kojtal 1c00adc6ba
Merge pull request #12447 from eavelardev/patch-1
fix targets device_name with nrf51822 32K SoC
2020-02-19 14:32:06 +00:00
Martin Kojtal 664000ac82
Merge pull request #12431 from the-real-blackh/master
Nordic NRF52 GPIO API: Fix non-deterministic failure to configure interrupt handling
2020-02-19 12:54:58 +00:00
Martin Kojtal 9f5ced30dc
Merge pull request #12415 from jeromecoutant/PR_H7README
STM32H7 : add readme file for dual core use
2020-02-19 12:52:10 +00:00
Przemyslaw Stekiel 713be4fd77 STM pin_function(), pin_mode(): return immediately when given pin is NC
Additionally, remove redundant pin checks against NC when above functions are used.
2020-02-19 11:46:59 +01:00
Przemyslaw Stekiel 5aaf3b7479 K64F, LPC SPI driver: Fix style 2020-02-19 11:46:57 +01:00
Chun-Chieh Li 34d3d43f0d M2351: Fix NSC_Init(...)
Actually, NSC_Init(...) is not used by secure code currently. No need to rebuild secoure image/lib.
2020-02-19 17:59:49 +08:00
Chun-Chieh Li 7328467012 M2351: Fix interrupt vector with BSP update 2020-02-19 17:57:01 +08:00
Chun-Chieh Li d5620b66a7 M2351: Fix RTC comment 2020-02-19 17:51:49 +08:00
Przemyslaw Stekiel c6a6984ab8 Allow NC for MISO or MOSI while initializing SPI
Static pinmap extension required to use pin_function() and pin_mode() functions instead of pinmap_pinout(). Unfortunatelly pin_function() does not allow passing NC pin.
Call pin_function() and pin_mode() only if MISO/MOSI pin is not NC.
2020-02-18 13:38:43 +01:00
jeromecoutant 065a79e48a STM32H7: add README file for dual core use 2020-02-17 16:21:20 +01:00
Eduardo Avelar 5984f02203
Add missing pins def for ARDUINO_NANO33BLE
We add pins def for the sense version of the board.

https://content.arduino.cc/assets/Pinout-NANOsense_latest.pdf
https://content.arduino.cc/assets/NANO33BLE_V2.0_sch.pdf
2020-02-17 01:01:33 -08:00
Chun-Chieh Li 8df96ec50a Nuvoton: Make SPI inter-frame (delay match configured suspend interval
In no MISO case, skip SPI read so that no more write/read delay contribute to SPI inter-frame delay when data is written successively.

Update targets:
-   NUMAKER_PFM_NANO130
-   NUMAKER_PFM_NUC472
-   NUMAKER_PFM_M453
-   NUMAKER_PFM_M487/NUMAKER_IOT_M487
-   NU_PFM_M2351_*
-   NUMAKER_IOT_M263A
-   NUMAKER_M252KG
2020-02-17 15:00:09 +08:00
Eduardo Avelar 77852199cf
fix targets device_name with nrf51822 32K SoC
nrf51822 32K SoC corresponds to device name nRF51822_xxAC
2020-02-16 20:24:07 -08:00
Hugues Kamba 18193abdb5 Fix CY8CPROTO_062_4343W baremetal build
Make a Mbed library with Cypress WHD files so it is automatically excluded
when building with the bare metal profile. Create another Mbed library to
group network files that use WHD so they can also be excluded fro the bare
metal profile.
2020-02-16 13:02:36 +00:00