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78 Commits (refactor_hal_greentea_cmake)

Author SHA1 Message Date
Samu Ampio cbc0ee60b0
Fix Extended Message Filter count in STM CAN API 
As per STM32H7-series reference manuals:
"Up to 64 filter elements can be configured for 29-bit extended IDs."
This commit fixes a bug which prevented receiving CAN-messages
with extended IDs.
 2021-08-13 12:43:36 +03:00
Martin Kojtal 7095dc79fa
Merge pull request #14688 from MubeenHCLite/CAN_rxinterrupt_fix 
Solution for mutex problem in CAN read ISR
 2021-07-12 17:21:56 +02:00
Mohammed Mubeen b5e785efd3 Updated can bit timing parameters (TSEG1, TSEG2) as per the ISO11898-2 
standard
 2021-07-07 16:55:20 +05:30
Mohammed Mubeen 65a72c29c8 Added documentation for the implementation 2021-07-06 20:12:12 +05:30
Mohammed Mubeen 8622f66b46 Resolved review comments 2021-07-03 13:22:25 +05:30
Mohammed Mubeen 5d861f895d
Merge branch 'master' into CAN_rxinterrupt_fix 2021-06-29 18:32:48 +05:30
Mohammed Mubeen 1a2d624828 Added Raw CAN (unlocked can read api) and updated the code for the 
rxInterrupt to work for all CAN instances
 2021-06-29 12:46:21 +05:30
Martin Kojtal de7e326bc1
Merge pull request #14677 from MubeenHCLite/corrections_in_STM_canapi 
Changes required in STM CAN read API
 2021-06-25 10:49:20 +02:00
Mohammed Mubeen 6f436dbac3 Adjusted spcae alignment 2021-06-25 12:06:44 +05:30
Martin Kojtal 829164acdb
Merge pull request #14778 from MubeenHCLite/Can_TxIrq_callback_resolution 
CAN TxIRq callback never called -STM32G474
 2021-06-24 15:44:52 +02:00
Mohammed Mubeen 9732cdcce6 Updated comments appropriately 2021-06-22 14:22:16 +05:30
Mohammed Mubeen 2cc08cf5a6 Rebaseing to current master 2021-06-21 14:34:48 +05:30
Mohammed Mubeen 5049b518fb Added working functionality to the can_filter api to accept IDs for filtering in both bxCAN and FDCAN 2021-06-21 14:17:41 +05:30
Mohammed Mubeen 064f94d0a6 Added to return failure if filter if unsupported format 2021-06-21 14:17:31 +05:30
Mohammed Mubeen 274d8aa40c The default FIFO for can by hardware is FIFO0 as set by the CAN STM API in configuration. Hence the read api is modified to access FIFO0 only 2021-06-21 14:17:14 +05:30
Mohammed Mubeen 1fc141905e Added code to set TBTIE, to enable the tx complete/abort interrupts, for 
all supported FDCAN platforms
 2021-06-15 20:17:50 +05:30
jeromecoutant c02cb71b35 STM32 common filess astyle 2021-05-25 14:45:30 +02:00
Mohammed Mubeen 033b08de19 Implementation for can_read to be deferred to thread context when rx 
interrupt is enabled.
 2021-05-21 16:11:37 +05:30
Cindy Li bda36681ba CAN: fix slave CAN start filter bank setup 2021-04-30 17:32:14 -04:00
reme 5a2835c18c STM32WL : ADDING STM32 SUPPORT 
Add code concerning all STM32 platforms
 2021-02-05 08:04:31 +00:00
Martino Facchin 04ac8a08b3 STM32H7: FDCAN: use PLL1Q frequency for calculations 2020-12-11 14:10:06 +01:00
Harrison Mutai 4fad1112e5 Add SPDX license identifier to Arm files 
Add license identifier to files which Arm owns the copyright to,
and contain either BSD-3 or Apache-2.0 licenses. This is to address
license errors raised by scancode analysis.
 2020-10-15 10:47:27 +01:00
m-ecry 73493b909a STM-can-api: Fixed variable name for H7 
- can_frequency uses f instead of hz for can frequency
 - Also added comment to system_clock
 2020-09-16 17:35:32 +02:00
m-ecry d0c8ad75e1 STM-can-api: Support reading of remote_msg 
- Previously a received msg was fixed of data_type
 2020-09-14 18:10:48 +02:00
m-ecry 13b663397f STM-can-api: Added usage of prescaler 
- This enables more frequencies, but without regard to the accuracy.
May still require manual clock setup, to remain in tolerance window
 2020-09-14 16:29:12 +02:00
Martin Eckardt 35c9e7a5ad Use HAL function for FDCAN_CLK-calculation 
- Thanks to @jeromecoutant for showing the HAL funtion
 - Added #ifdef guard to FDCAN2/3 handler functions
 2020-09-14 15:24:14 +02:00
Martin Eckardt 08ce2f2de8 Calculate FDCAN_clk instead of assuming fix 10MHz 
- The FDCAN_clk is calculated on runtime from the according
RCC-registers
 2020-09-07 02:08:59 +02:00
Martin Eckardt 9886532029 Added support for FDCAN3 2020-09-07 02:04:13 +02:00
Martin Eckardt 9bc2deb9aa make G4 target compileable with CAN support 2020-09-07 02:04:13 +02:00
Maarten de Klerk e6150ac722
Added error checking to can_filter() for Classic CAN 
Previously the function always returned 1 even when the configuration was illegal. I added a small check to HAL_CAN_ConfigFilter(...).
 2020-08-08 23:25:42 +02:00
Przemyslaw Stekiel 713be4fd77 STM pin_function(), pin_mode(): return immediately when given pin is NC 
Additionally, remove redundant pin checks against NC when above functions are used.
 2020-02-19 11:46:59 +01:00
Przemyslaw Stekiel fffc30ffda STM CAN: remove CAN_INIT_DIRECT macro 2019-12-18 10:43:55 +01:00
Przemyslaw Stekiel e0e280aeaf optimize can_init(): call can_init_freq() with default freq 2019-12-16 14:09:54 +01:00
Przemyslaw Stekiel 6a3e343ec6 Fix for issue #12104 (STM32 can_init_freq() ignores frequency) 2019-12-16 13:16:51 +01:00
Martin Kojtal 7177d8fefe
Merge pull request #11950 from ABOSTM/DISCO_H747I_TICKLESS 
DISCO_H747I: add support of MBED_TICKLESS
 2019-11-29 09:48:09 +01:00
Przemyslaw Stekiel b2dad08387 Change explicit pinmap to static pinmap 2019-11-28 08:32:12 +01:00
Przemyslaw Stekiel c8a80bbcd3 STM CAN driver: Add explicit pinmap support 2019-11-28 08:32:04 +01:00
Alexandre Bourdiol affe7113ef TARGET_STM: Remove timeout on HSEM. 
With tickless mechanism hsem can be used for quite a long time
(time to set up PLL clock).
Also, if hsem is held to long, then this is not the current core which is faulty,
but probably the other (the one which hold the HSEM)
 2019-11-27 14:25:43 +01:00
Alexandre Bourdiol adcf0e2fa5 DISCO_H747I Dualcore support 
Add 2 targets for DISCO_H747I dualcore:
* DISCO_H747I      -> for CM7 core
* DISCO_H747I_CM4  -> for CM4 core

Current restrictions:
* TICKLESS deactivated
* DeepSleep not supported (DeepSleep wrapped to sleep)

Warning: use of the same IP (example I2C1) by both core at the same time is not prevented,
but is strongly not recommended.
Some Hardware Semaphore are use for common IP, to manage concurrent access by both cores: Flash, GPIO, RCC.

Warning: Drag and drop of binary to DISCO_H747I will flash CM7.
         In order to flash CM4, one can use STM32 CubeProgrammer tool.
 2019-10-14 18:02:57 +02:00
jeromecoutant 5d80f9e98f STM32: remove compilation warning 2019-06-07 18:08:39 +02:00
Russ Butler 7e8695a2c5 Add HAL API for can pinmap 
Add the functions can_rd_pinmap and can_td_pinmap to all targets.
 2019-02-08 09:10:10 -06:00
jeromecoutant f1d10cfeff STM32: FDCAN support for H7 family 2019-01-21 13:53:19 +01:00
jeromecoutant 433ba46132 TARGET_STM astyle 2018-06-27 14:21:07 +02:00
bcostm d96e76e7bd STM32 CAN: fix wrong ID and MASK filter 2018-01-05 10:11:17 +01:00
Martin Kojtal cee180f472
Merge pull request #5667 from productize/fix-stm32-can3 
STM32: Fix CAN3
 2017-12-12 17:39:41 +00:00
Adam Heinrich 9ee222a8e6 STM32: Set valid filter number for CAN3 
Filter numbers 14 to 27 are reserved for dual CAN configuration.
However, CAN3 operates in single CAN configuration according to the
reference manual).
 2017-12-07 18:06:05 +01:00
bcostm bfc4d68ae0 STM32 CAN3: remove test of CAN_2 and CAN_3 
CAN_2 and CAN_3 are enum and not #define and this causes compilation error with GCC_ARM

Instead put back the test of CAN_NUM (which are defined in can_device.h).
 2017-12-07 18:04:34 +01:00
Adam Heinrich d33c0a6fa5 STM32: Pass correct id to can_irq() for CAN3 2017-12-06 19:41:20 +01:00
Mathieu Garivet 6ee3d80b1c Fix RTR position bit in TX mailbox register 2017-11-28 18:44:28 +01:00
bcostm 2d8d8ae9e1 STM32: fix error with CAN_3 not defined 2017-11-15 10:36:03 +01:00