Commit Graph

277 Commits (feature-chip)

Author SHA1 Message Date
Martin Kojtal f7d1f18a80
Merge pull request #14144 from sstaub/STM32-Arduino-Pinnames
Update for Arduino Pinnames
2021-01-20 08:34:56 +00:00
Stefan Staub c3dca94b78 Update for Arduino Pinnames 2021-01-12 22:43:42 +01:00
pea-pod e1c754b179 Add SPI bitwidths to ST targets where supported 2021-01-11 07:53:07 -06:00
Martin Kojtal d0cfc67652
Merge pull request #13962 from 0xc0170/cmake-fix-stm-armclang
STM: fix ARMClang sct files, using proper -E command
2020-11-26 13:13:34 +00:00
Martin Kojtal fc16d2bae7 STM: fix ARMClang sct files, using proper -E command
This is required for ARMClang, otherwise there is an error with unknown command.
2020-11-25 13:35:36 +00:00
David Douard 5a4a34802b
Fix a typo in STM32F3's CMakeList.txt
A typo has been introduced preventing the STM32F303x8 to be buildable using the new cmake based build system.
2020-11-25 11:53:59 +01:00
Martin Kojtal ced4aa6e2d
Merge pull request #13939 from jeromecoutant/PR_LSEDRIVE
STM32: LSE DRIVE feature update
2020-11-24 14:13:52 +00:00
Martin Kojtal a1fc9cdad5
Merge pull request #13915 from 0xc0170/cmake-stm32
CMake: add all TARGET_STM targets
2020-11-24 14:09:28 +00:00
jeromecoutant 29af76fcca STM32: LSE DRIVE feature update 2020-11-20 17:31:26 +01:00
reme 16e63dc108 STM32 FLASH API : add critical sections
See PR #13802 (for F4 board)

Concerned boards are

STM32F0
STM32F1
STM32F2
STM32F3
STM32F4
STM32F7
STM32G0
STM32G4
STM32H7
STM32L0
STM32L1
STM32L4
STM32L5

Adding test of return code of HAL_FLASH_Lock() function
Adding board STM32F4
Running AStyle
2020-11-20 08:03:24 +00:00
Martin Kojtal 468b66944d CMake: STM32 TARGET_ prefix removal fix 2020-11-18 12:13:46 +00:00
Martin Kojtal 6582c0af2c CMake: add STM32F3 targets 2020-11-17 12:37:26 +00:00
Martin Kojtal 43ff4ae865
Merge pull request #13874 from jeromecoutant/PR_F3_11
STM32F3 update drivers version to CUBE V1.11.1
2020-11-11 08:26:25 +00:00
Hugues Kamba e0aa49ffcf CMake: Add support for NUCLEO_F303K8
Added the board so it can be used for testing the bare-metal profile on a Mbed 2 board
2020-11-06 17:25:22 +00:00
jeromecoutant 56a7afdf66 STM32F3: update to match mbed 2020-11-06 10:29:54 +01:00
jeromecoutant 084b873173 STM32F3: CUBE V1.11.1 2020-11-05 16:59:06 +01:00
jeromecoutant 7f57005082 STM32F3: alignment with current CUBE V1.9.0 2020-11-05 15:34:54 +01:00
jeromecoutant 29e7e5ad4d STM32F3: directory restructuration 2020-11-05 13:32:09 +01:00
Harrison Mutai 4fad1112e5 Add SPDX license identifier to Arm files
Add license identifier to files which Arm owns the copyright to,
and contain either BSD-3 or Apache-2.0 licenses. This is to address
license errors raised by scancode analysis.
2020-10-15 10:47:27 +01:00
Martin Kojtal a17a481c54
Merge pull request #13583 from jeromecoutant/PR_ARDUINO_PIN
STM32: correct few Arduino pins value
2020-09-10 12:38:02 +01:00
Jaeden Amero 612b148fd4 stack: armc: Workaround config passing bug
Workaround a bug where the boot stack size configuration option is not
passed on to armlink, the Arm Compiler's linker. Prefer
MBED_CONF_TARGET_BOOT_STACK_SIZE if present, as this is what the
configuration system should provide. Fall back to MBED_BOOT_STACK_SIZE
if MBED_CONF_TARGET_BOOT_STACK_SIZE is not defined, as in the case of
buggy tools. If both MBED_CONF_TARGET_BOOT_STACK_SIZE and
MBED_BOOT_STACK_SIZE are not defined, then we fall back to a hard-coded
value provided by the linkerscript. See
https://github.com/ARMmbed/mbed-os/issues/13474 for more information.
2020-09-10 10:08:38 +01:00
Jaeden Amero 39e69d328d Use boot stack size from config system
To allow overriding of the boot stack size from the Mbed configuration
system, consistently use MBED_CONF_TARGET_BOOT_STACK_SIZE rather than
MBED_BOOT_STACK_SIZE.

Fixes #10319
2020-09-10 10:08:38 +01:00
jeromecoutant 3e653223d2 NUCLEO_F303ZE: wrong D1 pins 2020-09-10 10:05:40 +02:00
jeromecoutant 739b2048d4 STM32F3 baremetal support 2020-05-18 17:26:50 +02:00
jeromecoutant c96eb2cd0e STM32 rename TOOLCHAIN_ARM_STD into TOOLCHAIN_ARM 2020-05-15 10:41:28 +02:00
jeromecoutant 303752ad84 STM32 remove all TOOLCHAIN_ARM_MICRO 2020-05-15 09:37:40 +02:00
jeromecoutant f116fe0daa STM32F3 code cleaning 2020-05-14 13:55:21 +02:00
Hugues Kamba ce1c51ea51 ST Boards: Remove uARM tooolchain support
For NUCLEO_F401RE, NUCLEO_F411RE, NUCLEO_F303RE, and DISCO_L475VG_IOT01A:
* Ensure the scatter files for the ARM toolchain use 2 region memory model.
  The scatter files changes affects the following boards:
    * NUCLEO_F401RE, STEVAL_3DP001V1 (stm32f401xe.sct)
    * NUCLEO_F411RE, MTS_MDOT_F411RE, MTS_DRAGONFLY_F411RE, MTB_MTS_DRAGONFLY, SAKURAIO_EVB_01 (stm32f411re.sct)
    * NUCLEO_F303RE, NUCLEO_F303ZE (stm32f303xe.sct)
    * DISCO_L475VG_IOT01A, MTB_STM_L475 (stm32l475xx.sct)
* Remove the TOOLCHAIN_ARM_MICRO directories.
* Remove release_version as not necessary and as the targets can also run
  Mbed OS 6.
* Remove uARM support for all FAMILY_STM32 targets.
2020-04-30 14:17:39 +01:00
Hugues Kamba 4e61240838 Migrate NUCLEO_F303K8 to Mbed OS 5 baremetal
* Use two memory regions in ARM toolchain linker file to support Microlib
* Replace `target.default_lib` with `target.c_lib`
* Specify supported lib sizes per toolchain
* Add support for Mbed OS versions after Mbed 2
2020-04-21 12:11:35 +01:00
Martin Kojtal 7fd5119b89
Merge pull request #12341 from fkjagodzinski/fix-stm-hal_fpga
STM32L4: Fix the UART RX & TX data reg bitmasks
2020-02-10 13:21:31 +00:00
jeromecoutant 2368a07244 STM32: Fix the UART RX & TX data reg bitmasks 2020-02-07 16:23:50 +00:00
Qinghao Shi f7d9850fe7 Disable Analogin D13(PA_5) on some NUCLEO targets
- pins are connected to the LED, can't be used as analogin
2020-02-03 11:39:31 +00:00
Rajkumar Kanagaraj 957dca2082 Enabling small C library option and deprecating uARM toolchain
- By default, Mbed OS build tools use standard C library for all supported toolchains.
   It is possible to use smaller C libraries by overriding the "target.default_lib" option
   with "small". This option is only currently supported for the GCC_ARM toolchain.
   This override config option is now extended in the build tool for ARM toolchain.
 - Add configuration option to specify libraries supported for each toolchain per targets.
 - Move __aeabi_assert function from rtos to retarget code so it’s available for bare metal.
 - Use 2 memory region model for ARM toolchain scatter file for the following targets:
   NUCLEO_F207ZG, STM32F411xE, STM32F429xI, NUCLEO_L073RZ, STM32F303xE
 - Add a warning message in the build tools to deprecate uARM toolchain.
 - NewLib-Nano C library is not supporting floating-point and printf with %hhd,%hhu,%hhX,%lld,%llu,%llX
   format specifier so skipping those green tea test cases.
2019-12-19 10:05:11 -08:00
Kevin Bracey fe22bc023e Update HAL CRC API
* Change "is supported" check to be a macro, so it can be done at
  compile-time.
* Eliminate weird shift on 7-bit CRCs.
* Add support for 32-bit CRCs and reversals to TMPM3HQ.
2019-12-02 14:45:37 +02:00
Martin Kojtal 7177d8fefe
Merge pull request #11950 from ABOSTM/DISCO_H747I_TICKLESS
DISCO_H747I: add support of MBED_TICKLESS
2019-11-29 09:48:09 +01:00
Przemyslaw Stekiel b2dad08387 Change explicit pinmap to static pinmap 2019-11-28 08:32:12 +01:00
Przemyslaw Stekiel e3a34a57e1 Move GPIO_AF_NONE from PeripheralPins.h to PinNamesTypes.h 2019-11-28 08:32:10 +01:00
Przemyslaw Stekiel 6489bb7c99 STM: Add support for internal ADC pins 2019-11-28 08:32:06 +01:00
Przemyslaw Stekiel 42b2eeede9 NUCLEO_F303RE: Add explicit pinmap support 2019-11-28 08:32:06 +01:00
Martin Kojtal a1cddbae5f
Merge pull request #11938 from LMESTM/stm32_serial_clear_rxne
STM32: Update and align serial_clear implementations
2019-11-27 16:30:11 +01:00
Alexandre Bourdiol 41b038a028 TARGET_STM: rework hal_sleep management to be compatible with all STM32 families 2019-11-27 14:25:30 +01:00
Martin Kojtal 5f7ecea00b
Revert "MbedCRC and CRC HAL revisions" 2019-11-26 13:45:37 +00:00
Laurent Meunier f20529f9e6 STM32: Update and align serial_clear implementations
Clear RXNE flag by reading the RX register and align this implementation
on all families.
2019-11-25 14:55:32 +01:00
Kevin Bracey 1f94428a56 Update HAL CRC API
* Change "is supported" check to be a macro, so it can be done at
  compile-time.
* Eliminate weird shift on 7-bit CRCs.
* Add support for 32-bit CRCs and reversals to TMPM3HQ.
2019-11-13 14:31:49 +02:00
Przemyslaw Stekiel ee519e6a5c NUCLEO_F411RE, NUCLEO_L073RZ, NUCLEO_F303RE: Disable Analogin D13(PA_5) pin.
Analogin test fails on D13(PA_5) pin. When logic one (3.3V) is provided on this pin ADC reads 0.86 value. On other pins we got 0.98.
This is caused because this pin is connected to led2.
2019-10-30 14:34:57 +01:00
Martin Kojtal a07286676b
Merge pull request #11756 from JammuKekkonen/add_ccmram_section_for_f303re
Add option to use CCMRAM on F303xE.
2019-10-30 09:10:42 +01:00
Jammu Kekkonen 4dc4bfff9a Add option to use CCMRAM on F303xE. 2019-10-29 12:54:27 +02:00
Martin Kojtal df79609cc5
Merge pull request #11675 from jeromecoutant/PR_USB_STEP1
STM32 USB update step 1
2019-10-28 14:06:15 +01:00
Kevin Bracey fb6aa3ef4f Clean up ARM toolchain heap+stack setup in targets
ARM Compiler 6.13 testing revealed linker errors pointing out
conflicting use of `__user_setup_stackheap` and
`__user_initial_stackheap` in some targets. Remove the unwanted
`__user_initial_stackheap` from the targets - the setup is
centralised in the common platform code.

Looking into this, a number of other issues were highlighted

* Almost all targets had `__initial_sp` hardcoded in assembler,
  rather than getting it from the scatter file. This was behind
  issue #11313. Fix this generally.
* A few targets' `__initial_sp` values did not match the scatter
  file layout, in some cases meaning they were overlapping heap
  space. They now all use the area reserved in the scatter file.
  If any problems are seen, then there is an error in the
  scatter file.
* A number of targets were reserving unneeded space for heap and
  stack in their startup assembler, on top of the space reserved in
  the scatter file, so wasting a few K. A couple were using that
  space for the stack, rather than the space in the scatter file.

To clarify expected behaviour:

* Each scatter file contains empty regions `ARM_LIB_HEAP` and
  `ARM_LIB_STACK` to reserve space. `ARM_LIB_STACK` is sized
  by the macro `MBED_BOOT_STACK_SIZE`, which is set by the tools.
  `ARM_LIB_HEAP` is generally the space left over after static
  RAM and stack.
* The address of the end of `ARM_LIB_STACK` is written into the
  vector table and on reset the CPU sets MSP to that address.
* The common platform code in Mbed OS provides `__user_setup_stackheap`
  for the ARM library. The ARM library calls this during startup, and
  it calls `__mbed_user_setup_stackheap`.
* The default weak definition of `__mbed_user_setup_stackheap` does not
  modify SP, so we remain on the boot stack, and the heap is set to
  the region described by `ARM_LIB_HEAP`. If `ARM_LIB_HEAP` doesn't
  exist, then the heap is the space from the end of the used data in
  `RW_IRAM1` to the start of `ARM_LIB_STACK`.
* Targets can override `__mbed_user_setup_stackheap` if they want.
  Currently only Renesas (ARMv7-A class) devices do.
* If microlib is in use, then it doesn't call `__user_setup_stackheap`.
  Instead it just finds and uses `ARM_LIB_STACK` and `ARM_LIB_HEAP`
  itself.
2019-10-23 14:53:49 +03:00
jeromecoutant 6986daac61 STM32F3 USB pins addition 2019-10-21 14:49:19 +02:00