mbed-os/targets
Bradley Scott c5d379e908 STM32F3: Correct handling of USB ISTR and endpoint registers
The USB ISTR register consists of a mix of bits that are
write-zero-to-clear and read only bits.  As such, to clear a bit in
the ISTR, you should simply write the bitwise-NOT of the bit to clear.
Previously, the __HAL_PCD_CLEAR_FLAG() macro would do a bitwise-AND
with the ISTR register contents to clear a bit, but this could result
in another bit being inadvertently cleared if it is set by hardware
between the read and the write of the ISTR register.

Similarly, the USB endpoint registers have two bits that are
write-zero-to-clear, USB_EP_CTR_RX and USB_EP_CTR_TX, but the
PCD_CLEAR_RX_EP_CTR() and PCD_CLEAR_TX_EP_CTR() macros wrote back the
last read value for one of these bits when clearing the other bit.
This could result in inadvertent clearing of one of these bits if it
were set by the hardware between the read and the write.  These macros
have now both been adjusted to always write one to the bit not being
cleared to prevent inadvertent clears.
2017-05-21 14:37:55 +01:00
..
TARGET_ARM_SSG Renamed files in platform to match source names 2017-02-22 18:17:54 -06:00
TARGET_Atmel Renamed files in platform to match source names 2017-02-22 18:17:54 -06:00
TARGET_Freescale Addressed review comments: fixed unmapped switches and added Hexiware buttons 2017-05-05 16:48:52 +01:00
TARGET_Maxim Addressed review comments: fixed unmapped switches and added Hexiware buttons 2017-05-05 16:48:52 +01:00
TARGET_NORDIC Added mapping to USER_BUTTON-labelled switches 2017-05-05 16:48:51 +01:00
TARGET_NUVOTON Fix flash algorithm 2017-04-21 15:42:16 +01:00
TARGET_NXP Added mapping to BTN-labelled switches 2017-05-05 16:48:51 +01:00
TARGET_ONSEMI Fixed typos 2017-05-05 16:48:52 +01:00
TARGET_RENESAS Added mapping to USER_BUTTON-labelled switches 2017-05-05 16:48:51 +01:00
TARGET_STM STM32F3: Correct handling of USB ISTR and endpoint registers 2017-05-21 14:37:55 +01:00
TARGET_Silicon_Labs Added mapping to BTN-labelled switches 2017-05-05 16:48:51 +01:00
TARGET_WIZNET/TARGET_W7500x Renamed files in platform to match source names 2017-02-22 18:17:54 -06:00
TARGET_ublox Renamed files in platform to match source names 2017-02-22 18:17:54 -06:00
targets.json DISCO_L072CZ_LRWAN1: targets.json correction 2017-05-21 14:37:52 +01:00