Commit Graph

910 Commits (ada0d214015aa2e095be1e0108cf6bdd8417cf15)

Author SHA1 Message Date
Bradley Scott c5d379e908 STM32F3: Correct handling of USB ISTR and endpoint registers
The USB ISTR register consists of a mix of bits that are
write-zero-to-clear and read only bits.  As such, to clear a bit in
the ISTR, you should simply write the bitwise-NOT of the bit to clear.
Previously, the __HAL_PCD_CLEAR_FLAG() macro would do a bitwise-AND
with the ISTR register contents to clear a bit, but this could result
in another bit being inadvertently cleared if it is set by hardware
between the read and the write of the ISTR register.

Similarly, the USB endpoint registers have two bits that are
write-zero-to-clear, USB_EP_CTR_RX and USB_EP_CTR_TX, but the
PCD_CLEAR_RX_EP_CTR() and PCD_CLEAR_TX_EP_CTR() macros wrote back the
last read value for one of these bits when clearing the other bit.
This could result in inadvertent clearing of one of these bits if it
were set by the hardware between the read and the write.  These macros
have now both been adjusted to always write one to the bit not being
cleared to prevent inadvertent clears.
2017-05-21 14:37:55 +01:00
arostm 5a05033f86 DISCO_L072CZ_LRWAN1: change date in periperalPins.c 2017-05-21 14:37:54 +01:00
arostm d28d022a68 DISCO_L072CZ_LRWAN1: peripheralPins add and change comments 2017-05-21 14:37:53 +01:00
arostm 868a5f64ab DISCO_L072CZ_LRWAN1: prepipheralPins and PinNames correction 2017-05-21 14:37:53 +01:00
arostm f412e3dd96 DISCO_L072CZ_LRWAN1: Typo correction 2017-05-21 14:37:53 +01:00
arostm de2f5408d7 DISCO_L072CZ_LRWAN1: Typo correction in peipheralPins.c and PinNames.h 2017-05-21 14:37:53 +01:00
arostm 8eb8f3a0c1 DISCO_L072CZ_LRWAN1: PinsName.h => PA_5 changed with PB_13 for the SPI_SCLK 2017-05-21 14:37:52 +01:00
arostm a1e78eab4c DISCO_L072CZ_LRWAN1: targets.json correction 2017-05-21 14:37:52 +01:00
arostm 71505b3ca0 DISCO_L072CZ_LRWAN1: typo correction 2017-05-21 14:37:52 +01:00
arostm f1b01cf518 DISCO_L072CZ_LRWAN1: PinNames.h correction (USB TX and RX) 2017-05-21 14:37:51 +01:00
arostm af661bc703 DISCO_L072CZ_LRWAN1: Clock configuration => 30MHz to 32MHz 2017-05-21 14:37:51 +01:00
arostm f71b20ff1b DISCO_L072CZ_LRWAN1: PreipheralPins.c corrections 2017-05-21 14:37:51 +01:00
arostm bb71895b7c DISCO_L072CZ_LRWAN1: Change LED PIN definition 2017-05-21 14:37:51 +01:00
Alexis ROCHE 6432da0763 DISCO_L072CZ_LRWAN1: typo correction 2017-05-21 14:37:50 +01:00
Alexis ROCHE 37069888c6 DISCO_L072CZ_LRWAN1: add LRWAN1 to the name 2017-05-21 14:37:50 +01:00
Alexis ROCHE 04645f09bb DISCO_L072CZ: Modifications and verifications to build 2017-05-21 14:37:49 +01:00
Alexis ROCHE e5db7c1da5 DISCO_L072CZ: Add all files (pinout, startup, etc...) 2017-05-21 14:35:28 +01:00
Bartek Szatkowski a50c6f3812 Odin: Disable sleep as it's not compatible with WiFi driver 2017-05-21 14:35:27 +01:00
Kevin Gilbert 5fb0d56d76 Fixed typos 2017-05-05 16:48:52 +01:00
Kevin Gilbert e52f649555 Addressed review comments: fixed unmapped switches and added Hexiware buttons 2017-05-05 16:48:52 +01:00
Kevin Gilbert ad8f2fcbdf Added mapping to USER_BUTTON-labelled switches
Revert HRM1017 file source deletion

Added in small comment next to additions

Added mapping to BTN-labelled switches

Added mapping to USER_BUTTON-labelled switches

Undo incorrect mapping to SWIO pin in NORDIC target
2017-05-05 16:48:51 +01:00
Kevin Gilbert 1b53295f46 Added mapping to BTN-labelled switches 2017-05-05 16:48:51 +01:00
Kevin Gilbert b1653431a8 Adding consistent button pin mappings 2017-05-05 16:48:50 +01:00
Adam Green 5fdf630396 Inherit Xadow M0 target from LPC11U35_501
targets/targets.json already added MCU_LPC11U35_501 as an extra label
but it didn't have LPC11U35_501 (without the MCU_ prefix). Both of
these target names are used as folder names to organize files
specific to this device. For example the LPC11U35.ld linker script used
by GCC_ARM for this target is located in a TARGET_LPC11U35_501 folder.

I switched to using inheritance to properly setup the target labels
based on @theotherjimmy comments on PR #4252. Everything in the
XADOW_M0 targe appears to have been copy/pasted from LPC11U35_501
anyway so inheritance seems to be the best way to set the values of
the XADOW_M0 properties.
2017-05-05 16:48:50 +01:00
Daniel Zimmermann 14a2801a1b LPC4088: Enable LWIP feature
This patch enable the LWIP feature for the LPC4088 and LPC4088_DM boards.
The lwIP stack support already this hardware.
See: ./features/FEATURE_LWIP/lwip-interface/lwip-eth/arch/TARGET_NXP/lpc17_emac.c
2017-05-05 16:48:48 +01:00
Laurent MEUNIER f38998cae5 STM32 Fixed warning related to __packed redefinition
Before this patch, many warnings like below were generated
during compilation with ArmCC
[Warning] lwip_ethernet.h@57,0:  #3135-D: attribute does not apply to any entity

This happens here as ``--gnu`` option of ArmCC is being used, which
enables the GNU compiler extensions that the ARM compiler supports.

This is solve by adding a extra check on __CCARM .
2017-05-05 16:48:48 +01:00
Adam Green 2f2026e36f Fix C++11 build error w/ u-blox EVK-ODIN-W2
When attempting to perform a test build of various mbed-os targets with
GCC configured to build -std=gnu++11, all of the targets built
successfully except for this one. It gave errors like this:
    ../mbed-os/targets/TARGET_STM/TARGET_STM32F4/TARGET_UBLOX_EVK_ODIN_W2/sdk/wifi_emac/wifi_emac_api.cpp: In function 'emac_interface_t* wifi_emac_get_interface()':
    ../mbed-os/targets/TARGET_STM/TARGET_STM32F4/TARGET_UBLOX_EVK_ODIN_W2/sdk/wifi_emac/wifi_emac_api.cpp:331:38: error: use of deleted function 'emac_interface::emac_interface()'
             _intf = new emac_interface_t();
                                          ^
    In file included from ../mbed-os/targets/TARGET_STM/TARGET_STM32F4/TARGET_UBLOX_EVK_ODIN_W2/sdk/wifi_emac/wifi_emac_api.cpp:9:0:
    ../mbed-os/hal/emac_api.h:150:16: note: 'emac_interface::emac_interface()' is implicitly deleted because the default definition would be ill-formed:
     typedef struct emac_interface {
                    ^
    ../mbed-os/hal/emac_api.h:150:16: error: uninitialized const member in 'struct emac_interface'
    ../mbed-os/hal/emac_api.h:151:32: note: 'const emac_interface_ops_t emac_interface::ops' should be initialized
         const emac_interface_ops_t ops;

This commit contains a proposed change which fixes this issue by not
using the new operator to allocate the emac_interface_t structure but
instead using the malloc() function since the construction is being
handled explicitly in the subsequent lines of the
wifi_emac_get_interface() function anyway.

I also added code which only completes the initialization of the _intf
object if its allocation succeeds and just returns NULL otherwise.

I see no deallocation of the _intf object occurring so no change from
delete to free() needed to be made.
2017-05-05 16:48:47 +01:00
Chris ce2ea7f8ee fixed missing device_name for xDot and removed progen 2017-05-05 16:48:46 +01:00
maclobdell eccd4fbe28 Reduce default heap size allocated by IAR to 1/4 of total RAM.
Allows mesh minimal example to compile with IAR.
2017-05-05 16:48:45 +01:00
Steven Cooreman 6071b14fdc Rename targets
Due to limitation in the mbed website backend (board names need to be <= 19 characters), we are shortening the CLI target names from THUNDERBOARD to TB.
@screamerbg
2017-05-05 16:48:42 +01:00
Bartek Szatkowski 9ce6141626 MAX32630: Fix sleep definitions 2017-04-24 11:25:35 +01:00
jeromecoutant 74c2273f42 STM32F2 Internal ADC channels rework
Internal ADC pin are now out of PinMap_ADC array
2017-04-21 15:42:26 +01:00
jeromecoutant c23fea7de0 NUCLEO_F207ZG: I2C_3 is not available 2017-04-21 15:42:25 +01:00
Rob Meades 896dc40630 make the UBLOX_C030 target private and introduce UBLOX_C030_U201 and UBLOX_C030_N211 for the two versions of the board (for the Sara U201 module and Sara N211 module respectively). These targets then inherit the UBLOX_C030 "base" target. The two targets are the same right now but will diverge when the cellular API is introduced. 2017-04-21 15:42:25 +01:00
Andrzej Puzdrowski 212d74ca94 fix coding style us_ticker.c 2017-04-21 15:42:25 +01:00
Andrzej Puzdrowski 92cfa96502 fix: - rtc overflow-while-set-timestamp issue - timer has a race condition 2017-04-21 15:42:25 +01:00
jeromecoutant 08e79cb6b3 STM32F7 Internal ADC channels rework
Internal ADC pin are now out of PinMap_ADC array
2017-04-21 15:42:24 +01:00
jeromecoutant 559fe3dec6 STM32L4 Internal ADC channels rework
Internal ADC pins are now out of PinMap_ADC array
2017-04-21 15:42:24 +01:00
Mahadevan Mahesh 7f1ffbdb06 MCUXpresso: Update ARM linker files to reduce RAM reserved for stack & heap
Heap and stack size is determined via the RTOS.

Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2017-04-21 15:42:22 +01:00
jeromecoutant 8e4c9c3238 STM32 increase IAR heap size for big RAM targets 2017-04-21 15:42:22 +01:00
Andrzej Puzdrowski 6b4acbbf7e us_ticker: - extarct for check rtc overflow - make common_rtc_32bit_ticks_get safe against preemption. 2017-04-21 15:42:21 +01:00
Andrzej Puzdrowski 3a2718b5c5 If rtc overflow occurr while setting of timestam then the ccompara-event ocurre (erroneusly) in 512s. - move ovf handler at the begining of rtc handler for mitigate the case (mitigate issue for exexution from rtc handler) - add repeating of operation of set a timestamp in cas that rtc overflow occured during the operation. 2017-04-21 15:42:21 +01:00
Seppe Stas eeba630ca8 EFM32: Fixed `pwmout_all_inactive` being inversed
If one of the CC channel pins is enabled, `pwmout_all_inactive` it
means a channel is active so it should return `true`.

This commit also contains some cleanup in `pwm_init`.
2017-04-21 15:42:21 +01:00
Rob Meades 708d606600 U-BLOX_C030: Default XTAL is now 12MHz onboard. Option to use Debug 8MHz XTAL by using Macro USE_DEBUG_8MHz_XTAL 2017-04-21 15:42:19 +01:00
Steven Cooreman 10e67bb837 Update pinmap of EFM32PG12 as well 2017-04-21 15:42:19 +01:00
Steven Cooreman 946321032c Support SPI CPP objects with different pinouts sharing the same peripheral 2017-04-21 15:42:19 +01:00
Steven Cooreman 15c28056c2 Update TB Sense 2
* Update i2c driver to tackle multiple I2C object instances on different pins
* Update pinmap to enable the extra peripherals of EFx32xG12 over EFx32xG1
2017-04-21 15:42:19 +01:00
jeromecoutant 4c166fc8b7 STM32F4 Internal ADC channels rework
Internal ADC pin are now out of PinMap_ADC array.
2017-04-21 15:42:18 +01:00
Sam Grove f98e0388cb Revert "STM32F4 Internal ADC channels rework" 2017-04-21 15:42:18 +01:00
jeromecoutant a8650d8e82 STM32F4 : remove SERIAL_TX and SERIAL_RX from available pins
Pins are used for debug printf
2017-04-21 15:42:17 +01:00