Cypress Target update to support WiFi Manufacturing Test
Adding IOCTLS in WhdSTAInterface for MFG Test.
Fix WHD EMAC interface to release buffer when emac is not powered up or callback
is not registered.
- A shared mutex is added for synchronization
- ScopedMutexLock is used to to protect
- SoftAP: start, stop
- STA: scan, join, disconnect
- Fix switching issue between SoftAP and STA mode for primary interface
- Avoid reinit primary interface by getting mapping the current interface to the other one which is already on
- In concurrent mode, STA is the default if it is up, otherwise SoftAP is default.
- For non-concurrent mode, the most recent started interface is set as default.
- Add WhdAccessPoint to include additional WHD scan info
- To save memory, only move assignment is supported for WhdAccessPoint
- Add scan_whd to scan for WhdAccessPoint
- Set set_blocking(false) to unsupported by return NSAPI_ERROR_UNSUPPORTED
This allows to specify which hal version to use for each family.
It can also be used to modify the thread stack size.
Signed-off-by: Vincent Veron <vincent.veron@st.com>
This port is based on :
* CurryGuy ethernet branch :
https://github.com/CurryGuy/mbed-os/tree/feature-stm32h7-emac
* STM32 Cube example :
Applications/LwIP/LwIP_HTTP_Server_Netconn_RTOS example
Signed-off-by: Vincent Veron <vincent.veron@st.com>
Deprecate wait() in favour of acquire(), try_acquire(),
try_acquire_for() and try_acquire_until().
Brings Semaphore more into line with CMSIS-RTOS 2 (which uses "acquire"),
itself (as it has "release"), and other classes having "try", "try for"
and "try until".
Also steps away from vague "wait" term - the primary operation here is
to acquire the semaphore, and this will of course sleep.
Since commit 12c6b1bd8, the i.MX RT1050 has effectively had its data
cache disabled, as the SDRAM was marked Shareable; for the Cortex-M7,
shareable memory is not cached.
This was done to make the Ethernet driver work without any cache
maintenance code. This commit adds cache maintenance and memory barriers
to the Ethernet driver, and removes the Shareable attribute from the
SDRAM, so the data cache is used again.
Cache code in the base fsl_enet.c driver has not been activated - the
bulk of it is in higher-level Read and Write calls that we're not using,
and there is one flawed invalidate in its initialisation. Instead
imx_emac.cpp takes full cache responsibility.
This commit also marks the SDRAM as read/write-allocate. As the
Cortex-M7 has its "Dynamic read allocate mode" to automatically switch
back to read-allocate in cases where write allocate is working poorly
(eg large memset), this should result in a performance boost with no
downside.
Activating write-allocate is also an attempt to provoke any flaws in
cache maintenance - the Ethernet transmit buffers for example will be
more likely to have a little data in the cache that needs cleaning.
Balaji Subramanyam
fred.li
Martin Kojtal
Bence Kaposzta
Ryan Morse
jeromecoutant
Lei Zhang
Rohan Fletcher
Tymoteusz Bloch
aqib-ublox
Kyle Kearney
Vincent Veron
Mahesh Mahadevan
Teja Narahari
Volodymyr Medvid
Kevin Bracey
蔡雪 (Xue Cai)