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2190 Commits (faec0c3ce52065e7f2dac0f89af04c2921cd6c51)

Author SHA1 Message Date
Martin Kojtal cee180f472
Merge pull request #5667 from productize/fix-stm32-can3 
STM32: Fix CAN3
 2017-12-12 17:39:41 +00:00
Martin Kojtal be52ba2156
Merge pull request #5363 from mprse/extended_rtc 
Add support and tests for extended RTC
 2017-12-12 17:36:44 +00:00
Martin Kojtal da43d655ff
Merge pull request #5459 from jeromecoutant/PR_LPT_RTC 
STM32 Low Power Timer feature updates
 2017-12-12 17:33:31 +00:00
Martin Kojtal aff1d3002f
Merge pull request #5577 from VeijoPesonen/realtek_rtl8195am_gt_wifi-set-credential 
REALTEK_RTL8195AM Wifi driver - adds check of credentials validity
 2017-12-12 17:31:04 +00:00
Martin Kojtal 6c59e13e76
Merge pull request #5581 from SiliconLabs/feature/remove-custom-sleepmodes 
Remove custom Silicon Labs sleep management
 2017-12-12 17:30:17 +00:00
Martin Kojtal 047455eee9
Merge pull request #5591 from helmut64/NUCLEO_STM32L433_NEW 
Support the STM NUCLEO_L433RC-P board
 2017-12-12 17:29:51 +00:00
Martin Kojtal 84192fe676
Merge pull request #5610 from garivetm/bugfix-STM32CAN 
STM32 - CAN - Fix RTR position bit in TX mailbox register
 2017-12-12 17:27:57 +00:00
Martin Kojtal 2eaa32f35f
Merge pull request #5627 from li-ho/ev_cog_armc6 
ADI: Add ARMC6 compatible code
 2017-12-12 17:27:20 +00:00
bcostm f08c04d81f STM32 CAN3: add CAN_3 declaration for DISCO_F769NI 2017-12-07 18:12:54 +01:00
Adam Heinrich 9ee222a8e6 STM32: Set valid filter number for CAN3 
Filter numbers 14 to 27 are reserved for dual CAN configuration.
However, CAN3 operates in single CAN configuration according to the
reference manual).
 2017-12-07 18:06:05 +01:00
bcostm bfc4d68ae0 STM32 CAN3: remove test of CAN_2 and CAN_3 
CAN_2 and CAN_3 are enum and not #define and this causes compilation error with GCC_ARM

Instead put back the test of CAN_NUM (which are defined in can_device.h).
 2017-12-07 18:04:34 +01:00
Edmund Hsu 165b2c665f Realign ADuCM4x50 and ADuCM302x instance memory blocks 
Ensure all instance memory blocks meet 4 byte alignment requirement
  without relying on compiler's or liker's optional settings:
  - gpioMemory[]                                    for adi_gpio_Init()
  - aRtcDevMem0[]                                   for adi_rtc_Open()
  - i2c_Mem[] or I2C_Mem[]                          for adi_i2c_Open()
  - spi_Mem0[], spi_Mem1[], spi_Mem2[] or SPI_Mem[] for adi_spi_Open()
 2017-12-07 14:57:08 +11:00
Adam Heinrich d33c0a6fa5 STM32: Pass correct id to can_irq() for CAN3 2017-12-06 19:41:20 +01:00
jeromecoutant 17a54840c7 STM32 RTC : update and comment prescaler values 2017-12-05 12:52:52 +01:00
Przemyslaw Stekiel 106561669f Update RTC drivers for extended RTC. 2017-12-05 07:54:02 +01:00
jeromecoutant 01b2b1baf3 STM32: RTC_LSI macro is replaced by lse_available config 2017-12-04 17:35:31 +01:00
jeromecoutant 354ed44a65 STM32 LOW_POWER_TIMER update : use error 2017-12-04 17:35:30 +01:00
jeromecoutant 85c337d0b9 STM32 LOW_POWER_TIMER update : rtc_init procedure 2017-12-04 17:35:29 +01:00
jeromecoutant c13ffaf477 STM32 LOW_POWER_TIMER update : sleep 
RSF synchro after deepsleep is not specific to Low Power Timer feature
And we have to check if RTC is configured before synchro
 2017-12-04 17:35:29 +01:00
jeromecoutant 0bf364ea55 STM32 LOW_POWER_TIMER update : rtc_api.c 
Add RSF synchro during init
Set a better WakeUp clock for long wake up period in order to stay in sleep mode
Use rtc_isenabled function before init as rtc_init is called at each set_time call
 2017-12-04 17:35:28 +01:00
jeromecoutant b65e861b20 STM32 LOW_POWER_TIMER update : lp_ticker 
Removed unnecessary part
 2017-12-04 17:35:27 +01:00
jeromecoutant feaa789c34 STM32 LOW_POWER_TIMER update : targets.json 
Move LSI configuration from macro to config part
Add missing boards to the LPT supported targets
 2017-12-04 17:35:26 +01:00
Steven Cooreman 813216306c Remove custom Silicon Labs sleep management 
Standardize on the mbed sleep manager by removing the sleepmodes API, and statically redirecting hal_sleep to EM1 and hal_deepsleep to EM2.
 2017-12-01 12:13:06 +01:00
Edmund Hsu 7239be2bd7 Update trng_api.c 
- Maintain compatible code for ARM 5 and ARM 6 while default alignment
   settings differ.
 - Instance memory containing memory pointers must be 4 byte aligned for
   all compilers regardless compilers' settings.
 - uint32_t is recommended to replace uint8_t for instance memory
   declaration because uint32_t guarantee 4 byte alignment.
 2017-12-01 13:23:24 +11:00
Edmund Hsu 7c8cbd6ca2 Add ARMC6 feature to EV_COG_AD4050LZ and EV_COG_AD3029LZ 2017-12-01 09:59:43 +11:00
Martin Kojtal c7e5eb2f97
Merge pull request #5397 from sakuraio/stm_sco-evb-01 
add target SAKURAIO_EVB_01.
 2017-11-30 18:16:09 +00:00
Martin Kojtal e4133501f1
Merge pull request #5531 from tung7970/feature-fota 
RTL8195AM - refactor bootloader and fota support
 2017-11-30 18:12:48 +00:00
Martin Kojtal a6df4ca119
Merge pull request #5550 from sarahmarshy/patch-13 
Fix bug in K64F trng_api.c
 2017-11-30 18:11:46 +00:00
Martin Kojtal 45e9e4cab3
Merge pull request #5565 from LMESTM/fix_slave_3wires 
STM32: SPI 3 wires mode not supported in SPI slave
 2017-11-30 18:11:16 +00:00
Martin Kojtal 118c1bb2b4
Merge pull request #5579 from SiliconLabs/feature/rail-2.1 
Upgrade Silicon Labs radio driver to v2.1.1
 2017-11-30 18:10:46 +00:00
Martin Kojtal 221b8a84b1
Merge pull request #5580 from bcostm/dev_usb_speed_disco-f746ng 
DISCO_F746NG: add usp_speed configuration
 2017-11-30 18:09:47 +00:00
Martin Kojtal 2b84a1742f
Merge pull request #5584 from SiliconLabs/feature/emlib-5.3.3 
Upgrade to Silicon Labs HAL
 2017-11-30 18:09:04 +00:00
Martin Kojtal aa176ee616
Merge pull request #5585 from SiliconLabs/bugfix/timer_precision 
Fix issue with timer timebase on EFR32
 2017-11-30 18:06:37 +00:00
Martin Kojtal 244d8a9c9d
Merge pull request #5601 from andreaslarssonublox/ublox_odin_driver_os_5_v2.3_rc1 
Updated ODIN drivers to v2.3 RC1
 2017-11-30 18:02:38 +00:00
Martin Kojtal 7767651858
Merge pull request #5609 from 0xc0170/fix_lpc546xx_enet 
LPC546XX: Add ENET support
 2017-11-30 18:00:30 +00:00
Martin Kojtal 6d50868756
Merge pull request #5611 from JanneKiiskila/rtl8195am-a3-fix 
Realtek RTL8195AM A3 fix
 2017-11-30 17:59:44 +00:00
Martin Kojtal 9314607050
Merge pull request #5616 from soramame21/ren-disco-f429zi 
Support bootloader for DISCO_F429ZI
 2017-11-30 17:57:35 +00:00
Boting Ren f48ac95a38 Support bootloader for DISCO_F429ZI. 2017-11-30 19:41:41 +09:00
Alessandro Angelino 1b0922e97b EFM32: Use SECURE_ACCESS to access the ROM table 
To allow enabling of uVisor on EFM32, the ROM table must be accessed
through the CMSIS-provided SECURE_ACCESS macro.
 2017-11-30 11:08:11 +01:00
Janne Kiiskilä 791343a1f7 Realtek RTL8195AM - define A3-A5 as NC 
Based on the Mbed OS website the A3 is connected to "DAC", however there
is no define for DAC. In order to get the Realtek RTL8195AM to even compile
with mbed-os-example-client now, we must have the A3 defined - it is one of
the standard Arduine header pins. Therefore, setting it as NC.

A4-A5 are not connected either, so adding them as "NC" as well.

Realtek will hopefully push a proper fix sooner or later, if there is a
more meaningful define for the A3 pin. They do state however that the
A0-A3 pins are not GPIO capable anyway.

Ref: https://os.mbed.com/platforms/Realtek-RTL8195AM/
 2017-11-29 12:35:02 +02:00
Mathieu Garivet 6ee3d80b1c Fix RTR position bit in TX mailbox register 2017-11-28 18:44:28 +01:00
Mahadevan Mahesh 1da73df27d FF_LPC546XX: Remove LWIP feature 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-11-28 16:18:44 +00:00
Mahadevan Mahesh f2d2ed44cd LPC546XX: Add ENET support 
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
 2017-11-28 16:18:36 +00:00
Tony Wu a4575a965f rtl8195am - refactor bootloader and ota support 
1. move ota region 1 from 0x00b000 to 0x040000
2. move ota region 2 from 0x0c0000 to 0x120000
3. refactor bootloader header as follows:

   uint32_t tag;
   uint32_t ver;
   uint64_t timestamp;
   uint32_t size;
   uint8_t hash[32];
   uint8_t campaign[16];
   uint32_t crc32;

   where,
   a. hash is the sha256 checksum of the payload.
   b. crc32 is the crc32 checksum of headers from tag to campaign.

4. Call NVIC_SystemReset for soft reset.

Signed-off-by: Tony Wu <tung7970@gmail.com>
 2017-11-28 21:33:51 +08:00
andreas.larsson f2de0956b4 Updated ODIN drivers to v2.3 RC1 2017-11-28 12:22:45 +01:00
Helmut Tschemernjak 63ad3aeae3 Added the proper defines for the STM32L432 bootloader support 2017-11-27 15:41:30 +01:00
Helmut Tschemernjak 4778a40643 Changed NVIC Flash base address to support the bootloader 2017-11-27 15:32:53 +01:00
Helmut Tschemernjak 65866dd10a Enbaled bootloader support for STM32L432KC 
Added NUCLEO_L433RC_P target
 2017-11-27 15:26:00 +01:00
Helmut Tschemernjak 632b2f1660 Updated wrongly defined UART3_BASE into USART3_BASE 2017-11-27 15:19:43 +01:00
Helmut Tschemernjak 66a1967fb4 Added TARGET_STM32L433RC stack size define into mbed_rtx.h 2017-11-27 15:15:17 +01:00