Laurent MEUNIER
e7cab5c8dc
[STM32] HAL F1: I2C fix btf / rxne cases
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Applying the same fix as in L1 and F4.
This is an alignement to F4 HAL as the same IP is used.
2016-12-14 08:35:32 +01:00
Laurent MEUNIER
f88803b7fe
STM32 F1 HAL V1.0.5
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This is a partial update of HAL drivers, especially for I2C driver update
2016-12-14 08:35:12 +01:00
Brian Daniels
6085905658
Renames i2c_api.c for STM32F1 targets to fix IAR exporter.
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The IAR build system does not allow two files to have the same name.
This renames the i2c_api.c file for the STM32F1 family to
i2c_api_stm32f1.c to avoid this issue. The common i2c_api.c file shared
among all ST targets is not actually used for STM32F1 targets as it
protected with an #ifdef guard.
2016-12-09 12:47:17 -06:00
Martin Kojtal
ce9d2526f8
Merge pull request #3409 from jeromecoutant/PR_ST_L1_ASSERT
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STM32L1 : map ST HAL assert into MBED assert
2016-12-09 15:38:21 +01:00
Martin Kojtal
e01366ce8f
Merge pull request #3399 from bcostm/fix_issue_3266
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NUCLEO_F103RB - Add SERIAL_FC feature
2016-12-09 15:37:57 +01:00
Martin Kojtal
e00850dbc9
Merge pull request #3382 from kgills/max32620_serial_readable
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[MAX32620] Fixing serial readable function.
2016-12-09 15:37:25 +01:00
Martin Kojtal
00696e623f
Merge pull request #3378 from NXPmicro/K66_ENET
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K66F: Enable LWIP feature
2016-12-09 15:36:58 +01:00
Martin Kojtal
b13954c6b5
Merge pull request #3377 from LMESTM/fix_L152RE_Rcc_Config
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STM32 NUCLEO-L152RE Update system core clock to 32MHz
2016-12-09 15:36:07 +01:00
Martin Kojtal
a3e41f246e
Merge pull request #3369 from adustm/disco_f469_newpins
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Add CAN2 missing pins for connector CN12
2016-12-09 15:35:07 +01:00
Martin Kojtal
04f940de2d
Merge pull request #3324 from LMESTM/dev_i2c_common_code
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Dev i2c common code
2016-12-09 15:30:00 +01:00
Martin Kojtal
163667165e
Merge pull request #3312 from NXPmicro/SPI_ASYNCH_API
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K64F: SPI Asynch API implementation
2016-12-09 15:15:54 +01:00
jeromecoutant
3ab5dce41d
STM32L1 : correct ST HAL API call
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- RCC init: unused clock was enabled without any init parameters
- RCC init: one PLL parameter was missing
- ADC: a parameter setting was missing to init clock
- GPIO: mode was not allowed by ST HAL API
- ll_utils: compilation issue
2016-12-09 11:32:08 +01:00
jeromecoutant
12d2795871
STM32L1 : refactor stm32l1xx_hal_conf.h and map ST HAL assert into MBED assert
2016-12-08 17:03:25 +01:00
bcostm
810a980cb7
Add SERIAL_FC in targets.json/device_has field for NUCLEO_F103RB
2016-12-08 16:45:30 +01:00
bcostm
88988b688b
Add external declaration of PinMap_UART_RTS/CTS[] const tables
2016-12-08 16:43:26 +01:00
Kevin Gillespie
a0243cd852
[MAX32620] Fixing serial readable function.
2016-12-07 10:23:26 -06:00
Mahadevan Mahesh
428e8b23c1
K66F: Enable LWIP feature
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Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2016-12-06 12:37:02 -06:00
Laurent MEUNIER
8e11541a74
STM32 NUCLEO-L152RE Update system core clock to 32MHz
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Even when HSE is used, it is possible to get a 32MHz system clock
8MHz x PLLMUL=12 % PLLDIV=2 = 32MHz
And we still get 48MHz USB clock:
8MHz x PLLMUL=12 % 2 = 48MHz
This allows to take full benefit of the CPU capability.
2016-12-06 11:45:19 +01:00
adustm
3fdbe85b00
Add CAN2 missing pins for connector CN12
2016-12-05 18:24:30 +01:00
Martin Kojtal
507956d658
Merge pull request #3317 from jeromecoutant/PR_F429
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NUCLEO_F429ZI has integrated LSE
2016-12-05 16:53:09 +00:00
TsungtaWu
7d4befa01b
DELTA_DFBM_NQ620 default configuration ( #3298 )
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* Change default SRC setting and add mbed_sdk_init() for DELTA_DFBM_NQ620
Change SRC setting to RC as default to match with hardware config.
mbed_sdk_init() is added for internal debug purpose (experimental)
* remove the redundant #define
Those #define never used.
2016-12-05 16:43:07 +00:00
Mahadevan Mahesh
d5fca6dab0
K64F DSPI Driver: Fix errors where DSPI state is incorrectly kept busy
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Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2016-12-05 10:06:14 -06:00
Mahadevan Mahesh
5eb92ea1db
K64F SPI Update: Implement Asynch API's for SPI
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Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2016-12-05 10:06:08 -06:00
Martin Kojtal
7338280f71
Merge pull request #3318 from radhika-raghavendran/master
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Register map changes for RevG
2016-12-02 15:49:12 +01:00
Martin Kojtal
bd499daae8
Merge pull request #3304 from jeromecoutant/PR_L476
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STM32L476: no HSE is present in NUCLEO and DISCO boards
2016-12-02 15:48:38 +01:00
Martin Kojtal
1c2c121741
Merge pull request #3303 from adustm/stm_fix_interrupt_in
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Fix #2956 #2939 #2957 #2959 #2960 : Add HAL_DeInit function in gpio_irq destructor
2016-12-02 15:47:50 +01:00
Martin Kojtal
ab2e869a24
Merge pull request #3157 from SiliconLabs/SiliconLabs-EFR32
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[Silicon Labs] Adding support for EFR32MG1 wireless SoC
2016-12-02 15:46:35 +01:00
Martin Kojtal
4f314beeee
Merge pull request #3309 from OpenNuvoton/nuvoton
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[NUC472/M453] Fix CI failed tests
2016-12-02 15:33:52 +01:00
Martin Kojtal
a2963668f7
Merge pull request #3345 from bcostm/fix_suspend_tick
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STM32 - Remove TIM_IT_UPDATE flag in HAL_Suspend/ResumeTick functions
2016-12-02 15:28:12 +01:00
Laurent MEUNIER
29b32b84b3
STM32 I2C - 1MHZ frequency is allowed
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So make the assert to cover all possible values
Also assert applies only for I2C_IP_VERSION_V2.
Also in case of I2C_IP_VERSION_V1, the HAL makes the proper
checks and can dynamically scale the frequency in case of
intermediate value.
2016-12-01 15:20:11 +01:00
Martin Kojtal
c8c01f0c5c
Merge pull request #3322 from jeromecoutant/PR_DISCO_L0
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DISCO_L053C8 doesn't support LSE
2016-12-01 13:52:16 +00:00
0xc0170
bcdb86675a
ublox eva nina - fix line endings
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Fixes #3346
2016-12-01 11:19:42 +00:00
jeromecoutant
7adb7a54de
NUCLEO_F429ZI has integrated LSE
2016-11-30 14:43:01 +01:00
bcostm
18dc6f4f81
Remove TIM_IT_UPDATE flag in HAL_Suspend/ResumeTick functions to make LPT tests pass.
2016-11-30 11:31:25 +01:00
jeromecoutant
29771cb891
DISCO_L053C8 doesn't support LSE
2016-11-30 09:02:06 +01:00
jeromecoutant
448f501d4a
STM32L476: comments update
2016-11-30 08:52:49 +01:00
jeromecoutant
757944ee24
STM32L476: no HSE is present in NUCLEO and DISCO boards
2016-11-30 08:51:18 +01:00
Laurent MEUNIER
0505a5274d
[STM32] enable I2C ASYNCH
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the I2C_ASYNCH feature is added to all STM32 except
F1 family for now. Will be added when HAL update is done.
2016-11-30 08:25:44 +01:00
Laurent MEUNIER
3fad50287c
[STM32] Make most of the I2C code into a common file
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Since most of the code in i2c_api.c is now relying on STM32 HAL, there
is now a possibility to make a common usage of this code accross families.
The IP version definition is introduced per family, to allow a switch of
functionnalities, especially the frequency management which differs.
BTw, we fix the F0 frequency settings at the same time.
F1 is managed for now as an exception as the HAL API for sequential transmit
/receive is not yet available (coming soon)
2016-11-30 08:23:13 +01:00
Laurent MEUNIER
23926a2418
[STM32] HAL I2C (V2) sequential transmit / receive
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In case of sequential transmit / receive, there is a need to:
- not use the reload option
- generate a new START on each new transaction
This applies to all HAL supporting the IP version V2.
2016-11-30 08:23:13 +01:00
Laurent MEUNIER
a0722b1086
[STM32] HAL F2: I2C fix btf / rxne cases
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Applying the same fix as in L1 and F4
2016-11-30 08:23:13 +01:00
Laurent MEUNIER
85a2f7ac49
[STM32] HAL L1: I2C fix btf / rxne cases
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This is an alignement to F4 HAL as the same IP is used.
Next official HAL delivery update hall will include the same alignement.
2016-11-30 08:23:13 +01:00
Laurent MEUNIER
77364f9fe2
[STM32] HAL L0: I2C / DMA updates
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This is prelim update before official V1.8.0 HAL to the needed HAL API
available as in F0 HAL which is using the same IP.
2016-11-30 08:23:13 +01:00
Martin Kojtal
c57427f77f
Merge pull request #3321 from jeromecoutant/PR_L432KC
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no HSE available by default for NUCLEO_L432KC
2016-11-29 18:25:17 +01:00
Martin Kojtal
519b500d4c
Merge pull request #3320 from bcostm/fix_vref_label
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STM32 - Add ADC_VREF label
2016-11-29 18:24:52 +01:00
Martin Kojtal
bd994b3f41
Merge pull request #3302 from bcostm/fix_issue_1685
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STM32F4 AnalogIn - Clear VBATE and TSVREFE bits before configuring ADC channels
2016-11-29 18:21:14 +01:00
Martin Kojtal
d4e23e1048
Merge pull request #3291 from mazgch/patch-1
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Adding mbed enabled Maker board with NINA-B1 and EVA-M8Q
2016-11-29 18:19:41 +01:00
Martin Kojtal
f89bf84beb
Merge pull request #3289 from TomoYamanaka/master
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Bug fix of initial value of interrupt edge in "gpio_irq_init" function.
2016-11-29 18:18:17 +01:00
Martin Kojtal
a8ebfaa058
Merge pull request #3288 from LMESTM/dev_spi_asynch_l0l1
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Dev spi asynch l0l1
2016-11-29 18:17:06 +01:00
Martin Kojtal
42f4843b97
Merge pull request #3241 from NXPmicro/Add_KW41_Support
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Add support for FRDM-KW41
2016-11-29 18:11:59 +01:00