Commit Graph

487 Commits (e2048b06b2c4aeddc36be4353855f523a43427d6)

Author SHA1 Message Date
Martin Kojtal d6e69ef57b
Merge pull request #12208 from hugueskamba/hk-replace-uartserial-st
ST targets: Replace UARTSerial references with BufferedSerial
2020-01-17 08:19:09 +00:00
Hugues Kamba 03cff0a02c ST targets: Replace UARTSerial references with BufferedSerial
BufferedSerial is UARTSerial renamed to convey the original purpose of
the class. It is the recommended buffered I/O serial class.
2020-01-08 08:34:20 +00:00
Leon Lindenfelser 94ead7adb2 Minor fixes for peripheral pins on Dragonfly Nano
1. PG8 should be labeled I2C3 not I2C1.
2. PC0 is dedicated to measuring system voltage.
2020-01-07 08:52:34 -06:00
Antti Kauppila e29cb193ca Added missing define for Quectel UG96 2019-12-27 16:04:10 +01:00
Antti Kauppila ca7848d854 Refactored away onboard_modem_api because it is not needed at all
All targets must implement soft_- and hard_power_on/off() functions which are practically same what onboard_modem_api offered.
These were seen as a duplicate features and therefore we removed this.
All targets involved have been updated to reflect the changes
2019-12-27 16:04:10 +01:00
Anna Bridge b1b0673622
Merge pull request #12086 from ABOSTM/FLASH_API_64B_ALIGNMENT
TARGET_STM: fix flash api 64bit address alignment on L4 and WB
2019-12-17 16:46:21 +00:00
Alexandre Bourdiol 9e3ad13d5e TARGET_STM: fix flash api 64bit address alignment on L4 and WB 2019-12-11 18:32:42 +01:00
jeromecoutant bea83d02c2 STM32 TARGET_STM astyle corrections 2019-12-10 14:39:47 +01:00
Kevin Bracey fe22bc023e Update HAL CRC API
* Change "is supported" check to be a macro, so it can be done at
  compile-time.
* Eliminate weird shift on 7-bit CRCs.
* Add support for 32-bit CRCs and reversals to TMPM3HQ.
2019-12-02 14:45:37 +02:00
Martin Kojtal 48f544f9e4
Merge pull request #11980 from jeromecoutant/PR_L4R9I
DISCO_L4R9I: update clock configuration for all clock sources
2019-12-02 11:23:51 +01:00
Martin Kojtal 7177d8fefe
Merge pull request #11950 from ABOSTM/DISCO_H747I_TICKLESS
DISCO_H747I: add support of MBED_TICKLESS
2019-11-29 09:48:09 +01:00
jeromecoutant 354913a45e DISCO_L4R9I: correct clock tree for all clock sources 2019-11-28 16:29:11 +01:00
Przemyslaw Stekiel b2dad08387 Change explicit pinmap to static pinmap 2019-11-28 08:32:12 +01:00
Przemyslaw Stekiel e3a34a57e1 Move GPIO_AF_NONE from PeripheralPins.h to PinNamesTypes.h 2019-11-28 08:32:10 +01:00
Przemyslaw Stekiel 6489bb7c99 STM: Add support for internal ADC pins 2019-11-28 08:32:06 +01:00
Przemyslaw Stekiel dc26390d08 DISCO_L475VG_IOT01A: Add explicit pinmap support 2019-11-28 08:32:04 +01:00
Martin Kojtal a1cddbae5f
Merge pull request #11938 from LMESTM/stm32_serial_clear_rxne
STM32: Update and align serial_clear implementations
2019-11-27 16:30:11 +01:00
Alexandre Bourdiol 41b038a028 TARGET_STM: rework hal_sleep management to be compatible with all STM32 families 2019-11-27 14:25:30 +01:00
Martin Kojtal 5f7ecea00b
Revert "MbedCRC and CRC HAL revisions" 2019-11-26 13:45:37 +00:00
Laurent Meunier f20529f9e6 STM32: Update and align serial_clear implementations
Clear RXNE flag by reading the RX register and align this implementation
on all families.
2019-11-25 14:55:32 +01:00
Kevin Bracey 1f94428a56 Update HAL CRC API
* Change "is supported" check to be a macro, so it can be done at
  compile-time.
* Eliminate weird shift on 7-bit CRCs.
* Add support for 32-bit CRCs and reversals to TMPM3HQ.
2019-11-13 14:31:49 +02:00
Martin Kojtal df79609cc5
Merge pull request #11675 from jeromecoutant/PR_USB_STEP1
STM32 USB update step 1
2019-10-28 14:06:15 +01:00
Kevin Bracey fb6aa3ef4f Clean up ARM toolchain heap+stack setup in targets
ARM Compiler 6.13 testing revealed linker errors pointing out
conflicting use of `__user_setup_stackheap` and
`__user_initial_stackheap` in some targets. Remove the unwanted
`__user_initial_stackheap` from the targets - the setup is
centralised in the common platform code.

Looking into this, a number of other issues were highlighted

* Almost all targets had `__initial_sp` hardcoded in assembler,
  rather than getting it from the scatter file. This was behind
  issue #11313. Fix this generally.
* A few targets' `__initial_sp` values did not match the scatter
  file layout, in some cases meaning they were overlapping heap
  space. They now all use the area reserved in the scatter file.
  If any problems are seen, then there is an error in the
  scatter file.
* A number of targets were reserving unneeded space for heap and
  stack in their startup assembler, on top of the space reserved in
  the scatter file, so wasting a few K. A couple were using that
  space for the stack, rather than the space in the scatter file.

To clarify expected behaviour:

* Each scatter file contains empty regions `ARM_LIB_HEAP` and
  `ARM_LIB_STACK` to reserve space. `ARM_LIB_STACK` is sized
  by the macro `MBED_BOOT_STACK_SIZE`, which is set by the tools.
  `ARM_LIB_HEAP` is generally the space left over after static
  RAM and stack.
* The address of the end of `ARM_LIB_STACK` is written into the
  vector table and on reset the CPU sets MSP to that address.
* The common platform code in Mbed OS provides `__user_setup_stackheap`
  for the ARM library. The ARM library calls this during startup, and
  it calls `__mbed_user_setup_stackheap`.
* The default weak definition of `__mbed_user_setup_stackheap` does not
  modify SP, so we remain on the boot stack, and the heap is set to
  the region described by `ARM_LIB_HEAP`. If `ARM_LIB_HEAP` doesn't
  exist, then the heap is the space from the end of the used data in
  `RW_IRAM1` to the start of `ARM_LIB_STACK`.
* Targets can override `__mbed_user_setup_stackheap` if they want.
  Currently only Renesas (ARMv7-A class) devices do.
* If microlib is in use, then it doesn't call `__user_setup_stackheap`.
  Instead it just finds and uses `ARM_LIB_STACK` and `ARM_LIB_HEAP`
  itself.
2019-10-23 14:53:49 +03:00
jeromecoutant 01e798fd6a STM32 clock configuration depending on USB 2019-10-21 17:11:59 +02:00
jeromecoutant 03dd8d3e22 STM32L4 USB pins addition 2019-10-21 17:11:55 +02:00
Laurent Meunier e862438fad Clearing UART TC Flag prevents deep sleep, so do not clear it
The TC flag is used in function serial_is_tx_ongoing to check if there is
an ongoing serial transmission. So this Flag must not be cleared at the
end of the transmission, otherwise, serial_is_tx_ongoing will notify that
TX is ongoing.

The impact is that it may prevent deep sleep to be entered.

Also there is no need to clear this flag at the end of the transaction
because it will be cleared automatically by HW when a new transmission
starts.
2019-10-15 15:59:51 +02:00
jeromecoutant fc5b91a36f DISCO_L4R9I: update default STMOD+ pin 2019-10-07 16:01:16 +02:00
jeromecoutant db7efabfd5 STM license file update
Some code have been copied from ST Cube deliveries.
ST copyright is then needed.
2019-09-10 14:24:48 +02:00
jeromecoutant bb1388be8e NUCLEO_L4R5ZI: add QSPI_x definition 2019-08-29 14:17:33 +02:00
jeromecoutant f13072490c NUCLEO_L4R5ZI : add OSPI pins for QSPI 2019-08-29 12:11:28 +02:00
Martin Kojtal 96d9a8fea9 Merge branch 'MX25LM51245G_QSPI_test_config' of git://github.com/LMESTM/mbed into dev_rollup 2019-08-28 18:37:17 +01:00
Martin Kojtal 104f9281c4 Merge branch 'I2C_SEQUENTIAL_COMMUNICATION_REWORK' of git://github.com/ABOSTM/mbed-os into dev_rollup 2019-08-28 18:36:53 +01:00
Leon Lindenfelser 7063ccee9e Add PA6 to ADC PeripheralPins for MTS_DRAGONFLY_L471QG 2019-08-28 13:12:08 +01:00
jeromecoutant 8cd00b3468 STM32L4: Add OSPI IP support in fallback QSPI mode
For STM32 platforms that embed an OSPI IP, we're offering
a QSPI fallback support with this commit.

When OSPI is supported in mbed, we can consider adding full
OSPI support
2019-08-23 15:18:48 +02:00
jeromecoutant 680e0fc5fb DISCO_L4R9I: increase system clock from 80MHz to 120MHz 2019-08-22 13:32:20 +02:00
jeromecoutant bdd0689228 NUCLEO_L4R5ZI: increase system clock from 80MHz to 120MHz 2019-08-22 13:21:28 +02:00
Alexandre Bourdiol 7647b39adc TARGET_STM: I2C sequential communication revert PR #3324 to original cube HAL 2019-08-22 10:44:20 +02:00
Martin Kojtal de84004be1
Merge pull request #11189 from LMESTM/pwmout_cpp_guard
__cplusplus guard fixed pwmout_device.h for STM32 families
2019-08-13 11:19:24 +02:00
Laurent Meunier 319223ac16 __cplusplus guard fixed pwmout_device.h for STM32 families
This bug prevented using this header in cpp code directly.
2019-08-09 09:51:39 +02:00
jeromecoutant 96a773a0e6 STM32L4: update drivers version to CUBE V1.14.0 2019-07-19 13:15:07 +02:00
Seppo Takalo 12d60f86ea
Merge pull request #11050 from jeromecoutant/PR_DISCO_L4R9I
DISCO_L4R9I new target
2019-07-17 23:15:45 +03:00
Seppo Takalo 987533859a
Merge pull request #10104 from kjbracey-arm/sleep_api
Sleep rework, RTOS API for bare metal, wait deprecations
2019-07-17 14:37:53 +03:00
jeromecoutant 1a835dda4a DISCO_L4R9I new target 2019-07-15 14:06:40 +02:00
Kevin Bracey a522dcfa0a Replace deprecated wait calls 2019-07-15 10:13:50 +03:00
Yuan Cao 6ed21ee1c0 Fixed serial_device IRQ infinite loop bug due to uint8_t overflowing 2019-07-13 00:05:25 -04:00
Martin Kojtal ccb63d771e
Merge pull request #10857 from ARMmbed/feature-watchdog
Add Watchdog and ResetReason
2019-07-03 11:43:52 +01:00
Martin Kojtal 61c4d05ce9
Merge pull request #10824 from ABOSTM/PRSTM32_PWMWRTIE_GLITCH_10734
STM32: pwmout_write: configure channel only when not already enabled
2019-06-28 14:24:14 +01:00
Martin Kojtal 924af9481e
Merge pull request #10841 from VVESTM/vve_10827_spi_count
TARGET_STM: Add DEVICE_SPI_COUNT to use SPIs without interference
2019-06-26 09:09:38 +01:00
Martin Kojtal b0073bb70d
Merge pull request #10774 from fkjagodzinski/fix-uart_irq
Fix serial IRQ handling
2019-06-25 15:49:41 +01:00
Alexandre Bourdiol a339084684 STM32: pwmout_write: configure channel only when not already enabled
Fix PWM glitch on write(), TARGET_STM/pwmout_api.c, #10734
2019-06-20 17:49:16 +02:00