Commit Graph

238 Commits (d4a1b5a803c11a2196a865728488cdcf908da90b)

Author SHA1 Message Date
jeromecoutant b0c50d4905 STM32F0: ST CUBE drivers update V1.11.1 => V1.11.2 2020-12-03 18:00:26 +01:00
jeromecoutant c46bfe0e1a STM32F0: CMakeLists update 2020-12-03 17:18:00 +01:00
jeromecoutant eef17a5d5d STM32F0: ST CUBE drivers update V1.9.0 => V1.11.1 2020-12-03 17:15:39 +01:00
jeromecoutant 6f25e46181 STM32F0: code alignment
No impact, no change
2020-12-03 17:15:31 +01:00
jeromecoutant 58ac265039 STM32F0: directory restructuration 2020-12-03 13:05:06 +01:00
Martin Kojtal fc16d2bae7 STM: fix ARMClang sct files, using proper -E command
This is required for ARMClang, otherwise there is an error with unknown command.
2020-11-25 13:35:36 +00:00
Martin Kojtal ced4aa6e2d
Merge pull request #13939 from jeromecoutant/PR_LSEDRIVE
STM32: LSE DRIVE feature update
2020-11-24 14:13:52 +00:00
Martin Kojtal b552127916
Merge pull request #13931 from jeromecoutant/PR_I2C_LEGACY
STM32 I2C: use correct HAL API
2020-11-24 14:12:05 +00:00
Martin Kojtal a1fc9cdad5
Merge pull request #13915 from 0xc0170/cmake-stm32
CMake: add all TARGET_STM targets
2020-11-24 14:09:28 +00:00
jeromecoutant 29af76fcca STM32: LSE DRIVE feature update 2020-11-20 17:31:26 +01:00
reme 16e63dc108 STM32 FLASH API : add critical sections
See PR #13802 (for F4 board)

Concerned boards are

STM32F0
STM32F1
STM32F2
STM32F3
STM32F4
STM32F7
STM32G0
STM32G4
STM32H7
STM32L0
STM32L1
STM32L4
STM32L5

Adding test of return code of HAL_FLASH_Lock() function
Adding board STM32F4
Running AStyle
2020-11-20 08:03:24 +00:00
jeromecoutant b01940200c STM32 I2C: use correct HAL API 2020-11-19 12:03:48 +01:00
Martin Kojtal 907868d1de CMake: STM32F0 fix startup/linker prefixes 2020-11-18 11:19:57 +00:00
Martin Kojtal f05db1b47a CMake: add STM32F0 targets 2020-11-17 11:43:09 +00:00
Harrison Mutai 4fad1112e5 Add SPDX license identifier to Arm files
Add license identifier to files which Arm owns the copyright to,
and contain either BSD-3 or Apache-2.0 licenses. This is to address
license errors raised by scancode analysis.
2020-10-15 10:47:27 +01:00
Jaeden Amero 612b148fd4 stack: armc: Workaround config passing bug
Workaround a bug where the boot stack size configuration option is not
passed on to armlink, the Arm Compiler's linker. Prefer
MBED_CONF_TARGET_BOOT_STACK_SIZE if present, as this is what the
configuration system should provide. Fall back to MBED_BOOT_STACK_SIZE
if MBED_CONF_TARGET_BOOT_STACK_SIZE is not defined, as in the case of
buggy tools. If both MBED_CONF_TARGET_BOOT_STACK_SIZE and
MBED_BOOT_STACK_SIZE are not defined, then we fall back to a hard-coded
value provided by the linkerscript. See
https://github.com/ARMmbed/mbed-os/issues/13474 for more information.
2020-09-10 10:08:38 +01:00
Jaeden Amero 39e69d328d Use boot stack size from config system
To allow overriding of the boot stack size from the Mbed configuration
system, consistently use MBED_CONF_TARGET_BOOT_STACK_SIZE rather than
MBED_BOOT_STACK_SIZE.

Fixes #10319
2020-09-10 10:08:38 +01:00
jeromecoutant 794e0aa0cf STM32F0 baremetal support 2020-05-18 15:27:29 +02:00
jeromecoutant c96eb2cd0e STM32 rename TOOLCHAIN_ARM_STD into TOOLCHAIN_ARM 2020-05-15 10:41:28 +02:00
jeromecoutant 303752ad84 STM32 remove all TOOLCHAIN_ARM_MICRO 2020-05-15 09:37:40 +02:00
jeromecoutant a63fd00a9a STM32F0 code cleaning 2020-05-14 13:55:21 +02:00
jeromecoutant 2368a07244 STM32: Fix the UART RX & TX data reg bitmasks 2020-02-07 16:23:50 +00:00
Martin Kojtal a4dbf63dc3
Merge pull request #12029 from jeromecoutant/PR_F091
STM32F0: create STM32F091xC target
2019-12-05 08:22:32 +01:00
jeromecoutant 1a3673ee52 STM32F0: create STM32F091xC target 2019-12-04 15:03:46 +01:00
Kevin Bracey fe22bc023e Update HAL CRC API
* Change "is supported" check to be a macro, so it can be done at
  compile-time.
* Eliminate weird shift on 7-bit CRCs.
* Add support for 32-bit CRCs and reversals to TMPM3HQ.
2019-12-02 14:45:37 +02:00
Martin Kojtal 7177d8fefe
Merge pull request #11950 from ABOSTM/DISCO_H747I_TICKLESS
DISCO_H747I: add support of MBED_TICKLESS
2019-11-29 09:48:09 +01:00
Martin Kojtal a1cddbae5f
Merge pull request #11938 from LMESTM/stm32_serial_clear_rxne
STM32: Update and align serial_clear implementations
2019-11-27 16:30:11 +01:00
Alexandre Bourdiol 41b038a028 TARGET_STM: rework hal_sleep management to be compatible with all STM32 families 2019-11-27 14:25:30 +01:00
Martin Kojtal 5f7ecea00b
Revert "MbedCRC and CRC HAL revisions" 2019-11-26 13:45:37 +00:00
Laurent Meunier f20529f9e6 STM32: Update and align serial_clear implementations
Clear RXNE flag by reading the RX register and align this implementation
on all families.
2019-11-25 14:55:32 +01:00
Kevin Bracey 1f94428a56 Update HAL CRC API
* Change "is supported" check to be a macro, so it can be done at
  compile-time.
* Eliminate weird shift on 7-bit CRCs.
* Add support for 32-bit CRCs and reversals to TMPM3HQ.
2019-11-13 14:31:49 +02:00
Martin Kojtal df79609cc5
Merge pull request #11675 from jeromecoutant/PR_USB_STEP1
STM32 USB update step 1
2019-10-28 14:06:15 +01:00
Kevin Bracey fb6aa3ef4f Clean up ARM toolchain heap+stack setup in targets
ARM Compiler 6.13 testing revealed linker errors pointing out
conflicting use of `__user_setup_stackheap` and
`__user_initial_stackheap` in some targets. Remove the unwanted
`__user_initial_stackheap` from the targets - the setup is
centralised in the common platform code.

Looking into this, a number of other issues were highlighted

* Almost all targets had `__initial_sp` hardcoded in assembler,
  rather than getting it from the scatter file. This was behind
  issue #11313. Fix this generally.
* A few targets' `__initial_sp` values did not match the scatter
  file layout, in some cases meaning they were overlapping heap
  space. They now all use the area reserved in the scatter file.
  If any problems are seen, then there is an error in the
  scatter file.
* A number of targets were reserving unneeded space for heap and
  stack in their startup assembler, on top of the space reserved in
  the scatter file, so wasting a few K. A couple were using that
  space for the stack, rather than the space in the scatter file.

To clarify expected behaviour:

* Each scatter file contains empty regions `ARM_LIB_HEAP` and
  `ARM_LIB_STACK` to reserve space. `ARM_LIB_STACK` is sized
  by the macro `MBED_BOOT_STACK_SIZE`, which is set by the tools.
  `ARM_LIB_HEAP` is generally the space left over after static
  RAM and stack.
* The address of the end of `ARM_LIB_STACK` is written into the
  vector table and on reset the CPU sets MSP to that address.
* The common platform code in Mbed OS provides `__user_setup_stackheap`
  for the ARM library. The ARM library calls this during startup, and
  it calls `__mbed_user_setup_stackheap`.
* The default weak definition of `__mbed_user_setup_stackheap` does not
  modify SP, so we remain on the boot stack, and the heap is set to
  the region described by `ARM_LIB_HEAP`. If `ARM_LIB_HEAP` doesn't
  exist, then the heap is the space from the end of the used data in
  `RW_IRAM1` to the start of `ARM_LIB_STACK`.
* Targets can override `__mbed_user_setup_stackheap` if they want.
  Currently only Renesas (ARMv7-A class) devices do.
* If microlib is in use, then it doesn't call `__user_setup_stackheap`.
  Instead it just finds and uses `ARM_LIB_STACK` and `ARM_LIB_HEAP`
  itself.
2019-10-23 14:53:49 +03:00
jeromecoutant 66dea7b5da STM32F0 USB pins addition 2019-10-21 14:49:18 +02:00
Laurent Meunier e862438fad Clearing UART TC Flag prevents deep sleep, so do not clear it
The TC flag is used in function serial_is_tx_ongoing to check if there is
an ongoing serial transmission. So this Flag must not be cleared at the
end of the transmission, otherwise, serial_is_tx_ongoing will notify that
TX is ongoing.

The impact is that it may prevent deep sleep to be entered.

Also there is no need to clear this flag at the end of the transaction
because it will be cleared automatically by HW when a new transmission
starts.
2019-10-15 15:59:51 +02:00
jeromecoutant db7efabfd5 STM license file update
Some code have been copied from ST Cube deliveries.
ST copyright is then needed.
2019-09-10 14:24:48 +02:00
int_szyk 3fa878f8a8 Change LSI_VALUE in STM implementation.
Wrong LSI value might be causing problems witch watchdogs.
2019-08-30 13:54:39 +02:00
Alexandre Bourdiol 7647b39adc TARGET_STM: I2C sequential communication revert PR #3324 to original cube HAL 2019-08-22 10:44:20 +02:00
Martin Kojtal de84004be1
Merge pull request #11189 from LMESTM/pwmout_cpp_guard
__cplusplus guard fixed pwmout_device.h for STM32 families
2019-08-13 11:19:24 +02:00
Laurent Meunier 319223ac16 __cplusplus guard fixed pwmout_device.h for STM32 families
This bug prevented using this header in cpp code directly.
2019-08-09 09:51:39 +02:00
Yuan Cao 6ed21ee1c0 Fixed serial_device IRQ infinite loop bug due to uint8_t overflowing 2019-07-13 00:05:25 -04:00
Martin Kojtal ccb63d771e
Merge pull request #10857 from ARMmbed/feature-watchdog
Add Watchdog and ResetReason
2019-07-03 11:43:52 +01:00
Martin Kojtal 61c4d05ce9
Merge pull request #10824 from ABOSTM/PRSTM32_PWMWRTIE_GLITCH_10734
STM32: pwmout_write: configure channel only when not already enabled
2019-06-28 14:24:14 +01:00
Martin Kojtal 924af9481e
Merge pull request #10841 from VVESTM/vve_10827_spi_count
TARGET_STM: Add DEVICE_SPI_COUNT to use SPIs without interference
2019-06-26 09:09:38 +01:00
Martin Kojtal b0073bb70d
Merge pull request #10774 from fkjagodzinski/fix-uart_irq
Fix serial IRQ handling
2019-06-25 15:49:41 +01:00
Alexandre Bourdiol a339084684 STM32: pwmout_write: configure channel only when not already enabled
Fix PWM glitch on write(), TARGET_STM/pwmout_api.c, #10734
2019-06-20 17:49:16 +02:00
Vincent Veron 31eb49b918 TARGET_STM: Add DEVICE_SPI_COUNT to use SPIs without interference
Extend to all STM targets the work done on PR10752.

Signed-off-by: Vincent Veron <vincent.veron@st.com>
2019-06-14 14:15:56 +02:00
jeromecoutant 7154ac65f2 STM32F0 warning compilation
[-Wparentheses-equality]
2019-06-07 18:08:50 +02:00
Filip Jagodzinski c387bd889f STM32F0: Fix serial IRQ handling
Check that the RX or TX interrupt is enabled before calling
a registered handler with RxIrq or TxIrq arg.
2019-06-07 15:17:17 +02:00
jeromecoutant d919498745 STM32: common cmsis.h and device.h 2019-05-27 16:27:41 +02:00