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1242 Commits (d06ad9b83485167135909cb901b439a085be3633)

Author SHA1 Message Date
jeromecoutant 7b5a79f56e STM32 RTC Init minor update 2018-04-24 13:50:57 +02:00
bcostm 893b759663 L0 ST CUBE V1.10.0: change adc sampling time 2018-04-18 14:06:21 +02:00
bcostm 61576f8131 L0 ST CUBE V1.10.0: spi and i2c corrections 2018-04-18 14:06:20 +02:00
bcostm 8191487a4d L0 ST CUBE V1.10.0 2018-04-18 14:06:20 +02:00
Cruz Monrreal e2567e5dad
Merge pull request #6599 from jeromecoutant/PR_WARNING 
STM32 compilation warning issues
 2018-04-16 10:41:36 -05:00
Cruz Monrreal fe44dc0468
Merge pull request #6601 from KariHaapalehto/add_mtb_adv_wise_1530 
Add new target MTB_ADV_WISE_1530
 2018-04-16 10:40:12 -05:00
Paul Thompson 20f11bc13f Extend changes to other STM32 devices that have the PCD_WriteEmptyTxFifo() function 2018-04-13 05:27:03 -07:00
Paul Thompson b45d4233e1 Make the atomic_clr_u32 conditional use raw values rather than computed, remove need for guards 2018-04-13 04:44:43 -07:00
Paul Thompson 2211a27f53 Drop usage of ilen, just use len and cast it to int32_t as appropriate 2018-04-13 00:27:00 -07:00
Paul Thompson 8f4a5e2093 Revert to original fix concentrating on type correctness 2018-04-12 10:09:53 -07:00
Paul Thompson 430784b084 Initial work was for unsigned-signed comparison fix. Current work fixes negative number issues 
Compile: stm32f7xx_hal_pcd.c
../targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c: In function 'PCD_WriteEmptyTxFifo':
../targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c:1310:11: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
   if (len > ep->maxpacket)
           ^
../targets/TARGET_STM/TARGET_STM32F7/device/stm32f7xx_hal_pcd.c:1325:13: warning: comparison between signed and unsigned integer expressions [-Wsign-compare]
     if (len > ep->maxpacket)
             ^
 2018-04-12 09:43:18 -07:00
jeromecoutant 71d7d24bd6 STM32L4 : correct compilation warnings 2018-04-12 10:56:41 +02:00
jeromecoutant e7c4120550 STM32L1 : correct compilation warnings 2018-04-12 10:55:16 +02:00
jeromecoutant eeca430b23 STM32L0 : correct compilation warnings 2018-04-12 10:55:11 +02:00
jeromecoutant 2d0dce1db5 STM32F7 : correct compilation warnings 2018-04-12 10:55:02 +02:00
jeromecoutant 2fcf8d8990 STM32F4 : correct compilation warnings 2018-04-12 10:52:21 +02:00
jeromecoutant a540a21106 STM32F3 : correct compilation warnings 2018-04-12 10:51:33 +02:00
jeromecoutant 4e9e9f5c62 STM32F2 : correct compilation warnings 2018-04-12 10:51:18 +02:00
Kari Haapalehto f2b37b7d42 Add new target MTB_ADV_WISE_1530. 
MTB_ADV_WISE_1530 and MTB_USI_WM_BN_BM_22 includes same usi chip,
so common USI_WM_BN_BM_22 target has been created.
MTB_ADV_WISE_1530 and MTB_USI_WM_BN_BM_22 are inheting the common usi target
 2018-04-11 15:50:28 +03:00
jeromecoutant b6a8a50a28 STM32F1 : correct compilation warnings 2018-04-11 11:06:44 +02:00
jeromecoutant c2ee8f34b6 STM32F0 : correct compilation warnings 2018-04-11 09:57:54 +02:00
Paul Thompson f41cf081c9 STM32 : correct compilation warnings 2018-04-11 09:53:15 +02:00
Cruz Monrreal e913e917c0
Merge pull request #6544 from ithinuel/add_rak811_adc 
add ADC_AN0-2 mapped on PA_0-2
 2018-04-10 18:08:03 -05:00
Martin Kojtal 8b2eb20a54
Merge pull request #6553 from theotherjimmy/stmL4-armc6 
Correct armc6 detection logic for STM32L4
 2018-04-09 17:36:52 +02:00
Martin Kojtal 96084a3c67
Merge pull request #6561 from LMESTM/Stm32DeepSleepClock 
Stm32 deep sleep clock
 2018-04-09 17:11:23 +02:00
Martin Kojtal a3faf58a9e
Merge pull request #6511 from ashok-rao/MTB_USI_BM22 
Add new target USI WM-BN-BM-22
 2018-04-09 17:07:00 +02:00
Laurent MEUNIER ad4a250292 Style fix 2018-04-06 17:03:53 +02:00
Laurent MEUNIER 3d92af50ce Add delay to let clock stabilize when out of deep sleep 
Tests have shown that there is hich-up on MSI clock during the setup phase.
If this stabilization phase happens when application has restarted again
this can have side effects, like grambled UART characters typically.

So we're adding a delay before hading-over back to application.

With this modification, on NCULEO_L476RG, the wake-up time is increased
from 2ms to 2,5ms.
If possible this should be improved in the future to save 500 microseconds
of wak-up time.  See TODO
 2018-04-06 16:10:27 +02:00
Laurent MEUNIER 8007b1df7c Use temporarily MSI or HSI when exiting Deep Sleep 
There are cases where HW registers are found in unpexcepted state when
exiting Deep Sleep only few micro-seconds after it was entered.

By using an internal clock that does not depend on anythin and clocking
the system without using PLL, this allows SetSysClock default configuration
to run fine whatever possible configuration we find the HW in when
exiting Deep Sleep.

Also we shall restore interrupts only after all cloks are back to
expected running state.
 2018-04-06 16:10:27 +02:00
Jimmy Brisson d374bb4a5a Correct armc6 detection logic 2018-04-05 15:13:52 -05:00
Wilfried Chauveau de4d7043c9 add ADC_AN0-2 mapped on PA_0-2 2018-04-05 08:33:55 +01:00
bcostm 8412807669 Update stm32l151xba.h 2018-04-03 15:01:07 +02:00
bcostm 293b3bfdc0 STM32L1: allow redefinition of FLASH_SIZE macro 2018-04-03 14:23:14 +02:00
bcostm 8c0ff8be79 Fix typos causing ARM build error 2018-04-03 14:01:03 +02:00
bcostm d8aa587782 L1 ST CUBE V1.8.1 2018-04-03 14:01:02 +02:00
Ashok Rao 62e5dccd0b Remove irrelevant comments 2018-03-29 16:52:03 +01:00
Ashok Rao 1df5c020b9 Adding USI WM-BN-BM-22 as a new target 2018-03-29 16:20:54 +01:00
Wilfried Chauveau 85af9f96ea add IAR to the supported toolchain 2018-03-28 10:03:23 +01:00
Wilfried Chauveau c31676306a switch to stm32l151cb-a & work around flash size field width. 2018-03-26 18:00:18 +01:00
Wilfried Chauveau 495f8e4e5b add RF_TXCO_EN on PH1 and set HSI calibration to its default value 2018-03-23 10:19:49 +00:00
Wilfried Chauveau 758f3b2dbd add support for the RAK811 2018-03-23 10:19:49 +00:00
Cruz Monrreal 7c272fa3e8
Merge pull request #6412 from jeromecoutant/PR_L4_ADC 
STM32L4 ADC correct internal channel management
 2018-03-22 11:27:50 -05:00
Cruz Monrreal 04a3635eba
Merge pull request #6399 from jeromecoutant/PR_L4_TEMP 
STM32L4 ADC Internal Channel : correct sampling time
 2018-03-22 11:27:30 -05:00
jeromecoutant ef006931f8 STM32L4 ADC correct internal channel management 2018-03-21 10:57:57 +01:00
Cruz Monrreal 6cb6dd9e62
Merge pull request #6330 from bcostm/fix_pins_nucleo_l433rc_p 
NUCLEO_L433RC_P: fix pins definitions
 2018-03-20 14:56:05 -05:00
Cruz Monrreal d7dfab5c7e
Merge pull request #6370 from jeromecoutant/PR_LPT_RTC_OPTIM 
STM32 LPTICKER : optimize RTC wake up timer init
 2018-03-20 14:19:07 -05:00
jeromecoutant 6c369d17aa STM32L4 ADC Internal Channel : correct sampling time 2018-03-20 13:15:17 +01:00
Cruz Monrreal 0adef8a959
Merge pull request #6379 from bcostm/dev_DISCO_L496AG 
DISCO_L496AG: Add new platform
 2018-03-19 11:18:27 -05:00
Cruz Monrreal 05e72dc729
Merge pull request #6353 from jeromecoutant/PR_RTC_LSE 
STM32 RTC init
 2018-03-16 11:45:13 -05:00
bcostm f59f7581fb DISCO_L496AG: add entry in mbed_rtx.h 2018-03-16 10:02:12 +01:00