Cruz Monrreal
671c2d7e90
Merge pull request #5346 from scartmell-arm/feature-hal-spec-critical-section
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Add Critical Section HAL API specification
2018-01-16 12:49:38 -06:00
jeromecoutant
9fb865ae57
STM32 LPT optimisation
2018-01-16 15:16:13 +01:00
chrisyang
c9fc52166a
rtl8195am - reorder some defines properly in ota header file
2018-01-16 13:52:16 +08:00
TomoYamanaka
ae1eaa985f
Support TRNG function for GR-LYCHEE
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I supported the TRNG function when target is GR-LYCHEE.
GR-LYCHEE generates TRNG by acquiring the random number of Wifi module(ESP32) incorporated in it using I2C.
2018-01-16 13:45:15 +09:00
TomoYamanaka
aa5da2cd2e
Add the definition for GR-LYCHEE in mbed_rtx.h
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In mbed_rtx.h file, I added the definition for GR-LYCHEE to use the "Dynamic Heap" processing when the target is GR_LYCHEE.
2018-01-16 13:39:44 +09:00
TomoYamanaka
776b27cefb
Add startup processing having CMSIS5/RTX5 been available on GR-LYCHEE
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For supporting to CMSIS5/RTX5, I added the start-up processing of 3 toolchains (ARMCC, GCC_ARM, IAR) and the register definition of RZ/A1LU specific.
In addition, I added the linker script files to implement the dynamic HEAP the same as GR-PEACH(RZ/A1H).
2018-01-16 13:34:35 +09:00
TomoYamanaka
47acc9e551
Add GR_LYCHEE as a new target board in terget.json, build_travis.py and tests.py
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I added GR-LYCHEE's configuration in targets.json file. Also, I added GR_LYCHEE as a Renesas new target board in build_travis.py and tests.py.
2018-01-16 13:25:17 +09:00
Steven Cooreman
5d6c5dd81d
Fix for #5840
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This commit fixes #5840 . Fix verified by running mbed_hal-lp_ticker test suite with preloaded RTC counter such that it wrapped in the middle of the suite.
Also removes explicit sleep blocking from the us_ticker implementation, since sleep blocking for us tickers is done at mbed HAL level now. This was causing one of the lp_ticker tests to fail.
2018-01-15 21:21:53 +01:00
Steven Cooreman
18c973f132
Allow overriding of DCDC settings per target
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Allow custom targets to override the DCDC settings by defining EMU_DCDCINIT_STK_DEFAULT to target-specific initialization values.
2018-01-15 16:36:23 +01:00
Martin Kojtal
670077624d
Merge pull request #5749 from jeromecoutant/PR_LPT_LPTIM
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STM32 LOWPOWERTIMER : introduce LPTIM feature
2018-01-15 15:25:54 +00:00
Martin Kojtal
2c6403e67f
Merge pull request #5787 from bcostm/dev_flash_f2
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STM32: Add support of Flash API for STM32F2 devices
2018-01-15 15:24:13 +00:00
Martin Kojtal
2d83463f9c
Merge pull request #5813 from TomoYamanaka/master
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Revise the structure in RZ_A1 related directory
2018-01-15 15:23:52 +00:00
Martin Kojtal
debca1f87c
Merge pull request #5824 from jeromecoutant/DEV_DISCO_F407
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DISCO_F407VG : alignment with other STM32
2018-01-15 15:22:52 +00:00
chrisyang
a1b4b8f10a
rtl8195am - move region headers to 0xb000 and 0xc000
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The new layout is as follows:
0x000000 - 0x008000 => bootloader
0x008000 - 0x00b000 => system sectors
0x00b000 - 0x00c000 => region1 header
0x00c000 - 0x00d000 => region2 header
0x00d000 - 0x010000 => reserved
0x010000 - 0x040000 => mbed file system
0x040000 - 0x120000 => region1 image
0x120000 - 0x200000 => region2 image
This is to ensure when daplink erases sections, both regions' headers
are erased properly.
2018-01-15 15:08:13 +08:00
adustm
5104f2d1cc
Improve SRAM use for IAR toolchain
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Use the entire SRAM2 with NVIC buffer + stack
Increase HEAP size to 0x10000 in SRAM1
Increase the available SRAM1 by 0x2000
2018-01-12 15:49:27 +01:00
bcostm
d50c329c68
Use legacy CAN api
2018-01-12 11:17:29 +01:00
bcostm
06f097884c
Update stm32l4xxxx.h files
2018-01-12 11:11:32 +01:00
bcostm
a4f9012a0a
Update stm32l4xx.h files
2018-01-12 11:11:31 +01:00
bcostm
dda34ea206
Update system_stm32l4xx.c with latest version
2018-01-12 11:11:31 +01:00
bcostm
43a31557dc
Remove release notes file
2018-01-12 11:11:31 +01:00
bcostm
0448d64f62
Add more comments
2018-01-12 11:11:31 +01:00
bcostm
84577f9634
L4 ST CUBE V1.11.0
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Update to STM32CubeL4 V1.11.0
Conflicts solved:
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L433xC/device/stm32l433xx.h
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L486xG/device/stm32l4xx.h
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/stm32l496xx.h
targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L496xG/device/stm32l4xx.h
targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_conf.h
targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_def.h
targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_i2c.c
targets/TARGET_STM/TARGET_STM32L4/device/stm32l4xx_hal_spi.h
2018-01-12 11:11:31 +01:00
TomoYamanaka
3fddcc18da
Add "RZ_A1XX" label for commonizing in targets.json
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I added the "RZ_A1XX" label for commonizing the setting in targets.json, and inherited in both RZ_A1H and VK_RZ_A1H.
2018-01-12 17:35:53 +09:00
TomoYamanaka
b92f75ad3c
Modify the lack of copyright to header files
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I modified the lack of copyright in the below header files that I added for commonizing the RZ_A1 related files.
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_RZ_A1H/mbed_drv_cfg.h
- targets/TARGET_RENESAS/TARGET_RZ_A1XX/TARGET_VK_RZ_A1H/mbed_drv_cfg.h
2018-01-12 14:18:54 +09:00
Cruz Monrreal
b32828bc37
Merge pull request #5739 from pan-/nordic-new-client
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BLE: Nordic pal client implementation
2018-01-11 10:26:47 -06:00
Cruz Monrreal
2c5fedc0b2
Merge pull request #5792 from jeromecoutant/PULL_REQUEST_CUBE_UPDATE_F0_V1.9.0
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STM32F0 : ST CUBE version update to V1.9.0
2018-01-11 10:24:28 -06:00
Vincent Coubard
31053273c2
Nordic BLE: Fix stack event size
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Read By group type response can return 4 descriptor discovered when the remote server have 4 descriptors with a 16 bit UUID. The handle, UUID pair get stored in a ble_gattc_desc_t that is 20 bytes long.
This PR increase buffer size to handle this use case.
2018-01-10 17:04:35 +00:00
jeromecoutant
0eede79e2b
DISCO_F407VG : alignment with other STM32
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- clock source is now a user choice
- IAR tool chain is available
2018-01-10 15:01:29 +01:00
Steven Cartmell
643c8926d5
Remove counter from nordic critical HAL implementation
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hal_critical_section_enter() is safe to call multiple times, however
hal_critical_section_exit() is only called on the last exit from a
critical section. This will cause a mismatch in the counter and the
interrupt state will never be restored if the critical section is
nested. Change this to a bool so that the interrupt save state is
tracked for hal_in_critical_section() to work correctly.
2018-01-09 15:35:12 +00:00
jeromecoutant
a816e93e9a
STM32 LOWPOWERTIMER : introduce LPTIM feature
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STM32L0, L4, F7 and few F4 chip are supporting LPTIM feature.
We propose to allow user to use LPTIM for MBED LowPowerTimer API instead of using RTC wakeup timers.
By default, all targets that are supporting this feature have been configured.
2018-01-09 14:10:14 +01:00
Steven Cartmell
061795c489
Move in_critical_section implementation into the HAL
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- Add function to HAL hal_in_critical_section()
- Wrap assert in FEATURE_UVISOR macro
2018-01-09 10:41:29 +00:00
TomoYamanaka
1b303ab5d6
Change the values of RZ_A1 related "extra_labels" in targets.json
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As a result of revision of folder structure, I changed the values of "extra_labels" of RZ_A1-related in targets.json.
2018-01-09 18:25:12 +09:00
TomoYamanaka
8b7e2abdb7
Commonalize the files in "targets/TARGET_RENESAS/TARGET_RZ_A1XX" directory
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I made be available in common whatever the board related to RZ_A1 in the below files.
- Since there are the table code of Pinmap differs for each board, I moved the code to "PeripheralPins" file for each board, and changed to include PeripheralPins.h.
analogin_api.c, can_api.c, gpio_irq_api.c, i2c_api.c, pinmap.c, port_api.c, pwmout_api.c, serial_api.c, spi_api.c and us_ticker.c
- Since there are some board-specific processes, I enclosed the processes with "#ifdef" and rearranged the functions to make be easier to enclose.
can_api.c, ethernet_api.c and serial_api.c
- Since there are the driver configuration values differs for each board, I added "mbed_drv_cfg.h" file for each board and defined macros for the values, and changed to refer to the macros.
can_api.c, gpio_api.c, pwmout_api.c and rtc_api.c
2018-01-09 18:20:50 +09:00
TomoYamanaka
6f851a820c
Revise the folder structure in "targets/TARGET_RENESAS" directory
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In "targets/TARGET_RENESAS" folders, same as Cortex-M targets, I changed the folder structure to combine files that can be shared as RZ/A1 related.
And I renamed the folder name to "TARGET_RZ_A1XX" in order to make commonality explicit.
- "targets/TARGET_RENESAS" folder
<before>
\targets\TARGET_RENESAS\TARGET_RZ_A1H
\targets\TARGET_RENESAS\TARGET_VK_RZ_A1H
<after>
\targets\TARGET_RENESAS\TARGET_RZ_A1XX
2018-01-09 17:39:22 +09:00
Ashok Rao
c138dedf73
Adding MTB MXChip EMW3166 as a new target
2018-01-08 21:07:38 +00:00
Jimmy Brisson
a5f1426a44
Merge pull request #5794 from prashantrar/realtek-pr-online-compile
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Commit to fix the Online compiler issue for ARM mbed-os on REALTEK_RT…
2018-01-08 10:38:43 -06:00
Jimmy Brisson
24b0387500
Merge pull request #5747 from jeromecoutant/PR_RTC_SLEEP
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STM32 : Fix issue to exit deepsleep when RTC has not been initialized
2018-01-08 10:37:06 -06:00
Jimmy Brisson
cef1cc26d8
Merge pull request #5651 from gorazdko/ff_lpc546xx-add-ethernet
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ff_lpc546xx: add enet, change led1 and led3 pins
2018-01-08 10:35:56 -06:00
Jimmy Brisson
737f75a68f
Merge pull request #5608 from productize/nucleo-f413zh
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NUCLEO_F413ZH: Add support for the NUCLEO-F413ZH board
2018-01-08 10:35:27 -06:00
jeromecoutant
9c6e7c0fa0
STM32F4: STDIO_UART_TX and STDIO_UART_RX can be now user defined
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NB for UBLOX targets: usb_rx and usb_tx config name are still available
in order to not break current applications.
2018-01-08 11:42:46 +01:00
jeromecoutant
59b4b228c4
STM32L4: STDIO_UART_TX and STDIO_UART_RX can be now user defined
2018-01-08 11:12:35 +01:00
jeromecoutant
7fa733e236
STM32L1: STDIO_UART_TX and STDIO_UART_RX can be now user defined
2018-01-08 11:12:24 +01:00
jeromecoutant
06e9fb6c9b
STM32L0: STDIO_UART_TX and STDIO_UART_RX can be now user defined
2018-01-08 11:12:17 +01:00
jeromecoutant
93b34070ed
STM32F7: STDIO_UART_TX and STDIO_UART_RX can be now user defined
2018-01-08 11:12:10 +01:00
jeromecoutant
a7bddff5cc
STM32F3: STDIO_UART_TX and STDIO_UART_RX can be now user defined
2018-01-08 11:12:04 +01:00
jeromecoutant
785862e69e
STM32F2: STDIO_UART_TX and STDIO_UART_RX can be now user defined
2018-01-08 11:11:57 +01:00
jeromecoutant
f97d84654e
STM32F1: STDIO_UART_TX and STDIO_UART_RX can be now user defined
2018-01-08 11:11:51 +01:00
jeromecoutant
88678315f1
STM32F0: STDIO_UART_TX and STDIO_UART_RX can be now user defined
2018-01-08 11:11:43 +01:00
Prashant Ravi
62667a4732
Fixing changes as requested
2018-01-08 10:49:46 +08:00
Prashant Ravi
f71de8a0d7
Commit to fix the Online compiler issue for ARM mbed-os on REALTEK_RTL8195AM
2018-01-06 00:00:50 +08:00
Steven Cartmell
e14bee5209
Fix potential race condition in critical section HAL API
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Call underlying HAL implementation to enter critical section/disable interrupts
before incrementing the global critical section counter.
Modify HAL implementations to track first entrances to the critical section and
only update the saved state on first enter.
2018-01-05 14:55:58 +00:00
Steven Cartmell
3c9ae7bf1c
NRF51_DK: Add Critical Section HAL implementation
2018-01-05 14:55:57 +00:00
jeromecoutant
e4169b7a9e
STM32: update init procedure
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- STDIO_UART define is no more used
- configuring a new serial with the same UART as STDIO is no more allowed
2018-01-05 15:16:38 +01:00
jeromecoutant
9f4bec2f2e
STM32F0 : ST CUBE version update to V1.9.0
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- Previous ST Cube version: V1.7.0
- CMSIS part update from 2.3.1 to 2.3.3
- HAL part update from 1.5.0 to 1.7.0
2018-01-05 14:46:33 +01:00
bcostm
d96e76e7bd
STM32 CAN: fix wrong ID and MASK filter
2018-01-05 10:11:17 +01:00
ccli8
67386b9ebd
[NUC472/M487] Fix DMA input/output buffers are overlapped in AES alter.
2018-01-05 09:18:26 +08:00
ccli8
d96bcda606
[NUC472/M487] Fix indefinite loop in SHA alter.
2018-01-05 09:18:25 +08:00
ccli8
a00f8d0e8b
[NUC472/M487] Guard from reordering DMA wait and post-wait for crypto modules
2018-01-05 09:18:25 +08:00
ccli8
3a8c1aa687
[NUC472/M487] Use interrupt signal rather than polling to check operation completion in DES alter.
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This is to be consistent with PRNG/AES.
2018-01-05 09:18:24 +08:00
ccli8
0c1098483f
[NUC472/M487] Refine flow control code between crypto start and crypto ISR
2018-01-05 09:18:24 +08:00
ccli8
e1fbf0f6a7
[NUC472/M487] Add comment for crypto_zeroize
2018-01-05 09:18:24 +08:00
ccli8
9edda18b0f
[NUC472] Update BSP crypto driver
2018-01-05 09:18:23 +08:00
ccli8
a0a8a955a9
[NUC472/M487] Strengthen crypto DMA buffer check
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1. Catch incompatible buffer range, where buffer base = 0xffffff00 and buffer size = 0x100.
2. Add buffer size alignment check.
2018-01-05 09:18:21 +08:00
ccli8
b0228d020d
[NUC472/M487] Fix compile error as mbedtls is not included
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Currently, trng_api.c is located in targets/ and AES/DES/SHA alter. are located in mbedtls/.
They have shared crypto code.
If they could locate at same location e.g. mbedtls/, the shared crypto code placement would be more reasonable.
2018-01-05 09:18:20 +08:00
ccli8
6464649c41
[NUC472/M487] Coordinate crypto interrupt handler among AES/PRNG
2018-01-05 09:18:20 +08:00
ccli8
d66074fecc
[NUC472/M487] Coordinate crypto init among AES/DES/SHA/PRNG
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Add counter to track crypto init among crypto sub-modules. It includes:
1. Enable crypto clock
2. Enable crypto interrupt
As counter gets zero, crypto clock is disabled to save power.
2018-01-05 09:18:18 +08:00
Jimmy Brisson
af9e07357a
Merge pull request #5740 from ashok-rao/master
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Adding MTB ublox ODIN W2 as a new target.
2018-01-04 10:05:02 -06:00
Jimmy Brisson
7bdbdbe1eb
Merge pull request #5703 from dave-wu/cog-adc-fix
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AD: Fix ADC driver
2018-01-04 10:02:32 -06:00
Jimmy Brisson
324e53b770
Merge pull request #5697 from bcostm/dev_flash_f3
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STM32: Add support of Flash API for STM32F3 devices
2018-01-04 10:00:41 -06:00
Jimmy Brisson
e9c76bb85e
Merge pull request #5606 from nvlsianpu/bugfix/nrf52840_tickless
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Enable tickless on nRF52840
2018-01-04 09:53:48 -06:00
Jimmy Brisson
b2495c7a8d
Merge pull request #5595 from nvlsianpu/bugfix/nordic_critical_section
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fix nordic critical section
2018-01-04 09:52:32 -06:00
Jimmy Brisson
62a7ecddd3
Merge pull request #5570 from jeromecoutant/PR_STDIO
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STM32 UART init update
2018-01-04 09:50:18 -06:00
Jimmy Brisson
432e5bf436
Merge pull request #5253 from amq/patch-3
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Add missing device_name for targets with bootloader
2018-01-04 09:47:41 -06:00
bcostm
058f011254
STM32F1: Remove flash functions doc
2018-01-04 15:43:54 +00:00
bcostm
ca24ee4cd7
STM32F0: Remove flash functions doc
2018-01-04 15:43:54 +00:00
bcostm
a47f9b3480
STM32F0: Add Flash API support
2018-01-04 15:43:54 +00:00
bcostm
6f5d8ff92e
STM32F1: Add Flash API support
2018-01-04 15:43:54 +00:00
bcostm
0d3e189545
STM32F2: Remove flash functions doc
2018-01-03 15:26:10 +01:00
bcostm
c86f1efd9c
STM32F2: Add Flash API support
2018-01-03 15:26:10 +01:00
Andrzej Puzdrowski
ae41c7db17
Implementation of critical section primitives
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which can be called from diferent contexts.
Orginal nordic critical primitives must been called in pairs
from exacly the same function. As mbed hal call it in separate
methods, so they are not suitable here.
2018-01-03 11:39:15 +01:00
bcostm
8203a8ddf5
STM32F3: Remove flash functions doc + typos
2018-01-02 14:28:09 +01:00
bcostm
563338ad58
STM32F3: reset PGERR flash flag
2018-01-02 14:28:09 +01:00
bcostm
b5324cae32
STM32F3: flash_api typos
2018-01-02 14:28:09 +01:00
bcostm
92394e4f13
STM32F303xE: add FLASH support in targets.json
2018-01-02 14:28:09 +01:00
bcostm
0d09f6d788
STM32F3: add Flash api
2018-01-02 14:28:09 +01:00
Martin Kojtal
a8fc394942
VK RZ A1H: remove target from mbed 2 release
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As it does not share the codebase with RZ A1H, it needs to be disabled until
bring it up to date with the latest changes to cmsis. There are changes
regarding caches, mmu and others
2018-01-02 11:51:04 +00:00
Martin Kojtal
fed5dd1170
VK RZ A1H: fix errors from the latest cmsis updates
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Use mbed critical section
2018-01-02 11:48:56 +00:00
gorazd
676e56d6fe
ff_lpc546xx: change led1 and led3 and p26 pins
2018-01-01 15:55:25 +01:00
gorazd
f6283f5b03
ff_lpc546xx: add enet
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fsl_phy.c/.h move to ../drivers to reuse it
lwip: add hardware_init.c
2018-01-01 15:55:24 +01:00
Martin Kojtal
3247a96588
renesas: os tick only for rtos
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As this is os tick implementation for rtos, it should not be compilied if rtos
not present (mbed 2)
2017-12-31 17:21:02 +01:00
Anna Bridge
20ad454f2b
Merge pull request #5613 from andreaslarssonublox/ublox_init_odin_evk_leds
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Added init for ODIN EVK LEDs to be off by default
2017-12-29 14:30:50 +00:00
Adam Heinrich
da81229186
NUCLEO_F413ZH: Add support for the NUCLEO-F413ZH board
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Merged from the existing TARGET_DISCO_F413ZH code (which has the same MCU)
and TARGET_NUCLEO_F412ZG code (which has the same Nucleo-144 board and
pinout).
2017-12-29 15:30:10 +01:00
Anna Bridge
a4d1dee25e
Merge pull request #5617 from bcostm/usbhost_clean-up
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STM32: USBHost clean-up
2017-12-29 10:48:03 +00:00
Cruz Monrreal II
3ebc99fe35
Merge pull request #5681 from slashdevteam/mk24bootloader
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Adding bootloader support to MK24F1 target
2017-12-28 20:34:27 +00:00
Cruz Monrreal II
2b718feba3
Merge pull request #5628 from TomoYamanaka/master
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Reregistration GR-PEACH as mbed support board
2017-12-28 20:20:31 +00:00
Cruz Monrreal II
10076bd0f6
Merge pull request #5691 from dlfryar/nrf52_linker
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Nordic add app_start config system support for NRF52840 for bootloader
2017-12-28 18:29:00 +00:00
Martin Kojtal
dd5bd73a88
Merge pull request #5720 from kjbracey-arm/STM32F7_DMB
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Add memory barriers to STM32F7xx Ethernet
2017-12-22 11:07:46 +00:00
Ashok Rao
e324d16fab
Fixing indentation
2017-12-21 15:38:58 +00:00
jeromecoutant
8c662132f4
STM32 : issue to exit deepsleep when RTC has not been initialized
2017-12-21 10:50:47 +01:00
TomoYamanaka
8f42cf7ef5
Revert "Remove Cortex-A mbed OS 5 support"
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I changed the python and json files to re-registering GR-PEACH to Mbed OS 5.
2017-12-21 14:09:24 +09:00