NUCLEO_L053R8 is using a 16 bit timer as a internal ticker but the mBed ticker
needs a 32 bit timer, so the upper upart of that timer is being calculated in
software. Continous HIGH/LOW voltage levels were observerd for 65ms due to timer
overflow, so to narrow down the issue, it was decided to switch to 16 bit values
and glue them to get a 32 bit timer.
Change-Id: I54a06d5aa0f8ddabd8abc194470845a2509e0c55
* [STM32F4] Get PCLK1 clock and set initial CAN frequency
CAN bus opperates on APB1 peripheral clock due to that we need to get PCLK1 freq
in *can_frequency()* function to properly calculate CAN speed and reconfigure
BS1, BS2, SJW bits.
Also to fully communicate with other ST platform we set the initical CAN
frequency to 100kb/s to be able to work with the slowest platform which supports
CAN, which is NUCLEO_F303K8 (APB1 is 32MHz).
Change-Id: I10af3aa8d715dd61c9d1b216ef813193449fecbd
* [STM32F4] Fix for CAN2 interrupt index
CAN2 interrupt index was wrong leading to not properly registering interrupt.
Having this fix allow us to pass MBED_30 test.
Change-Id: I33f9ca7c81286f7746a8f8352619e213bdf9756a
With PR #1707 all STM32F4 targets with UART4 and UART5 are broken, a several typos in function definition.
Seems to be a bug in STM32Fcube HAL, not only in the (older) mbed versin but also in current version
* [STM32F1 F4] Fix#1705 MBED_37
The transmit data register needs to be flushed at the initialisation of
the uart.
In case previous transmission was interrupted by a uart init, uart may
contain a char that will be transmitted at the next start.
This is the case in MBED_37 test (serial_auto_nc_rx).
The MCU is writting {{start}}\n
At the moment of the \n the main program is handling 'new serial'. The
next time the main program is handling a printf, the previous \n is
still present in the uart->DR register and is transmitted.
This cannot happen anymore with this commit
* [STM32_F1] Fix#1705 MBED_37 by resetting the uart
This fixes problem we have seen with rtos_idle_loop. The symbols
was not resolved as order played a role in this case. Remove circular
dependencies member, as it should not be required anymore.
This causing a warning in the rt_cmsis.c, as they use preprocessor
to redefine a type. A fix is to move the macro above, as it should not
change anything else. This should be removed, and use a cast, however I am
not fully familiar why they do this macro trick.
2 new macros were introduced to capture changes in the kernel. We used toolchains/__init__
script to capture those, which is not in the sync with actual sources. This fix introduces
those macros in the source, rather than a script.
We will further eliminate those macros to be used outside of RTX kernel (c++ API).
This enables the stack info methods to be supported for Cortex-M
targets. The rt_TypeDef required one small change - rename new structure
member as this is a reserved keyword in C++.
We need to ask for tid everytime we need to use tcb, do not expose internal
RTX details, we keep it within Thread.cpp file.
Cherry pick commit d587474778 -
"RTX: Support stacks larger than 64k"
This allows the latest version of the RTOS to run mbed client over
ethernet without crashing.
Thread - stack methods are not available for now, as tcb pointer was removed from
internal structure. To obtain it, we could get it from the kernel, but this should be
reconsidered. Either RTOS should provide it, or these methods will become deprecated.
Changes to the original kernel:
Cortex-M requires to define __CMSIS_OS_RTX, and __MBED_CMSIS_RTOS_CM. The macro __MBED_CMSIS_RTOS_CM
is mbed specific macro, to track changes to the kernel. This should keep us aware what has changed. For instance,
one breaking change was thread adding instances variable, which were not in mbed. This can be find as
it's protected via __MBED_CMSIS_RTOS_CM ifdef.
```
// added for mbed compatibility
// original RTX code
```
Startup for toolchains - mbed defines own stack pointer (set_main_stack()), therefore it should be called in the startup.
IAR added low level init calls and dynamic intialization to the IAR startup. All defined in RTX_CM_lib.h.
The timer thread has task id 0x01, main task 0x02. There are exception for main task not to check for
overflows. This is mbed specific, was reapplied from mbed code base.
IAR fixed SVC calls, this fix had to be reapplied (repo mbed PR 736 for more information).
There are 28 filter banks which are shared between CAN1 and CAN2. By default
they are divided in half:
* CAN1 -> 0 ... 13
* CAN2 -> 14 ... 27
that's why we need to decied which filter number has to be chosen.
Change-Id: If5f0da035c1435c61d4748b12d6617e9005cfd83
For some reason STACKHEAP block was placed in SRAM2 section which lead to
*Error[Lp011]: section placement failed - unable to allocate space for sections/
block* error. This patch modifies the STM32L4 linker script and places STACKHEAP
into SRAM1 section which was previously unused.
Change-Id: Ibe6ca52a9fe7af232a3eade2f6b1f2ce28c9bd49
ohagendorf
Bartosz Szczepanski
adustm
bcostm
Olaf Hagendorf
adustm
Martin Kojtal
svastm
neilt6
Sam Grove
Helmut Tschemernjak
Russ Butler
Mahadevan Mahesh