Commit Graph

6055 Commits (c2e3001739cd91e79c3d3874678a8714b0c075d1)

Author SHA1 Message Date
ohagendorf 1be302b1b6 [STM32F4xx] bugfix for PR #1707 - more typos
I found and corrected some more typos.
2016-05-16 19:05:57 +02:00
Bartosz Szczepanski 840df6ccd7 [NUCLEO_L053R8] Fix issue #816
NUCLEO_L053R8 is using a 16 bit timer as a internal ticker but the mBed ticker
needs a 32 bit timer, so the upper upart of that timer is being calculated in
software. Continous HIGH/LOW voltage levels were observerd for 65ms due to timer
overflow, so to narrow down the issue, it was decided to switch to 16 bit values
and glue them to get a 32 bit timer.

Change-Id: I54a06d5aa0f8ddabd8abc194470845a2509e0c55
2016-05-16 13:41:53 +02:00
Bartosz Szczepanski 1d1f7ab133 [STM32F4] Clock and interrupt fixes (#1735)
* [STM32F4] Get PCLK1 clock and set initial CAN frequency

CAN bus opperates on APB1 peripheral clock due to that we need to get PCLK1 freq
in *can_frequency()* function to properly calculate CAN speed and reconfigure
BS1, BS2, SJW bits.

Also to fully communicate with other ST platform we set the initical CAN
frequency to 100kb/s to be able to work with the slowest platform which supports
CAN, which is NUCLEO_F303K8 (APB1 is 32MHz).

Change-Id: I10af3aa8d715dd61c9d1b216ef813193449fecbd

* [STM32F4] Fix for CAN2 interrupt index

CAN2 interrupt index was wrong leading to not properly registering interrupt.
Having this fix allow us to pass MBED_30 test.

Change-Id: I33f9ca7c81286f7746a8f8352619e213bdf9756a
2016-05-16 11:55:59 +01:00
ohagendorf 97d282eae1 [STM32F4xx] bugfix for PR #1707
With PR #1707 all STM32F4 targets with UART4 and UART5 are broken, a several typos in function definition.
Seems to be a bug in STM32Fcube HAL, not only in the (older) mbed versin but also in current version
2016-05-15 19:24:23 +02:00
adustm 7bd986845c [STM32F1 F4] Fix #1705 MBED_37 (#1707)
* [STM32F1 F4] Fix #1705 MBED_37

The transmit data register needs to be flushed at the initialisation of
the uart.
In case previous transmission was interrupted by a uart init, uart may
contain a char that will be transmitted at the next start.

This is the case in MBED_37 test (serial_auto_nc_rx).
The MCU is writting {{start}}\n
At the moment of the \n the main program is handling 'new serial'. The
next time the main program is handling a printf, the previous \n is
still present in the uart->DR register and is transmitted.
This cannot happen anymore with this commit

* [STM32_F1] Fix #1705 MBED_37 by resetting the uart
2016-05-13 15:50:13 +01:00
bcostm 13f0c1ff6f [NUCLEO_F746ZG] Add RTOS and MBED_A8 tests (#1728)
* Add RTOS, MBED_A8 tests

* [NUCLEO_F746ZG] Add pins for MBED_A8 test
2016-05-13 15:46:03 +01:00
Olaf Hagendorf a4c55293e0 minor change in doc string format in exporter.py (#1739) 2016-05-13 10:39:56 +01:00
adustm e5c1d37c25 [STM32F7] add FPU option for assembly compiling (needed for rtos library) 2016-05-13 11:19:07 +02:00
adustm dbb99d4eee NUCLEO_F746ZG] add this board to rtos 1-8 tests 2016-05-13 10:59:59 +02:00
Martin Kojtal 6483faedd2 Merge pull request #1734 from svastm/fix_adc_f746zg
[STM32F7] Fix end of conversion
2016-05-13 09:09:49 +01:00
svastm 62aca7515d [STM32F7] Fix end of analogin conversion 2016-05-12 10:09:54 +02:00
neilt6 a2bfca7527 [RTOS] Fixed osThreadGetState()
Fixed regression that caused terminated threads to return an erroneous
state value instead of "inactive".
2016-05-11 16:06:24 -06:00
Martin Kojtal 3210b40a91 Merge pull request #1729 from mbedmicro/release
mbed lib v120
2016-05-11 11:13:02 -05:00
0xc0170 3d988623d4 mbed lib revision - 120 2016-05-10 10:21:13 -05:00
0xc0170 1290925ad1 Build release - RZ_A1H iar removal
There are issues with cmsis API, which were not ported to IAR.
2016-05-10 10:21:09 -05:00
Martin Kojtal be6e09bec3 Merge pull request #1725 from 0xc0170/fix_ksdk_old_macro
Target - backward compatibility KSDK 1.0 labels
2016-05-09 15:12:13 -05:00
0xc0170 5681da0845 Target - backward compatibility KSDK 1.0 labels
The extra_labels should not be removed, as it could break old sources or
mbed-lib or applications.
2016-05-09 13:44:37 -05:00
Martin Kojtal 7b4f4fc40d Merge pull request #1715 from helmut64/L4heapsize
Changed the heap size to the correct MCU heap size for SRAM1
2016-05-09 12:35:10 -05:00
Martin Kojtal a97cf280f3 Merge pull request #1713 from BartSX/stm32f4_can
[STM32F4 family] Assign CAN filter number properly
2016-05-09 12:31:39 -05:00
Martin Kojtal 8ea1244a2e Merge pull request #1712 from BartSX/iar
[STM32L4] Fix IAR section placement failed error
2016-05-09 12:30:47 -05:00
Martin Kojtal ad75bdcde3 Merge pull request #1704 from adustm/stm32f1_cube_update
[STMF1] Stm32f1_hal_cube update
2016-05-09 12:26:22 -05:00
Martin Kojtal 15cfb8fe4a Merge pull request #1718 from 0xc0170/fix_rtos_idle
gcc - use group for ld to resolve symbols from libraries
2016-05-09 12:25:54 -05:00
0xc0170 58e47dc500 gcc makefile - use group for ld to resolve symbols from libraries 2016-05-09 12:06:33 -05:00
0xc0170 8681a8d53e gcc - use group for ld to resolve symbols from libraries
This fixes problem we have seen with rtos_idle_loop. The symbols
was not resolved as order played a role in this case. Remove circular
dependencies member, as it should not be required anymore.
2016-05-09 12:02:23 -05:00
Sam Grove c5b4c543c9 Merge pull request #1720 from 0xc0170/fix_rtos_macro
RTOS - fix Cortex-M version - add macros required for new kernel
2016-05-06 13:01:33 -05:00
0xc0170 9aee702b11 RTX - pull cmsis_os into rt_Timer
This causing a warning in the rt_cmsis.c, as they use preprocessor
to redefine a type. A fix is to move the macro above, as it should not
change anything else. This should be removed, and use a cast, however I am
not fully familiar why they do this macro trick.
2016-05-06 12:27:25 -05:00
0xc0170 def841979a RTOS - fix Cortex-M version - add macros required for new kernel
2 new macros were introduced to capture changes in the kernel. We used toolchains/__init__
script to capture those, which is not in the sync with actual sources. This fix introduces
those macros in the source, rather than a script.

We will further eliminate those macros to be used outside of RTX kernel (c++ API).
2016-05-06 11:50:21 -05:00
Martin Kojtal 84fc61c940 Merge pull request #1716 from neilt6/master
[RTOS] Improved Error Functions
2016-05-05 15:50:50 -05:00
neilt6 a484830587 [RTOS] Improved Error Functions
Added error message to sysThreadError(), and improved os_error().
2016-05-05 14:43:56 -06:00
Helmut Tschemernjak 324dd06216 Changed the heap size to the correct MCU heap size for SRAM1 2016-05-05 22:14:30 +02:00
Martin Kojtal 53b54323ba Merge pull request #1706 from LMESTM/fix_pwmout
Fix pwmout for STM32F3
2016-05-05 14:46:07 -05:00
Martin Kojtal 860fdd282b Merge pull request #1702 from 0xc0170/dev_rtos_update
rtx update to v4.79
2016-05-05 14:35:40 -05:00
0xc0170 cacf085e73 rtx - set task id prior rt_init_context
This is a bugfix, which caused LPC1549 to fail (os_error). There was a fix
introduced to rtx mbed sources. For more information:
461403989c
2016-05-05 13:49:47 -05:00
0xc0170 239c40eb62 RTX - os_error invokes mbed error() 2016-05-05 12:11:11 -05:00
0xc0170 bc270f1fe2 RTX - expose rt_tid2ptcb() function to get TCB
This enables the stack info methods to be supported for Cortex-M
targets. The rt_TypeDef required one small change - rename new structure
member as this is a reserved keyword in C++.

We need to ask for tid everytime we need to use tcb, do not expose internal
RTX details, we keep it within Thread.cpp file.
2016-05-05 12:11:09 -05:00
0xc0170 9d06547135 lwip - fix size of sys mutex for RTX 4.79
The size was increased to 4 bytes. Thanks @c1728p9 for spotting this.
2016-05-05 12:11:08 -05:00
Russ Butler ab3c1e3a16 RTX: Support stacks larger than 64k
Cherry pick commit d587474778 -
"RTX: Support stacks larger than 64k"

This allows the latest version of the RTOS to run mbed client over
ethernet without crashing.
2016-05-05 12:11:06 -05:00
Martin Kojtal 007223c954 RTX - fix missing header guards for Cortex-M4 (GCC ARM)
The HAL CM4 is valid only for FPU present. These guards were added
to mbed SDK, as there are targets Cortex-M4.
2016-05-05 12:11:04 -05:00
Martin Kojtal aa6f0b8df1 RTOS - update for RTX v4.79 for Cortex-M
Thread - stack methods are not available for now, as tcb pointer was removed from
internal structure. To obtain it, we could get it from the kernel, but this should be
reconsidered. Either RTOS should provide it, or these methods will become deprecated.
2016-05-05 12:11:02 -05:00
Martin Kojtal 9a68561b69 RTX - update to v4.79 for Cortex-M
Changes to the original kernel:

Cortex-M requires to define __CMSIS_OS_RTX, and __MBED_CMSIS_RTOS_CM. The macro __MBED_CMSIS_RTOS_CM
is mbed specific macro, to track changes to the kernel. This should keep us aware what has changed. For instance,
one breaking change was thread adding instances variable, which were not in mbed. This can be find as
it's protected via __MBED_CMSIS_RTOS_CM ifdef.

```
// added for mbed compatibility
// original RTX code
```

Startup for toolchains - mbed defines own stack pointer (set_main_stack()), therefore it should be called in the startup.
IAR added low level init calls and dynamic intialization to the IAR startup. All defined in RTX_CM_lib.h.

The timer thread has task id 0x01, main task 0x02. There are exception for main task not to check for
overflows. This is mbed specific, was reapplied from mbed code base.

IAR fixed SVC calls, this fix had to be reapplied (repo mbed PR 736 for more information).
2016-05-05 12:11:00 -05:00
0xc0170 8bbe0bb3ca Cortex symbols - add cmsis rtos for all cortex cores 2016-05-05 12:10:56 -05:00
Martin Kojtal fcf297438c Merge pull request #1711 from 0xc0170/fix_uvision_inc
uvision - fix INC dir
2016-05-05 11:25:52 -05:00
Bartosz Szczepanski 1244d1504f [STM32F4 family] Assign CAN filter number properly
There are 28 filter banks which are shared between CAN1 and CAN2. By default
they are divided in half:

    * CAN1 -> 0  ... 13
    * CAN2 -> 14 ... 27

that's why we need to decied which filter number has to be chosen.

Change-Id: If5f0da035c1435c61d4748b12d6617e9005cfd83
2016-05-05 11:26:39 +02:00
Bartosz Szczepanski d76bdde5a0 [STM32L4] Fix IAR section placement failed error
For some reason STACKHEAP block was placed in SRAM2 section which lead to
*Error[Lp011]: section placement failed - unable to allocate space for sections/
block* error. This patch modifies the STM32L4 linker script and places STACKHEAP
into SRAM1 section which was previously unused.

Change-Id: Ibe6ca52a9fe7af232a3eade2f6b1f2ce28c9bd49
2016-05-05 10:37:40 +02:00
0xc0170 89b6c41a1b uvision5 - add flags from uvision toolchain class
Flags should be unique, thus use list(set()) to remove duplicates
2016-05-04 16:56:43 -05:00
0xc0170 5ce3ec9619 uvision - fix INC dir
The path for INC might be with spaces, uvision does not handle it well,
thus wrapping around ""
2016-05-04 16:41:01 -05:00
Martin Kojtal 816233cf5d Merge pull request #1710 from NXPmicro/dev_ksdk_2.0
Fix build warnings
2016-05-04 16:17:07 -05:00
Mahadevan Mahesh df4c79cd74 Fix build warnings
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2016-05-04 15:01:24 -05:00
Martin Kojtal 8dfa3ea649 Merge pull request #1709 from 0xc0170/fix_uvision_flags_asm
uvision - fix c/asm flags
2016-05-04 12:04:51 -05:00
0xc0170 ded7d39c76 uvision - microlib fix - commands to use -D__MICROLIB
Exporters use --library_type=microlib. This will be unified soon, as currently
the templates does not support ASM macros.
2016-05-04 11:42:45 -05:00