There was some interesting stuff here.
* ARMC6 treats assembly the same as GNU, but has a different startup
function, so we branch the asm there
* Incorrect discriminant, probably copied from other ports
While ARMC6 does use the same linker (armlink) as ARM Compiler 5, it
is not compatible.
The reason for this incompatibility are twofold:
* armlink may invoke the C preprocessor by adding a shebang
(`#!`) to the top of their input files.
* ARMC6 and ARMC5 differ in how you invoke the preprocessor:
* ARMC5: `#! armcc -E`
* ARMC6: `#! armclang -E`
This forces the tools to rewrite the shebang if it's wrong.
This does not yet handle dependencies properly
Add NOPs after deep sleep to prevent unexpected behavior. It appears
that the first one or two instructions after deep sleep do not get
executed properly.
Note - This is a temporary workaround. For a more robust solution
the NCS36510 needs to investigate the root cause of this issue.
The lp_ticker test overrides the default ticker handler for the
low power ticker. This stops all other low power TimerEvents in the
system, including the ones for tickless, from getting called. Because
of this devices with tickless enabled malfunction during this test.
This patch fixes this problem by passing all lp ticker events it did
not trigger on to the TimerEvent irq handler.
Cellular example had build issues with IAR8, combination of define and string
as argument to send function resulted in above error. Typecasting to const char *
didn't help, hence replacing the define explicitly.
The NCS36510 is not suitable for tickless, since its LP ticker cannot
be scheduled fast enough. This is because it takes four 32KHz clock
cycles before these writes take effect - ~120us.
Increase the Timeout period from 1ms to 10ms so interrupt latency has
1/10th the effect on the measurement. This prevents failures due to
interrupt latency causing a drift.
Decrease the interrupt stack from 2k down to 1k so there is enough
ram to build all the tests with tickless enabled. In general, targets
should not need an interrupt stack greater than 1k with mbed-os.
Some Cortex-M0 devices, such as the nrf51, don't have the SysTick.
Instead, these targets use a software interrupt to simulate SysTick.
Add the hooks in the tickless code to support these devices. Targets
which do not have SysTick should now define NO_SYSTICK in targets.json
and implement mbed_get_m0_tick_irqn to add os suport.
This patch also removes os tick handling from the existing devices
(nrf51) since this is now handled in common code.
Add support for tickless by replacing RTX's SysTick timer code with
with code which uses an mbed timer along with suspending and
resuming the kernel in the idle loop. Tickless is enabled on a
per-target basis by defining the macro MBED_TICKLESS.
Shrikant Tudavekar
Martin Kojtal
Jimmy Brisson
Anna Bridge
Deepika
Russ Butler
Russ Butler