mirror of https://github.com/ARMmbed/mbed-os.git
Merge pull request #4916 from JojoS62/add_MCUXpresso_exporter
Add mcuxpresso exporterpull/5061/head
Jimmy Brisson
GitHub
commit
a108adf396
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@ -29,7 +29,7 @@ from tools.build_api import prepare_toolchain
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from tools.build_api import scan_resources
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from tools.toolchains import Resources
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from tools.export import lpcxpresso, ds5_5, iar, makefile
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from tools.export import embitz, coide, kds, simplicity, atmelstudio
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from tools.export import embitz, coide, kds, simplicity, atmelstudio, mcuxpresso
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from tools.export import sw4stm32, e2studio, zip, cmsis, uvision, cdt, vscode
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from tools.export import gnuarmeclipse
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from tools.export import qtcreator
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@ -56,6 +56,7 @@ EXPORTERS = {
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'eclipse_iar' : cdt.EclipseIAR,
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'eclipse_armc5' : cdt.EclipseArmc5,
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'gnuarmeclipse': gnuarmeclipse.GNUARMEclipse,
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'mcuxpresso': mcuxpresso.MCUXpresso,
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'qtcreator': qtcreator.QtCreator,
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'vscode_gcc_arm' : vscode.VSCodeGcc,
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'vscode_iar' : vscode.VSCodeIAR,
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@ -0,0 +1,278 @@
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<?xml version="1.0" encoding="UTF-8" standalone="no"?>
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<?fileVersion 4.0.0?><cproject storage_type_id="org.eclipse.cdt.core.XmlProjectDescriptionStorage">
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<storageModule moduleId="org.eclipse.cdt.core.settings">
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{% for cfg_key in options %}
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{% set opts = options[cfg_key] %}
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<cconfiguration id="com.crt.advproject.config.exe.{{opts['id']}}.{{opts['uid']['config']}}">
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<storageModule buildSystemId="org.eclipse.cdt.managedbuilder.core.configurationDataProvider" id="com.crt.advproject.config.exe.{{opts['id']}}.{{opts['uid']['config']}}" moduleId="org.eclipse.cdt.core.settings" name="{{opts['name']}}">
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<externalSettings/>
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<extensions>
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<extension id="org.eclipse.cdt.core.ELF" point="org.eclipse.cdt.core.BinaryParser"/>
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<extension id="org.eclipse.cdt.core.GNU_ELF" point="org.eclipse.cdt.core.BinaryParser"/>
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<extension id="org.eclipse.cdt.core.GmakeErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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<extension id="org.eclipse.cdt.core.GASErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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<extension id="org.eclipse.cdt.core.GLDErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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<extension id="org.eclipse.cdt.core.CWDLocator" point="org.eclipse.cdt.core.ErrorParser"/>
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<extension id="org.eclipse.cdt.core.GCCErrorParser" point="org.eclipse.cdt.core.ErrorParser"/>
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</extensions>
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</storageModule>
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<storageModule moduleId="cdtBuildSystem" version="4.0.0">
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<configuration artifactExtension="axf" artifactName="${ProjName}" buildArtefactType="org.eclipse.cdt.build.core.buildArtefactType.exe" buildProperties="org.eclipse.cdt.build.core.buildArtefactType=org.eclipse.cdt.build.core.buildArtefactType.exe" cleanCommand="rm -rf" description="{{opts['name']}} build" errorParsers="org.eclipse.cdt.core.CWDLocator;org.eclipse.cdt.core.GmakeErrorParser;org.eclipse.cdt.core.GCCErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GASErrorParser" id="com.crt.advproject.config.exe.{{opts['id']}}.{{opts['uid']['config']}}" name="{{opts['name']}}" parent="com.crt.advproject.config.exe.{{opts['id']}}" postannouncebuildStep="Performing post-build steps" postbuildStep="arm-none-eabi-size "${BuildArtifactFileName}" ; arm-none-eabi-objcopy -v -O binary "${BuildArtifactFileName}" "${BuildArtifactFileBaseName}.bin" ; checksum -p ${TargetChip} -d "${BuildArtifactFileBaseName}.bin"">
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<folderInfo id="com.crt.advproject.config.exe.{{opts['id']}}.{{opts['uid']['config']}}" name="/" resourcePath="">
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<toolChain id="com.crt.advproject.toolchain.exe.{{opts['id']}}.{{u.id}}" name="NXP MCU Tools" superClass="com.crt.advproject.toolchain.exe.{{opts['parent_id']}}">
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<targetPlatform binaryParser="org.eclipse.cdt.core.ELF;org.eclipse.cdt.core.GNU_ELF" id="com.crt.advproject.platform.exe.{{opts['id']}}.{{u.id}}" name="ARM-based MCU ({{opts['name']}})" superClass="com.crt.advproject.platform.exe.{{opts['id']}}"/>
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<builder buildPath="${workspace_loc:/{{name}}}/{{opts['name']}}" cleanBuildTarget="mbedclean" id="com.crt.advproject.builder.exe.{{opts['id']}}.{{u.id}}" incrementalBuildTarget="{{opts['ld']['script']}} all" keepEnvironmentInBuildfile="false" managedBuildOn="true" name="Gnu Make Builder" parallelBuildOn="true" parallelizationNumber="optimal" superClass="com.crt.advproject.builder.exe.{{opts['id']}}"/>
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<tool id="com.crt.advproject.cpp.exe.{{opts['id']}}.{{opts['uid']['tool_cpp_compiler']}}" name="MCU C++ Compiler" superClass="com.crt.advproject.cpp.exe.{{opts['id']}}">
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<option id="com.crt.advproject.cpp.specs.{{u.id}}" name="Specs" superClass="com.crt.advproject.cpp.specs" value="com.crt.advproject.cpp.specs.newlibnano" valueType="enumerated"/>
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<option id="com.crt.advproject.cpp.arch.{{u.id}}" name="Architecture" superClass="com.crt.advproject.cpp.arch" value="com.crt.advproject.cpp.target.{{opts['common']['arm.target.family_nxp']}}" valueType="enumerated"/>
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{% if opts['common']['optimization.level'] != '' %}
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<option id="com.crt.advproject.cpp.exe.{{opts['id']}}.option.optimization.level.{{u.id}}" name="Optimization Level" superClass="com.crt.advproject.cpp.exe.{{opts['id']}}.option.optimization.level" useByScannerDiscovery="false" value="gnu.cpp.compiler.optimization.level.{{opts['common']['optimization.level']}}" valueType="enumerated"/>
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{% endif %}
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<option id="gnu.cpp.compiler.option.optimization.flags.{{u.id}}" superClass="gnu.cpp.compiler.option.optimization.flags" useByScannerDiscovery="false" value="{{opts['cpp']['otheroptimizations']}} {{opts['common']['optimization.other']}}" valueType="string"/>
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{% if opts['cpp']['compiler.std'] %}
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<option id="com.crt.advproject.cpp.misc.dialect.{{u.id}}" name="Language standard" superClass="com.crt.advproject.cpp.misc.dialect" useByScannerDiscovery="true" value="com.crt.advproject.misc.dialect.{{opts['cpp']['compiler.std']}}" valueType="enumerated"/>
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{% endif %}
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<option id="gnu.cpp.compiler.option.preprocessor.def.{{u.id}}" name="Defined symbols (-D)" superClass="gnu.cpp.compiler.option.preprocessor.def" valueType="definedSymbols">
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{% for s in opts['cpp']['defines'] %}
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<listOptionValue builtIn="false" value="{{s|replace("\"", "\\\"")|escape}}"/>
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{% endfor %}
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</option>
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<option id="gnu.cpp.compiler.option.include.paths.{{u.id}}" name="Include paths (-I)" superClass="gnu.cpp.compiler.option.include.paths" valueType="includePath">
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{% for path in opts['common']['include_paths'] %}
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<listOptionValue builtIn="false" value=""${ProjDirPath}/{{path}}""/>
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{% endfor %}
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</option>
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<option id="gnu.cpp.compiler.option.include.files.{{u.id}}" name="Include files (-include)" superClass="gnu.cpp.compiler.option.include.files" valueType="includeFiles">
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{% for file in opts['common']['include_files'] %}
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<listOptionValue builtIn="false" value=""${ProjDirPath}/{{file}}""/>
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{% endfor %}
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</option>
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{% if opts['common']['warnings.syntaxonly'] %}
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<option id="gnu.cpp.compiler.option.warnings.syntax.{{u.id}}" superClass="gnu.cpp.compiler.option.warnings.syntax" value="true" valueType="boolean"/>
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{% endif %}
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{% if opts['common']['warnings.pedantic'] %}
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<option id="gnu.cpp.compiler.option.warnings.pedantic.{{u.id}}" superClass="gnu.cpp.compiler.option.warnings.pedantic" value="true" valueType="boolean"/>
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{% endif %}
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{% if opts['common']['warnings.pedanticerrors'] %}
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<option id="gnu.cpp.compiler.option.warnings.pedantic.error.{{u.id}}" superClass="gnu.cpp.compiler.option.warnings.pedantic.error" value="true" valueType="boolean"/>
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{% endif %}
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{% if opts['common']['warnings.nowarn'] %}
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<option id="gnu.cpp.compiler.option.warnings.nowarn.{{u.id}}" superClass="gnu.cpp.compiler.option.warnings.nowarn" value="true" valueType="boolean"/>
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{% endif %}
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{% if opts['common']['warnings.allwarn'] %}
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<option id="gnu.cpp.compiler.option.warnings.allwarn.{{u.id}}" name="Enable all common warnings (-Wall)" superClass="gnu.cpp.compiler.option.warnings.allwarn" value="true" valueType="boolean"/>
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{% endif %}
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{% if opts['common']['warnings.extrawarn'] %}
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<option id="gnu.cpp.compiler.option.warnings.extrawarn.{{u.id}}" name="Enable extra warnings (-Wextra)" superClass="gnu.cpp.compiler.option.warnings.extrawarn" value="true" valueType="boolean"/>
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{% endif %}
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{% if opts['common']['warnings.toerrors'] %}
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<option id="gnu.cpp.compiler.option.warnings.toerrors.{{u.id}}" superClass="gnu.cpp.compiler.option.warnings.toerrors" value="true" valueType="boolean"/>
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{% endif %}
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{% if opts['common']['warnings.conversion'] %}
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<option id="gnu.cpp.compiler.option.warnings.wconversion.{{u.id}}" name="Warn on implicit conversions (-Wconversion)" superClass="gnu.cpp.compiler.option.warnings.wconversion" value="true" valueType="boolean"/>
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{% endif %}
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{% if opts['common']['optimization.lto'] %}
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<option id="com.crt.advproject.cpp.lto.{{u.id}}" name="Enable Link-time optimization (-flto)" superClass="com.crt.advproject.cpp.lto" useByScannerDiscovery="false" value="true" valueType="boolean"/>
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{% endif %}
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{% if opts['common']['optimization.lto_objects'] %}
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<option id="com.crt.advproject.cpp.lto.fat.{{u.id}}" name="Fat lto objects (-ffat-lto-objects)" superClass="com.crt.advproject.cpp.lto.fat" useByScannerDiscovery="false" value="true" valueType="boolean"/>
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{% endif %}
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{% if opts['cpp']['verbose'] %}
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<option id="gnu.cpp.compiler.option.other.verbose.{{u.id}}" name="Verbose (-v)" superClass="gnu.cpp.compiler.option.other.verbose" useByScannerDiscovery="false" value="true" valueType="boolean"/>
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{% endif %}
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{% if opts['common']['arm.target.fpu.unit_nxp'] %}
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<option id="com.crt.advproject.cpp.fpu.{{u.id}}" name="Floating point" superClass="com.crt.advproject.cpp.fpu" useByScannerDiscovery="false" value="com.crt.advproject.cpp.fpu.{{opts['common']['arm.target.fpu.unit_nxp']}}" valueType="enumerated"/>
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{% endif %}
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<option id="gnu.cpp.compiler.option.other.other.{{u.id}}" superClass="gnu.cpp.compiler.option.other.other" useByScannerDiscovery="false" value="-c {{opts['cpp']['other']}} {{opts['common']['warnings.other']}}" valueType="string"/>
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<inputType id="com.crt.advproject.compiler.cpp.input.{{opts['uid']['tool_cpp_compiler_input']}}" superClass="com.crt.advproject.compiler.cpp.input"/>
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</tool>
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<tool id="com.crt.advproject.gcc.exe.{{opts['id']}}.{{opts['uid']['tool_c_compiler']}}" name="MCU C Compiler" superClass="com.crt.advproject.gcc.exe.{{opts['id']}}">
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<option id="com.crt.advproject.gcc.hdrlib.{{u.id}}" name="Library headers" superClass="com.crt.advproject.gcc.hdrlib" value="com.crt.advproject.gcc.hdrlib.newlibnano" valueType="enumerated"/>
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<option id="com.crt.advproject.gcc.specs.{{u.id}}" name="Specs" superClass="com.crt.advproject.gcc.specs" value="com.crt.advproject.gcc.specs.newlibnano" valueType="enumerated"/>
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<option id="com.crt.advproject.gcc.arch.{{u.id}}" name="Architecture" superClass="com.crt.advproject.gcc.arch" value="com.crt.advproject.gcc.target.{{opts['common']['arm.target.family_nxp']}}" valueType="enumerated"/>
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{% if opts['common']['optimization.level'] != '' %}
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<option id="com.crt.advproject.gcc.exe.{{opts['id']}}.option.optimization.level.{{u.id}}" name="Optimization Level" superClass="com.crt.advproject.gcc.exe.{{opts['id']}}.option.optimization.level" useByScannerDiscovery="false" value="gnu.c.optimization.level.{{opts['common']['optimization.level']}}" valueType="enumerated"/>
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{% endif %}
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<option id="gnu.c.compiler.option.optimization.flags.{{u.id}}" superClass="gnu.c.compiler.option.optimization.flags" useByScannerDiscovery="false" value="{{opts['c']['otheroptimizations']}} {{opts['common']['optimization.other']}}" valueType="string"/>
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{% if opts['c']['compiler.std'] %}
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<option id="com.crt.advproject.c.misc.dialect.{{u.id}}" name="Language standard" superClass="com.crt.advproject.c.misc.dialect" useByScannerDiscovery="true" value="com.crt.advproject.misc.dialect.{{opts['c']['compiler.std']}}" valueType="enumerated"/>
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{% endif %}
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<option id="gnu.c.compiler.option.preprocessor.def.symbols.{{u.id}}" name="Defined symbols (-D)" superClass="gnu.c.compiler.option.preprocessor.def.symbols" valueType="definedSymbols">
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{% for s in opts['c']['defines'] %}
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<listOptionValue builtIn="false" value="{{s|replace("\"", "\\\"")|escape}}"/>
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{% endfor %}
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</option>
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<option id="gnu.c.compiler.option.include.paths.{{u.id}}" name="Include paths (-I)" superClass="gnu.c.compiler.option.include.paths" valueType="includePath">
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{% for path in opts['common']['include_paths'] %}
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<listOptionValue builtIn="false" value=""${ProjDirPath}/{{path}}""/>
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{% endfor %}
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</option>
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<option id="gnu.c.compiler.option.include.files.{{u.id}}" name="Include files (-include)" superClass="gnu.c.compiler.option.include.files" valueType="includeFiles">
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{% for file in opts['common']['include_files'] %}
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<listOptionValue builtIn="false" value=""${ProjDirPath}/{{file}}""/>
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{% endfor %}
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</option>
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{% if opts['common']['warnings.syntaxonly'] %}
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<option id="gnu.c.compiler.option.warnings.syntax.{{u.id}}" superClass="gnu.c.compiler.option.warnings.syntax" value="true" valueType="boolean"/>
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{% endif %}
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{% if opts['common']['warnings.pedantic'] %}
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<option id="gnu.c.compiler.option.warnings.pedantic.{{u.id}}" superClass="gnu.c.compiler.option.warnings.pedantic" value="true" valueType="boolean"/>
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{% endif %}
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{% if opts['common']['warnings.pedanticerrors'] %}
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<option id="gnu.c.compiler.option.warnings.pedantic.error.{{u.id}}" superClass="gnu.c.compiler.option.warnings.pedantic.error" value="true" valueType="boolean"/>
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{% endif %}
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{% if opts['common']['warnings.nowarn'] %}
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<option id="gnu.c.compiler.option.warnings.nowarn.{{u.id}}" superClass="gnu.c.compiler.option.warnings.nowarn" value="true" valueType="boolean"/>
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{% endif %}
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{% if opts['common']['warnings.allwarn'] %}
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<option id="gnu.c.compiler.option.warnings.allwarn.{{u.id}}" name="Enable all common warnings (-Wall)" superClass="gnu.c.compiler.option.warnings.allwarn" value="true" valueType="boolean"/>
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{% endif %}
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{% if opts['common']['warnings.extrawarn'] %}
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<option id="gnu.c.compiler.option.warnings.extrawarn.{{u.id}}" name="Enable extra warnings (-Wextra)" superClass="gnu.c.compiler.option.warnings.extrawarn" value="true" valueType="boolean"/>
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{% endif %}
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{% if opts['common']['warnings.toerrors'] %}
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<option id="gnu.c.compiler.option.warnings.toerrors.{{u.id}}" superClass="gnu.c.compiler.option.warnings.toerrors" value="true" valueType="boolean"/>
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{% endif %}
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{% if opts['common']['warnings.conversion'] %}
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<option id="gnu.c.compiler.option.warnings.wconversion.{{u.id}}" name="Warn on implicit conversions (-Wconversion)" superClass="gnu.c.compiler.option.warnings.wconversion" value="true" valueType="boolean"/>
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{% endif %}
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{% if opts['c']['verbose'] %}
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<option id="gnu.c.compiler.option.misc.verbose.{{u.id}}" name="Verbose (-v)" superClass="gnu.c.compiler.option.misc.verbose" useByScannerDiscovery="false" value="true" valueType="boolean"/>
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{% endif %}
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{% if opts['common']['arm.target.fpu.unit_nxp'] %}
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<option id="com.crt.advproject.gcc.fpu.{{u.id}}" name="Floating point" superClass="com.crt.advproject.gcc.fpu" useByScannerDiscovery="false" value="com.crt.advproject.gcc.fpu.{{opts['common']['arm.target.fpu.unit_nxp']}}" valueType="enumerated"/>
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{% endif %}
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{% if opts['common']['optimization.lto'] %}
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<option id="com.crt.advproject.gcc.lto.{{u.id}}" name="Enable Link-time optimization (-flto)" superClass="com.crt.advproject.gcc.lto" useByScannerDiscovery="false" value="true" valueType="boolean"/>
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{% endif %}
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{% if opts['common']['optimization.lto_objects'] %}
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<option id="com.crt.advproject.gcc.lto.fat.{{u.id}}" name="Fat lto objects (-ffat-lto-objects)" superClass="com.crt.advproject.gcc.lto.fat" useByScannerDiscovery="false" value="true" valueType="boolean"/>
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{% endif %}
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<option id="gnu.c.compiler.option.misc.other.{{u.id}}" superClass="gnu.c.compiler.option.misc.other" useByScannerDiscovery="false" value="-c {{opts['c']['other']}} {{opts['common']['warnings.other']}}" valueType="string"/>
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<inputType id="com.crt.advproject.compiler.input.{{opts['uid']['tool_c_compiler']}}" superClass="com.crt.advproject.compiler.input"/>
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</tool>
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<tool id="com.crt.advproject.gas.exe.{{opts['id']}}.{{u.id}}" name="MCU Assembler" superClass="com.crt.advproject.gas.exe.{{opts['id']}}">
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<option id="com.crt.advproject.gas.hdrlib.{{u.id}}" name="Library headers" superClass="com.crt.advproject.gas.hdrlib" value="com.crt.advproject.gas.hdrlib.newlibnano" valueType="enumerated"/>
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<option id="com.crt.advproject.gas.specs.{{u.id}}" name="Specs" superClass="com.crt.advproject.gas.specs" value="com.crt.advproject.gas.specs.newlibnano" valueType="enumerated"/>
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<option id="com.crt.advproject.gas.arch.{{u.id}}" name="Architecture" superClass="com.crt.advproject.gas.arch" value="com.crt.advproject.gas.target.{{opts['common']['arm.target.family_nxp']}}" valueType="enumerated"/>
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||||
<option id="gnu.both.asm.option.include.paths.{{u.id}}" name="Include paths (-I)" superClass="gnu.both.asm.option.include.paths" valueType="includePath">
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||||
{% for path in opts['common']['include_paths'] %}
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||||
<listOptionValue builtIn="false" value=""${ProjDirPath}/{{path}}""/>
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||||
{% endfor %}
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||||
</option>
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||||
<inputType id="cdt.managedbuild.tool.gnu.assembler.input.{{u.id}}" superClass="cdt.managedbuild.tool.gnu.assembler.input"/>
|
||||
{% if opts['common']['arm.target.fpu.unit_nxp'] %}
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||||
<option id="com.crt.advproject.gas.fpu.{{u.id}}" name="Floating point" superClass="com.crt.advproject.gas.fpu" useByScannerDiscovery="false" value="com.crt.advproject.gas.fpu.{{opts['common']['arm.target.fpu.unit_nxp']}}" valueType="enumerated"/>
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||||
{% endif %}
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||||
<option id="gnu.both.asm.option.flags.crt.{{u.id}}" superClass="gnu.both.asm.option.flags.crt" useByScannerDiscovery="false" value="-c {{opts['as']['other']}}" valueType="string"/>
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{% if opts['as']['verbose'] %}
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<option id="gnu.both.asm.option.version.{{u.id}}" superClass="gnu.both.asm.option.version" useByScannerDiscovery="false" value="true" valueType="boolean"/>
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{% endif %}
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||||
<inputType id="com.crt.advproject.assembler.input.{{u.id}}" name="Additional Assembly Source Files" superClass="com.crt.advproject.assembler.input"/>
|
||||
</tool>
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||||
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||||
<tool commandLinePattern="${COMMAND} ${OUTPUT_FLAG} ${OUTPUT_PREFIX}${OUTPUT} ${INPUTS} ${FLAGS}" id="com.crt.advproject.link.cpp.exe.{{opts['id']}}.{{u.id}}" name="MCU C++ Linker" superClass="com.crt.advproject.link.cpp.exe.{{opts['id']}}">
|
||||
<option defaultValue="com.crt.advproject.heapAndStack.lpcXpressoStyle.cpp" id="com.crt.advproject.link.memory.heapAndStack.style.cpp.{{u.id}}" name="Heap and Stack placement" superClass="com.crt.advproject.link.memory.heapAndStack.style.cpp" useByScannerDiscovery="false" value="com.crt.advproject.heapAndStack.lpcXpressoStyle.cpp" valueType="enumerated"/>
|
||||
<option id="com.crt.advproject.link.memory.heapAndStack.cpp.{{u.id}}" name="Heap and Stack options" superClass="com.crt.advproject.link.memory.heapAndStack.cpp" useByScannerDiscovery="false" value="&Heap:Default;Post Data;Default&Stack:Default;End;Default" valueType="string"/>
|
||||
<option id="com.crt.advproject.link.cpp.multicore.master.{{u.id}}" name="Multicore master" superClass="com.crt.advproject.link.cpp.multicore.master" useByScannerDiscovery="false"/>
|
||||
<option id="com.crt.advproject.link.cpp.multicore.master.userobjs.{{u.id}}" name="Slave Objects (not visible)" superClass="com.crt.advproject.link.cpp.multicore.master.userobjs" useByScannerDiscovery="false" valueType="userObjs"/>
|
||||
<option id="com.crt.advproject.link.cpp.arch.{{u.id}}" name="Architecture" superClass="com.crt.advproject.link.cpp.arch" useByScannerDiscovery="false" value="com.crt.advproject.link.cpp.target.{{opts['common']['arm.target.family_nxp']}}" valueType="enumerated"/>
|
||||
<option id="gnu.cpp.link.option.paths.{{u.id}}" name="Library search path (-L)" superClass="gnu.cpp.link.option.paths" useByScannerDiscovery="false">
|
||||
{% for path in opts['ld']['library_paths'] %}
|
||||
<listOptionValue builtIn="false" value=""${ProjDirPath}/{{path}}""/>
|
||||
{% endfor %}
|
||||
</option>
|
||||
<option id="gnu.cpp.link.option.libs.{{u.id}}" name="Libraries (-l)" superClass="gnu.cpp.link.option.libs" useByScannerDiscovery="false" valueType="libs">
|
||||
{% for lib in opts['ld']['user_libraries'] %}
|
||||
<listOptionValue builtIn="false" value="{{lib}}"/>
|
||||
{% endfor %}
|
||||
{% for lib in opts['ld']['system_libraries'] %}
|
||||
<listOptionValue builtIn="false" value="{{lib}}"/>
|
||||
{% endfor %}
|
||||
</option>
|
||||
<option id="gnu.cpp.link.option.userobjs.{{u.id}}" name="Other objects" superClass="gnu.cpp.link.option.userobjs" useByScannerDiscovery="false">
|
||||
{% for path in opts['ld']['object_files'] %}
|
||||
<listOptionValue builtIn="false" value=""${ProjDirPath}/{{path}}""/>
|
||||
{% endfor %}
|
||||
</option>
|
||||
|
||||
<option id="gnu.cpp.link.option.other.{{u.id}}" name="Other options (-Xlinker [option])" superClass="gnu.cpp.link.option.other" useByScannerDiscovery="false" valueType="stringList">
|
||||
<listOptionValue builtIn="false" value="-Map="${BuildArtifactFileBaseName}.map""/>
|
||||
<listOptionValue builtIn="false" value="-print-memory-usage"/>
|
||||
{% if opts['ld']['gcsections'] %}
|
||||
<listOptionValue builtIn="false" value="--gc-sections"/>
|
||||
{% endif %}
|
||||
{% for opt in opts['ld']['flags'] %}
|
||||
<listOptionValue builtIn="false" value="{{opt}}"/>
|
||||
{% endfor %}
|
||||
</option>
|
||||
|
||||
{% if opts['ld']['nostart'] %}
|
||||
<option id="gnu.cpp.link.option.nostart.{{u.id}}" name="Do not use standard start files (-nostartfiles)" superClass="gnu.cpp.link.option.nostart" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
{% endif %}
|
||||
{% if opts['ld']['nodeflibs'] %}
|
||||
<option id="gnu.cpp.link.option.nodeflibs.{{u.id}}" name="Do not use default libraries (-nodefaultlibs)" superClass="gnu.cpp.link.option.nodeflibs" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
{% endif %}
|
||||
{% if opts['ld']['nostdlibs'] %}
|
||||
<option id="gnu.cpp.link.option.nostdlibs.{{u.id}}" name="No startup or default libs (-nostdlib)" superClass="gnu.cpp.link.option.nostdlibs" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
{% endif %}
|
||||
{% if opts['ld']['other'] != '' %}
|
||||
<option id="gnu.cpp.link.option.flags.{{u.id}}" superClass="gnu.cpp.link.option.flags" useByScannerDiscovery="false" value="{{opts['ld']['other']}}" valueType="string"/>
|
||||
{% endif %}
|
||||
|
||||
{% if opts['common']['optimization.lto'] %}
|
||||
<option id="com.crt.advproject.link.cpp.lto.{{u.id}}" superClass="com.crt.advproject.link.cpp.lto" useByScannerDiscovery="false" value="true" valueType="boolean"/>
|
||||
{% endif %}
|
||||
|
||||
<option id="com.crt.advproject.link.cpp.script.{{u.id}}" name="Linker script" superClass="com.crt.advproject.link.cpp.script" useByScannerDiscovery="false" value="${ProjDirPath}/{{opts['name']}}/{{opts['ld']['script']}}" valueType="string"/>
|
||||
|
||||
<option id="com.crt.advproject.link.cpp.multicore.slave.{{u.id}}" name="Multicore configuration" superClass="com.crt.advproject.link.cpp.multicore.slave" useByScannerDiscovery="false"/>
|
||||
{% if opts['common']['arm.target.fpu.unit_nxp'] %}
|
||||
<option id="com.crt.advproject.link.cpp.fpu.{{u.id}}" name="Floating point" superClass="com.crt.advproject.link.cpp.fpu" useByScannerDiscovery="false" value="com.crt.advproject.link.cpp.fpu.{{opts['common']['arm.target.fpu.unit_nxp']}}" valueType="enumerated"/>
|
||||
{% endif %}
|
||||
<inputType id="cdt.managedbuild.tool.gnu.cpp.linker.input.{{u.id}}" superClass="cdt.managedbuild.tool.gnu.cpp.linker.input">
|
||||
<additionalInput kind="additionalinputdependency" paths="$(USER_OBJS)"/>
|
||||
<additionalInput kind="additionalinput" paths="$(LIBS)"/>
|
||||
</inputType>
|
||||
</tool>
|
||||
|
||||
<tool id="com.crt.advproject.link.exe.{{opts['id']}}.{{u.id}}" name="MCU Linker" superClass="com.crt.advproject.link.exe.{{opts['id']}}"/>
|
||||
|
||||
</toolChain>
|
||||
</folderInfo>
|
||||
<sourceEntries>
|
||||
<entry excluding="{{opts['common']['excluded_folders']}}" flags="VALUE_WORKSPACE_PATH|RESOLVED" kind="sourcePath" name=""/>
|
||||
</sourceEntries>
|
||||
</configuration>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.externalSettings"/>
|
||||
</cconfiguration>
|
||||
{% endfor %}
|
||||
</storageModule>
|
||||
<storageModule moduleId="cdtBuildSystem" version="4.0.0">
|
||||
<project id="{{name}}.com.crt.advproject.projecttype.exe.{{u.id}}" name="Executable" projectType="com.crt.advproject.projecttype.exe"/>
|
||||
</storageModule>
|
||||
<storageModule moduleId="scannerConfiguration">
|
||||
<autodiscovery enabled="true" problemReportingEnabled="true" selectedProfileId=""/>
|
||||
</storageModule>
|
||||
<storageModule moduleId="org.eclipse.cdt.core.LanguageSettingsProviders"/>
|
||||
<storageModule moduleId="com.crt.config">
|
||||
<projectStorage>{% block cpu_config %}{% endblock %}</projectStorage>
|
||||
</storageModule>
|
||||
<storageModule moduleId="com.nxp.mcuxpresso.core.datamodels">
|
||||
<sdkName>{% block sdk_name %}{% endblock %}</sdkName>
|
||||
<sdkVersion>{% block sdk_version %}{% endblock %}</sdkVersion>
|
||||
</storageModule>
|
||||
<storageModule moduleId="com.crt.advproject"/>
|
||||
</cproject>
|
||||
|
|
@ -0,0 +1,28 @@
|
|||
<?xml version="1.0" encoding="UTF-8"?>
|
||||
<!-- Generated by the GNU ARM Eclipse exporter from an mBed project. -->
|
||||
<projectDescription>
|
||||
<name>{{name}}</name>
|
||||
<comment>This file was automagically generated by mbed.org. For more information, see http://mbed.org/handbook/Exporting-To-GNU-ARM-Eclipse</comment>
|
||||
<projects>
|
||||
</projects>
|
||||
<buildSpec>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
|
||||
<triggers>clean,full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
<buildCommand>
|
||||
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
|
||||
<triggers>full,incremental,</triggers>
|
||||
<arguments>
|
||||
</arguments>
|
||||
</buildCommand>
|
||||
</buildSpec>
|
||||
<natures>
|
||||
<nature>org.eclipse.cdt.core.cnature</nature>
|
||||
<nature>org.eclipse.cdt.core.ccnature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
|
||||
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
|
||||
</natures>
|
||||
</projectDescription>
|
||||
|
|
@ -0,0 +1,98 @@
|
|||
{% extends "mcuxpresso/.cproject.tmpl" %}
|
||||
|
||||
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
|
||||
<TargetConfig>
|
||||
<Properties property_3="NXP" property_4="MK64FN1M0xxx12" property_count="5" version="70200"/>
|
||||
<infoList vendor="NXP"><info chip="MK64FN1M0xxx12" name="MK64FN1M0xxx12"><chip><name>MK64FN1M0xxx12</name>
|
||||
<family>K6x</family>
|
||||
<vendor>NXP</vendor>
|
||||
<memory can_program="true" id="Flash" is_ro="true" size="1024" type="Flash"/>
|
||||
<memory id="RAM" size="256" type="RAM"/>
|
||||
<memoryInstance derived_from="Flash" driver="FTFE_4K.cfx" id="PROGRAM_FLASH" location="0x0" size="0x100000"/>
|
||||
<memoryInstance derived_from="RAM" id="SRAM_UPPER" location="0x20000000" size="0x30000"/>
|
||||
<memoryInstance derived_from="RAM" id="SRAM_LOWER" location="0x1fff0000" size="0x10000"/>
|
||||
<memoryInstance derived_from="RAM" id="FLEX_RAM" location="0x14000000" size="0x1000"/>
|
||||
<peripheralInstance derived_from="FTFE_FlashConfig" id="FTFE_FlashConfig" location="0x400"/>
|
||||
<peripheralInstance derived_from="AIPS0" id="AIPS0" location="0x40000000"/>
|
||||
<peripheralInstance derived_from="AIPS1" id="AIPS1" location="0x40080000"/>
|
||||
<peripheralInstance derived_from="AXBS" id="AXBS" location="0x40004000"/>
|
||||
<peripheralInstance derived_from="DMA" id="DMA" location="0x40008000"/>
|
||||
<peripheralInstance derived_from="FB" id="FB" location="0x4000C000"/>
|
||||
<peripheralInstance derived_from="SYSMPU" id="SYSMPU" location="0x4000D000"/>
|
||||
<peripheralInstance derived_from="FMC" id="FMC" location="0x4001F000"/>
|
||||
<peripheralInstance derived_from="FTFE" id="FTFE" location="0x40020000"/>
|
||||
<peripheralInstance derived_from="DMAMUX" id="DMAMUX" location="0x40021000"/>
|
||||
<peripheralInstance derived_from="CAN0" id="CAN0" location="0x40024000"/>
|
||||
<peripheralInstance derived_from="RNG" id="RNG" location="0x40029000"/>
|
||||
<peripheralInstance derived_from="SPI0" id="SPI0" location="0x4002C000"/>
|
||||
<peripheralInstance derived_from="SPI1" id="SPI1" location="0x4002D000"/>
|
||||
<peripheralInstance derived_from="SPI2" id="SPI2" location="0x400AC000"/>
|
||||
<peripheralInstance derived_from="I2S0" id="I2S0" location="0x4002F000"/>
|
||||
<peripheralInstance derived_from="CRC" id="CRC" location="0x40032000"/>
|
||||
<peripheralInstance derived_from="USBDCD" id="USBDCD" location="0x40035000"/>
|
||||
<peripheralInstance derived_from="PDB0" id="PDB0" location="0x40036000"/>
|
||||
<peripheralInstance derived_from="PIT" id="PIT" location="0x40037000"/>
|
||||
<peripheralInstance derived_from="FTM0" id="FTM0" location="0x40038000"/>
|
||||
<peripheralInstance derived_from="FTM1" id="FTM1" location="0x40039000"/>
|
||||
<peripheralInstance derived_from="FTM2" id="FTM2" location="0x4003A000"/>
|
||||
<peripheralInstance derived_from="FTM3" id="FTM3" location="0x400B9000"/>
|
||||
<peripheralInstance derived_from="ADC0" id="ADC0" location="0x4003B000"/>
|
||||
<peripheralInstance derived_from="ADC1" id="ADC1" location="0x400BB000"/>
|
||||
<peripheralInstance derived_from="RTC" id="RTC" location="0x4003D000"/>
|
||||
<peripheralInstance derived_from="RFVBAT" id="RFVBAT" location="0x4003E000"/>
|
||||
<peripheralInstance derived_from="LPTMR0" id="LPTMR0" location="0x40040000"/>
|
||||
<peripheralInstance derived_from="RFSYS" id="RFSYS" location="0x40041000"/>
|
||||
<peripheralInstance derived_from="SIM" id="SIM" location="0x40047000"/>
|
||||
<peripheralInstance derived_from="PORTA" id="PORTA" location="0x40049000"/>
|
||||
<peripheralInstance derived_from="PORTB" id="PORTB" location="0x4004A000"/>
|
||||
<peripheralInstance derived_from="PORTC" id="PORTC" location="0x4004B000"/>
|
||||
<peripheralInstance derived_from="PORTD" id="PORTD" location="0x4004C000"/>
|
||||
<peripheralInstance derived_from="PORTE" id="PORTE" location="0x4004D000"/>
|
||||
<peripheralInstance derived_from="WDOG" id="WDOG" location="0x40052000"/>
|
||||
<peripheralInstance derived_from="EWM" id="EWM" location="0x40061000"/>
|
||||
<peripheralInstance derived_from="CMT" id="CMT" location="0x40062000"/>
|
||||
<peripheralInstance derived_from="MCG" id="MCG" location="0x40064000"/>
|
||||
<peripheralInstance derived_from="OSC" id="OSC" location="0x40065000"/>
|
||||
<peripheralInstance derived_from="I2C0" id="I2C0" location="0x40066000"/>
|
||||
<peripheralInstance derived_from="I2C1" id="I2C1" location="0x40067000"/>
|
||||
<peripheralInstance derived_from="I2C2" id="I2C2" location="0x400E6000"/>
|
||||
<peripheralInstance derived_from="UART0" id="UART0" location="0x4006A000"/>
|
||||
<peripheralInstance derived_from="UART1" id="UART1" location="0x4006B000"/>
|
||||
<peripheralInstance derived_from="UART2" id="UART2" location="0x4006C000"/>
|
||||
<peripheralInstance derived_from="UART3" id="UART3" location="0x4006D000"/>
|
||||
<peripheralInstance derived_from="UART4" id="UART4" location="0x400EA000"/>
|
||||
<peripheralInstance derived_from="UART5" id="UART5" location="0x400EB000"/>
|
||||
<peripheralInstance derived_from="USB0" id="USB0" location="0x40072000"/>
|
||||
<peripheralInstance derived_from="CMP0" id="CMP0" location="0x40073000"/>
|
||||
<peripheralInstance derived_from="CMP1" id="CMP1" location="0x40073008"/>
|
||||
<peripheralInstance derived_from="CMP2" id="CMP2" location="0x40073010"/>
|
||||
<peripheralInstance derived_from="VREF" id="VREF" location="0x40074000"/>
|
||||
<peripheralInstance derived_from="LLWU" id="LLWU" location="0x4007C000"/>
|
||||
<peripheralInstance derived_from="PMC" id="PMC" location="0x4007D000"/>
|
||||
<peripheralInstance derived_from="SMC" id="SMC" location="0x4007E000"/>
|
||||
<peripheralInstance derived_from="RCM" id="RCM" location="0x4007F000"/>
|
||||
<peripheralInstance derived_from="SDHC" id="SDHC" location="0x400B1000"/>
|
||||
<peripheralInstance derived_from="ENET" id="ENET" location="0x400C0000"/>
|
||||
<peripheralInstance derived_from="DAC0" id="DAC0" location="0x400CC000"/>
|
||||
<peripheralInstance derived_from="DAC1" id="DAC1" location="0x400CD000"/>
|
||||
<peripheralInstance derived_from="GPIOA" id="GPIOA" location="0x400FF000"/>
|
||||
<peripheralInstance derived_from="GPIOB" id="GPIOB" location="0x400FF040"/>
|
||||
<peripheralInstance derived_from="GPIOC" id="GPIOC" location="0x400FF080"/>
|
||||
<peripheralInstance derived_from="GPIOD" id="GPIOD" location="0x400FF0C0"/>
|
||||
<peripheralInstance derived_from="GPIOE" id="GPIOE" location="0x400FF100"/>
|
||||
<peripheralInstance derived_from="SystemControl" id="SystemControl" location="0xE000E000"/>
|
||||
<peripheralInstance derived_from="SysTick" id="SysTick" location="0xE000E010"/>
|
||||
<peripheralInstance derived_from="NVIC" id="NVIC" location="0xE000E100"/>
|
||||
<peripheralInstance derived_from="MCM" id="MCM" location="0xE0080000"/>
|
||||
<peripheralInstance derived_from="CAU" id="CAU" location="0xE0081000"/>
|
||||
</chip>
|
||||
<processor><name gcc_name="cortex-m4">Cortex-M4</name>
|
||||
<family>Cortex-M</family>
|
||||
</processor>
|
||||
<link href="MK64F12_internal_peripheral.xml" show="embed" type="simple"/>
|
||||
</info>
|
||||
</infoList>
|
||||
</TargetConfig>{% endblock %}
|
||||
|
||||
{% block sdk_name %}SDK_2.x_FRDM-K64F{% endblock %}
|
||||
{% block sdk_version %}2.2.0{% endblock %}
|
||||
|
|
@ -0,0 +1,46 @@
|
|||
{% extends "mcuxpresso/.cproject.tmpl" %}
|
||||
|
||||
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
|
||||
<TargetConfig>
|
||||
<Properties property_2="LPC11_12_13_128K_8K.cfx" property_3="NXP" property_4="LPC11U37H/401" property_count="5" version="70200"/>
|
||||
<infoList vendor="NXP"><info chip="LPC11U37H/401" flash_driver="LPC11_12_13_128K_8K.cfx" match_id="0x0" name="LPC11U37H/401" stub="crt_emu_lpc11_13_nxp"><chip><name>LPC11U37H/401</name>
|
||||
<family>LPC11Uxx</family>
|
||||
<vendor>NXP (formerly Philips)</vendor>
|
||||
<reset board="None" core="Real" sys="Real"/>
|
||||
<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
|
||||
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
|
||||
<memory id="RAM" type="RAM"/>
|
||||
<memory id="Periph" is_volatile="true" type="Peripheral"/>
|
||||
<memoryInstance derived_from="Flash" id="MFlash128" location="0x0" size="0x20000"/>
|
||||
<memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/>
|
||||
<memoryInstance derived_from="RAM" id="RamUsb2" location="0x20004000" size="0x800"/>
|
||||
<memoryInstance derived_from="RAM" id="RamIoh2" location="0x20000000" size="0x800"/>
|
||||
<peripheralInstance derived_from="V6M_NVIC" id="NVIC" location="0xe000e000"/>
|
||||
<peripheralInstance derived_from="V6M_DCR" id="DCR" location="0xe000edf0"/>
|
||||
<peripheralInstance derived_from="I2C" id="I2C" location="0x40000000"/>
|
||||
<peripheralInstance derived_from="WWDT" id="WWDT" location="0x40004000"/>
|
||||
<peripheralInstance derived_from="USART" id="USART" location="0x40008000"/>
|
||||
<peripheralInstance derived_from="CT16B0" id="CT16B0" location="0x4000c000"/>
|
||||
<peripheralInstance derived_from="CT16B1" id="CT16B1" location="0x40010000"/>
|
||||
<peripheralInstance derived_from="CT32B0" id="CT32B0" location="0x40014000"/>
|
||||
<peripheralInstance derived_from="CT32B1" id="CT32B1" location="0x40018000"/>
|
||||
<peripheralInstance derived_from="ADC" id="ADC" location="0x4001c000"/>
|
||||
<peripheralInstance derived_from="PMU" id="PMU" location="0x40038000"/>
|
||||
<peripheralInstance derived_from="FLASHCTRL" id="FLASHCTRL" location="0x4003c000"/>
|
||||
<peripheralInstance derived_from="SSP0" id="SSP0" location="0x40040000"/>
|
||||
<peripheralInstance derived_from="IOCON" id="IOCON" location="0x40044000"/>
|
||||
<peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x40048000"/>
|
||||
<peripheralInstance derived_from="GPIO-PIN-INT" id="GPIO-PIN-INT" location="0x4004c000"/>
|
||||
<peripheralInstance derived_from="SSP1" id="SSP1" location="0x40058000"/>
|
||||
<peripheralInstance derived_from="GPIO-GROUP-INT0" id="GPIO-GROUP-INT0" location="0x4005c000"/>
|
||||
<peripheralInstance derived_from="GPIO-GROUP-INT1" id="GPIO-GROUP-INT1" location="0x40060000"/>
|
||||
<peripheralInstance derived_from="USB" id="USB" location="0x40080000"/>
|
||||
<peripheralInstance derived_from="GPIO-PORT" id="GPIO-PORT" location="0x50000000"/>
|
||||
</chip>
|
||||
<processor><name gcc_name="cortex-m0">Cortex-M0</name>
|
||||
<family>Cortex-M</family>
|
||||
</processor>
|
||||
<link href="LPC11Uxx_peripheral.xme" show="embed" type="simple"/>
|
||||
</info>
|
||||
</infoList>
|
||||
</TargetConfig>{% endblock %}
|
||||
|
|
@ -0,0 +1,63 @@
|
|||
{% extends "mcuxpresso/.cproject.tmpl" %}
|
||||
|
||||
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
|
||||
<TargetConfig>
|
||||
<Properties property_2="LPC15xx_256K.cfx" property_3="NXP" property_4="LPC1549" property_count="5" version="70200"/>
|
||||
<infoList vendor="NXP"><info chip="LPC1549" connectscript="LPC15RunBootRomConnect.scp" flash_driver="LPC15xx_256K.cfx" match_id="0x0" name="LPC1549" resetscript="LPC15RunBootRomReset.scp" stub="crt_emu_cm3_gen"><chip><name>LPC1549</name>
|
||||
<family>LPC15xx</family>
|
||||
<vendor>NXP (formerly Philips)</vendor>
|
||||
<reset board="None" core="Real" sys="Real"/>
|
||||
<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
|
||||
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
|
||||
<memory id="RAM" type="RAM"/>
|
||||
<memory id="Periph" is_volatile="true" type="Peripheral"/>
|
||||
<memoryInstance derived_from="Flash" id="MFlash256" location="0x0" size="0x40000"/>
|
||||
<memoryInstance derived_from="RAM" id="Ram0_16" location="0x2000000" size="0x4000"/>
|
||||
<memoryInstance derived_from="RAM" id="Ram1_16" location="0x2004000" size="0x4000"/>
|
||||
<memoryInstance derived_from="RAM" id="Ram2_4" location="0x2008000" size="0x1000"/>
|
||||
<peripheralInstance derived_from="V7M_MPU" id="MPU" location="0xe000ed90"/>
|
||||
<peripheralInstance derived_from="V7M_NVIC" id="NVIC" location="0xe000e000"/>
|
||||
<peripheralInstance derived_from="V7M_DCR" id="DCR" location="0xe000edf0"/>
|
||||
<peripheralInstance derived_from="V7M_ITM" id="ITM" location="0xe0000000"/>
|
||||
<peripheralInstance derived_from="GPIO-PORT" id="GPIO-PORT" location="0x1c000000"/>
|
||||
<peripheralInstance derived_from="DMA" id="DMA" location="0x1c004000"/>
|
||||
<peripheralInstance derived_from="USB" id="USB" location="0x1c00c000"/>
|
||||
<peripheralInstance derived_from="CRC" id="CRC" location="0x1c010000"/>
|
||||
<peripheralInstance derived_from="SCT0" id="SCT0" location="0x1c018000"/>
|
||||
<peripheralInstance derived_from="SCT1" id="SCT1" location="0x1c01c000"/>
|
||||
<peripheralInstance derived_from="SCT2" id="SCT2" location="0x1c020000"/>
|
||||
<peripheralInstance derived_from="SCT3" id="SCT3" location="0x1c024000"/>
|
||||
<peripheralInstance derived_from="ADC0" id="ADC0" location="0x40000000"/>
|
||||
<peripheralInstance derived_from="DAC" id="DAC" location="0x40004000"/>
|
||||
<peripheralInstance derived_from="ACMP" id="ACMP" location="0x40008000"/>
|
||||
<peripheralInstance derived_from="INMUX" id="INMUX" location="0x40014000"/>
|
||||
<peripheralInstance derived_from="RTC" id="RTC" location="0x40028000"/>
|
||||
<peripheralInstance derived_from="WWDT" id="WWDT" location="0x4002c000"/>
|
||||
<peripheralInstance derived_from="SWM" id="SWM" location="0x40038000"/>
|
||||
<peripheralInstance derived_from="PMU" id="PMU" location="0x4003c000"/>
|
||||
<peripheralInstance derived_from="USART0" id="USART0" location="0x40040000"/>
|
||||
<peripheralInstance derived_from="USART1" id="USART1" location="0x40044000"/>
|
||||
<peripheralInstance derived_from="SPI0" id="SPI0" location="0x40048000"/>
|
||||
<peripheralInstance derived_from="SPI1" id="SPI1" location="0x4004c000"/>
|
||||
<peripheralInstance derived_from="I2C0" id="I2C0" location="0x40050000"/>
|
||||
<peripheralInstance derived_from="QEI" id="QEI" location="0x40058000"/>
|
||||
<peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x40074000"/>
|
||||
<peripheralInstance derived_from="ADC1" id="ADC1" location="0x40080000"/>
|
||||
<peripheralInstance derived_from="MRT" id="MRT" location="0x400a0000"/>
|
||||
<peripheralInstance derived_from="PINT" id="PINT" location="0x400a4000"/>
|
||||
<peripheralInstance derived_from="GINT0" id="GINT0" location="0x400a8000"/>
|
||||
<peripheralInstance derived_from="GINT1" id="GINT1" location="0x400ac000"/>
|
||||
<peripheralInstance derived_from="RIT" id="RIT" location="0x400b4000"/>
|
||||
<peripheralInstance derived_from="SCTIPU" id="SCTIPU" location="0x400b8000"/>
|
||||
<peripheralInstance derived_from="FLASHCTRL" id="FLASHCTRL" location="0x400bc000"/>
|
||||
<peripheralInstance derived_from="USART2" id="USART2" location="0x400c0000"/>
|
||||
<peripheralInstance derived_from="C-CAN0" id="C-CAN0" location="0x400f0000"/>
|
||||
<peripheralInstance derived_from="IOCON" id="IOCON" location="0x400f8000"/>
|
||||
</chip>
|
||||
<processor><name gcc_name="cortex-m3">Cortex-M3</name>
|
||||
<family>Cortex-M</family>
|
||||
</processor>
|
||||
<link href="LPC15xx_peripheral.xme" show="embed" type="simple"/>
|
||||
</info>
|
||||
</infoList>
|
||||
</TargetConfig>{% endblock %}
|
||||
|
|
@ -0,0 +1,87 @@
|
|||
{% extends "mcuxpresso/.cproject.tmpl" %}
|
||||
|
||||
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
|
||||
<TargetConfig>
|
||||
<Properties property_0="None" property_2="LPC5411x_256K.cfx" property_3="NXP" property_4="LPC54114J256" property_count="5" version="70200"/>
|
||||
<infoList vendor="NXP"><info chip="LPC54114J256" flash_driver="LPC5411x_256K.cfx" match_id="0x0" name="LPC54114J256" stub="crt_emu_cm3_gen"><chip><name>LPC54114J256</name>
|
||||
<family>LPC5411x</family>
|
||||
<vendor>NXP (formerly Philips)</vendor>
|
||||
<reset board="None" core="Real" sys="Real"/>
|
||||
<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
|
||||
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
|
||||
<memory id="RAM" type="RAM"/>
|
||||
<memory id="Periph" is_volatile="true" type="Peripheral"/>
|
||||
<memoryInstance derived_from="Flash" id="MFlash256" location="0x0" size="0x40000"/>
|
||||
<memoryInstance derived_from="RAM" id="Ram0_64" location="0x20000000" size="0x10000"/>
|
||||
<memoryInstance derived_from="RAM" id="Ram1_64" location="0x20010000" size="0x10000"/>
|
||||
<memoryInstance derived_from="RAM" id="Ram2_32" location="0x20020000" size="0x8000"/>
|
||||
<memoryInstance derived_from="RAM" id="RamX_32" location="0x4000000" size="0x8000"/>
|
||||
<peripheralInstance derived_from="V7M_MPU" id="MPU" location="0xe000ed90"/>
|
||||
<peripheralInstance derived_from="V7M_NVIC" id="NVIC" location="0xe000e000"/>
|
||||
<peripheralInstance derived_from="V7M_DCR" id="DCR" location="0xe000edf0"/>
|
||||
<peripheralInstance derived_from="V7M_ITM" id="ITM" location="0xe0000000"/>
|
||||
<peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x40000000"/>
|
||||
<peripheralInstance derived_from="IOCON" id="IOCON" location="0x40001000"/>
|
||||
<peripheralInstance derived_from="GINT0" id="GINT0" location="0x40002000"/>
|
||||
<peripheralInstance derived_from="GINT1" id="GINT1" location="0x40003000"/>
|
||||
<peripheralInstance derived_from="PINT" id="PINT" location="0x40004000"/>
|
||||
<peripheralInstance derived_from="INPUT-MUX" id="INPUT-MUX" location="0x40005000"/>
|
||||
<peripheralInstance derived_from="CT32B0" id="CT32B0" location="0x40008000"/>
|
||||
<peripheralInstance derived_from="CT32B1" id="CT32B1" location="0x40009000"/>
|
||||
<peripheralInstance derived_from="WWDT" id="WWDT" location="0x4000c000"/>
|
||||
<peripheralInstance derived_from="MRT" id="MRT" location="0x4000d000"/>
|
||||
<peripheralInstance derived_from="UTICK" id="UTICK" location="0x4000e000"/>
|
||||
<peripheralInstance derived_from="CT32B2" id="CT32B2" location="0x40028000"/>
|
||||
<peripheralInstance derived_from="RTC" id="RTC" location="0x4002c000"/>
|
||||
<peripheralInstance derived_from="CT32B3" id="CT32B3" location="0x40048000"/>
|
||||
<peripheralInstance derived_from="CT32B4" id="CT32B4" location="0x40049000"/>
|
||||
<peripheralInstance derived_from="DMA" id="DMA" location="0x40082000"/>
|
||||
<peripheralInstance derived_from="USB" id="USB" location="0x40084000"/>
|
||||
<peripheralInstance derived_from="SCT" id="SCT" location="0x40085000"/>
|
||||
<peripheralInstance derived_from="FLEXCOMM0" id="FLEXCOMM0" location="0x40086000"/>
|
||||
<peripheralInstance derived_from="SPI0" id="SPI0" location="0x40086000"/>
|
||||
<peripheralInstance derived_from="I2C0" id="I2C0" location="0x40086000"/>
|
||||
<peripheralInstance derived_from="USART0" id="USART0" location="0x40086000"/>
|
||||
<peripheralInstance derived_from="I2C1" id="I2C1" location="0x40087000"/>
|
||||
<peripheralInstance derived_from="FLEXCOMM1" id="FLEXCOMM1" location="0x40087000"/>
|
||||
<peripheralInstance derived_from="SPI1" id="SPI1" location="0x40087000"/>
|
||||
<peripheralInstance derived_from="USART1" id="USART1" location="0x40087000"/>
|
||||
<peripheralInstance derived_from="SPI2" id="SPI2" location="0x40088000"/>
|
||||
<peripheralInstance derived_from="FLEXCOMM2" id="FLEXCOMM2" location="0x40088000"/>
|
||||
<peripheralInstance derived_from="USART2" id="USART2" location="0x40088000"/>
|
||||
<peripheralInstance derived_from="I2C2" id="I2C2" location="0x40088000"/>
|
||||
<peripheralInstance derived_from="FLEXCOMM3" id="FLEXCOMM3" location="0x40089000"/>
|
||||
<peripheralInstance derived_from="I2C3" id="I2C3" location="0x40089000"/>
|
||||
<peripheralInstance derived_from="USART3" id="USART3" location="0x40089000"/>
|
||||
<peripheralInstance derived_from="SPI3" id="SPI3" location="0x40089000"/>
|
||||
<peripheralInstance derived_from="FLEXCOMM4" id="FLEXCOMM4" location="0x4008a000"/>
|
||||
<peripheralInstance derived_from="SPI4" id="SPI4" location="0x4008a000"/>
|
||||
<peripheralInstance derived_from="USART4" id="USART4" location="0x4008a000"/>
|
||||
<peripheralInstance derived_from="I2C4" id="I2C4" location="0x4008a000"/>
|
||||
<peripheralInstance derived_from="MAILBOX" id="MAILBOX" location="0x4008b000"/>
|
||||
<peripheralInstance derived_from="GPIO" id="GPIO" location="0x4008c000"/>
|
||||
<peripheralInstance derived_from="DMIC" id="DMIC" location="0x40090000"/>
|
||||
<peripheralInstance derived_from="CRC-ENGINE" id="CRC-ENGINE" location="0x40095000"/>
|
||||
<peripheralInstance derived_from="I2C6" id="I2C6" location="0x40096000"/>
|
||||
<peripheralInstance derived_from="USART7" id="USART7" location="0x40096000"/>
|
||||
<peripheralInstance derived_from="SPI6" id="SPI6" location="0x40096000"/>
|
||||
<peripheralInstance derived_from="I2C5" id="I2C5" location="0x40096000"/>
|
||||
<peripheralInstance derived_from="SPI5" id="SPI5" location="0x40096000"/>
|
||||
<peripheralInstance derived_from="SPI7" id="SPI7" location="0x40096000"/>
|
||||
<peripheralInstance derived_from="FLEXCOMM5" id="FLEXCOMM5" location="0x40096000"/>
|
||||
<peripheralInstance derived_from="USART6" id="USART6" location="0x40096000"/>
|
||||
<peripheralInstance derived_from="USART5" id="USART5" location="0x40096000"/>
|
||||
<peripheralInstance derived_from="I2C7" id="I2C7" location="0x40096000"/>
|
||||
<peripheralInstance derived_from="FLEXCOMM6" id="FLEXCOMM6" location="0x40097000"/>
|
||||
<peripheralInstance derived_from="I2S0" id="I2S0" location="0x40097000"/>
|
||||
<peripheralInstance derived_from="I2S1" id="I2S1" location="0x40098000"/>
|
||||
<peripheralInstance derived_from="FLEXCOMM7" id="FLEXCOMM7" location="0x40098000"/>
|
||||
<peripheralInstance derived_from="ADC" id="ADC" location="0x400a0000"/>
|
||||
</chip>
|
||||
<processor><name gcc_name="cortex-m4">Cortex-M4</name>
|
||||
<family>Cortex-M</family>
|
||||
</processor>
|
||||
<link href="LPC5411x_peripheral.xme" show="embed" type="simple"/>
|
||||
</info>
|
||||
</infoList>
|
||||
</TargetConfig>{% endblock %}
|
||||
|
|
@ -0,0 +1,106 @@
|
|||
{% extends "mcuxpresso/.cproject.tmpl" %}
|
||||
|
||||
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
|
||||
<TargetConfig>
|
||||
<Properties property_3="NXP" property_4="LPC54608J512" property_count="5" version="70200"/>
|
||||
<infoList vendor="NXP"><info chip="LPC54608J512" name="LPC54608J512"><chip><name>LPC54608J512</name>
|
||||
<family>LPC546xx</family>
|
||||
<vendor>NXP</vendor>
|
||||
<memory can_program="true" id="Flash" is_ro="true" size="512" type="Flash"/>
|
||||
<memory id="RAM" size="200" type="RAM"/>
|
||||
<memoryInstance derived_from="Flash" driver="LPC5460x_512K.cfx" id="PROGRAM_FLASH" location="0x0" size="0x80000"/>
|
||||
<memoryInstance derived_from="RAM" id="SRAM_0_1_2_3" location="0x20000000" size="0x28000"/>
|
||||
<memoryInstance derived_from="RAM" id="SRAMX" location="0x4000000" size="0x8000"/>
|
||||
<memoryInstance derived_from="RAM" id="USB_RAM" location="0x40100000" size="0x2000"/>
|
||||
<peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x40000000"/>
|
||||
<peripheralInstance derived_from="IOCON" id="IOCON" location="0x40001000"/>
|
||||
<peripheralInstance derived_from="GINT0" id="GINT0" location="0x40002000"/>
|
||||
<peripheralInstance derived_from="GINT1" id="GINT1" location="0x40003000"/>
|
||||
<peripheralInstance derived_from="PINT" id="PINT" location="0x40004000"/>
|
||||
<peripheralInstance derived_from="INPUTMUX" id="INPUTMUX" location="0x40005000"/>
|
||||
<peripheralInstance derived_from="CTIMER0" id="CTIMER0" location="0x40008000"/>
|
||||
<peripheralInstance derived_from="CTIMER1" id="CTIMER1" location="0x40009000"/>
|
||||
<peripheralInstance derived_from="CTIMER2" id="CTIMER2" location="0x40028000"/>
|
||||
<peripheralInstance derived_from="CTIMER3" id="CTIMER3" location="0x40048000"/>
|
||||
<peripheralInstance derived_from="CTIMER4" id="CTIMER4" location="0x40049000"/>
|
||||
<peripheralInstance derived_from="WWDT" id="WWDT" location="0x4000C000"/>
|
||||
<peripheralInstance derived_from="MRT0" id="MRT0" location="0x4000D000"/>
|
||||
<peripheralInstance derived_from="UTICK0" id="UTICK0" location="0x4000E000"/>
|
||||
<peripheralInstance derived_from="EEPROM" id="EEPROM" location="0x40014000"/>
|
||||
<peripheralInstance derived_from="OTPC" id="OTPC" location="0x40015000"/>
|
||||
<peripheralInstance derived_from="RTC" id="RTC" location="0x4002C000"/>
|
||||
<peripheralInstance derived_from="RIT" id="RIT" location="0x4002D000"/>
|
||||
<peripheralInstance derived_from="FMC" id="FMC" location="0x40034000"/>
|
||||
<peripheralInstance derived_from="SMARTCARD0" id="SMARTCARD0" location="0x40036000"/>
|
||||
<peripheralInstance derived_from="SMARTCARD1" id="SMARTCARD1" location="0x40037000"/>
|
||||
<peripheralInstance derived_from="ASYNC_SYSCON" id="ASYNC_SYSCON" location="0x40040000"/>
|
||||
<peripheralInstance derived_from="SPIFI0" id="SPIFI0" location="0x40080000"/>
|
||||
<peripheralInstance derived_from="EMC" id="EMC" location="0x40081000"/>
|
||||
<peripheralInstance derived_from="DMA0" id="DMA0" location="0x40082000"/>
|
||||
<peripheralInstance derived_from="LCD" id="LCD" location="0x40083000"/>
|
||||
<peripheralInstance derived_from="USB0" id="USB0" location="0x40084000"/>
|
||||
<peripheralInstance derived_from="SCT0" id="SCT0" location="0x40085000"/>
|
||||
<peripheralInstance derived_from="SPI0" id="SPI0" location="0x40086000"/>
|
||||
<peripheralInstance derived_from="SPI1" id="SPI1" location="0x40087000"/>
|
||||
<peripheralInstance derived_from="SPI2" id="SPI2" location="0x40088000"/>
|
||||
<peripheralInstance derived_from="SPI3" id="SPI3" location="0x40089000"/>
|
||||
<peripheralInstance derived_from="SPI4" id="SPI4" location="0x4008A000"/>
|
||||
<peripheralInstance derived_from="SPI5" id="SPI5" location="0x40096000"/>
|
||||
<peripheralInstance derived_from="SPI6" id="SPI6" location="0x40097000"/>
|
||||
<peripheralInstance derived_from="SPI7" id="SPI7" location="0x40098000"/>
|
||||
<peripheralInstance derived_from="SPI8" id="SPI8" location="0x40099000"/>
|
||||
<peripheralInstance derived_from="SPI9" id="SPI9" location="0x4009A000"/>
|
||||
<peripheralInstance derived_from="FLEXCOMM0" id="FLEXCOMM0" location="0x40086000"/>
|
||||
<peripheralInstance derived_from="FLEXCOMM1" id="FLEXCOMM1" location="0x40087000"/>
|
||||
<peripheralInstance derived_from="FLEXCOMM2" id="FLEXCOMM2" location="0x40088000"/>
|
||||
<peripheralInstance derived_from="FLEXCOMM3" id="FLEXCOMM3" location="0x40089000"/>
|
||||
<peripheralInstance derived_from="FLEXCOMM4" id="FLEXCOMM4" location="0x4008A000"/>
|
||||
<peripheralInstance derived_from="FLEXCOMM5" id="FLEXCOMM5" location="0x40096000"/>
|
||||
<peripheralInstance derived_from="FLEXCOMM6" id="FLEXCOMM6" location="0x40097000"/>
|
||||
<peripheralInstance derived_from="FLEXCOMM7" id="FLEXCOMM7" location="0x40098000"/>
|
||||
<peripheralInstance derived_from="FLEXCOMM8" id="FLEXCOMM8" location="0x40099000"/>
|
||||
<peripheralInstance derived_from="FLEXCOMM9" id="FLEXCOMM9" location="0x4009A000"/>
|
||||
<peripheralInstance derived_from="I2C0" id="I2C0" location="0x40086000"/>
|
||||
<peripheralInstance derived_from="I2C1" id="I2C1" location="0x40087000"/>
|
||||
<peripheralInstance derived_from="I2C2" id="I2C2" location="0x40088000"/>
|
||||
<peripheralInstance derived_from="I2C3" id="I2C3" location="0x40089000"/>
|
||||
<peripheralInstance derived_from="I2C4" id="I2C4" location="0x4008A000"/>
|
||||
<peripheralInstance derived_from="I2C5" id="I2C5" location="0x40096000"/>
|
||||
<peripheralInstance derived_from="I2C6" id="I2C6" location="0x40097000"/>
|
||||
<peripheralInstance derived_from="I2C7" id="I2C7" location="0x40098000"/>
|
||||
<peripheralInstance derived_from="I2C8" id="I2C8" location="0x40099000"/>
|
||||
<peripheralInstance derived_from="I2C9" id="I2C9" location="0x4009A000"/>
|
||||
<peripheralInstance derived_from="USART0" id="USART0" location="0x40086000"/>
|
||||
<peripheralInstance derived_from="USART1" id="USART1" location="0x40087000"/>
|
||||
<peripheralInstance derived_from="USART2" id="USART2" location="0x40088000"/>
|
||||
<peripheralInstance derived_from="USART3" id="USART3" location="0x40089000"/>
|
||||
<peripheralInstance derived_from="USART4" id="USART4" location="0x4008A000"/>
|
||||
<peripheralInstance derived_from="USART5" id="USART5" location="0x40096000"/>
|
||||
<peripheralInstance derived_from="USART6" id="USART6" location="0x40097000"/>
|
||||
<peripheralInstance derived_from="USART7" id="USART7" location="0x40098000"/>
|
||||
<peripheralInstance derived_from="USART8" id="USART8" location="0x40099000"/>
|
||||
<peripheralInstance derived_from="USART9" id="USART9" location="0x4009A000"/>
|
||||
<peripheralInstance derived_from="GPIO" id="GPIO" location="0x4008C000"/>
|
||||
<peripheralInstance derived_from="DMIC0" id="DMIC0" location="0x40090000"/>
|
||||
<peripheralInstance derived_from="ENET" id="ENET" location="0x40092000"/>
|
||||
<peripheralInstance derived_from="USBHSD" id="USBHSD" location="0x40094000"/>
|
||||
<peripheralInstance derived_from="CRC_ENGINE" id="CRC_ENGINE" location="0x40095000"/>
|
||||
<peripheralInstance derived_from="I2S0" id="I2S0" location="0x40097000"/>
|
||||
<peripheralInstance derived_from="I2S1" id="I2S1" location="0x40098000"/>
|
||||
<peripheralInstance derived_from="SDIF" id="SDIF" location="0x4009B000"/>
|
||||
<peripheralInstance derived_from="CAN0" id="CAN0" location="0x4009D000"/>
|
||||
<peripheralInstance derived_from="CAN1" id="CAN1" location="0x4009E000"/>
|
||||
<peripheralInstance derived_from="ADC0" id="ADC0" location="0x400A0000"/>
|
||||
<peripheralInstance derived_from="USBFSH" id="USBFSH" location="0x400A2000"/>
|
||||
<peripheralInstance derived_from="USBHSH" id="USBHSH" location="0x400A3000"/>
|
||||
</chip>
|
||||
<processor><name gcc_name="cortex-m4">Cortex-M4</name>
|
||||
<family>Cortex-M</family>
|
||||
</processor>
|
||||
<link href="LPC54608_internal_peripheral.xml" show="embed" type="simple"/>
|
||||
</info>
|
||||
</infoList>
|
||||
</TargetConfig>{% endblock %}
|
||||
|
||||
{% block sdk_name %}SDK_2.x_LPCXpresso54608{% endblock %}
|
||||
{% block sdk_version %}2.2.0{% endblock %}
|
||||
|
|
@ -0,0 +1,51 @@
|
|||
{% extends "mcuxpresso/.cproject.tmpl" %}
|
||||
|
||||
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
|
||||
<TargetConfig>
|
||||
<Properties property_2="LPC800_32.cfx" property_3="NXP" property_4="LPC824" property_count="5" version="70200"/>
|
||||
<infoList vendor="NXP"><info chip="LPC824" flash_driver="LPC800_32.cfx" match_id="0x0" name="LPC824" stub="crt_emu_cm3_gen"><chip><name>LPC824</name>
|
||||
<family>LPC82x</family>
|
||||
<vendor>NXP (formerly Philips)</vendor>
|
||||
<reset board="None" core="Real" sys="Real"/>
|
||||
<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
|
||||
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
|
||||
<memory id="RAM" type="RAM"/>
|
||||
<memory id="Periph" is_volatile="true" type="Peripheral"/>
|
||||
<memoryInstance derived_from="Flash" id="MFlash32" location="0x0" size="0x8000"/>
|
||||
<memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/>
|
||||
<peripheralInstance derived_from="V6M_NVIC" id="NVIC" location="0xe000e000"/>
|
||||
<peripheralInstance derived_from="V6M_DCR" id="DCR" location="0xe000edf0"/>
|
||||
<peripheralInstance derived_from="WWDT" id="WWDT" location="0x40000000"/>
|
||||
<peripheralInstance derived_from="MRT" id="MRT" location="0x40004000"/>
|
||||
<peripheralInstance derived_from="WKT" id="WKT" location="0x40008000"/>
|
||||
<peripheralInstance derived_from="SWM" id="SWM" location="0x4000c000"/>
|
||||
<peripheralInstance derived_from="ADC" id="ADC" location="0x4001c000"/>
|
||||
<peripheralInstance derived_from="PMU" id="PMU" location="0x40020000"/>
|
||||
<peripheralInstance derived_from="CMP" id="CMP" location="0x40024000"/>
|
||||
<peripheralInstance derived_from="DMATRIGMUX" id="DMATRIGMUX" location="0x40028000"/>
|
||||
<peripheralInstance derived_from="INPUTMUX" id="INPUTMUX" location="0x4002c000"/>
|
||||
<peripheralInstance derived_from="FLASHCTRL" id="FLASHCTRL" location="0x40040000"/>
|
||||
<peripheralInstance derived_from="IOCON" id="IOCON" location="0x40044000"/>
|
||||
<peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x40048000"/>
|
||||
<peripheralInstance derived_from="I2C0" id="I2C0" location="0x40050000"/>
|
||||
<peripheralInstance derived_from="I2C1" id="I2C1" location="0x40054000"/>
|
||||
<peripheralInstance derived_from="SPI0" id="SPI0" location="0x40058000"/>
|
||||
<peripheralInstance derived_from="SPI1" id="SPI1" location="0x4005c000"/>
|
||||
<peripheralInstance derived_from="USART0" id="USART0" location="0x40064000"/>
|
||||
<peripheralInstance derived_from="USART1" id="USART1" location="0x40068000"/>
|
||||
<peripheralInstance derived_from="USART2" id="USART2" location="0x4006c000"/>
|
||||
<peripheralInstance derived_from="I2C2" id="I2C2" location="0x40070000"/>
|
||||
<peripheralInstance derived_from="I2C3" id="I2C3" location="0x40074000"/>
|
||||
<peripheralInstance derived_from="CRC" id="CRC" location="0x50000000"/>
|
||||
<peripheralInstance derived_from="SCT" id="SCT" location="0x50004000"/>
|
||||
<peripheralInstance derived_from="DMA" id="DMA" location="0x50008000"/>
|
||||
<peripheralInstance derived_from="GPIO-PORT" id="GPIO-PORT" location="0xa0000000"/>
|
||||
<peripheralInstance derived_from="PIN-INT" id="PIN-INT" location="0xa0004000"/>
|
||||
</chip>
|
||||
<processor><name gcc_name="cortex-m0">Cortex-M0</name>
|
||||
<family>Cortex-M</family>
|
||||
</processor>
|
||||
<link href="LPC82x_peripheral.xme" show="embed" type="simple"/>
|
||||
</info>
|
||||
</infoList>
|
||||
</TargetConfig>{% endblock %}
|
||||
|
|
@ -0,0 +1,742 @@
|
|||
"""
|
||||
mbed SDK
|
||||
Copyright (c) 2011-2016 ARM Limited
|
||||
|
||||
Licensed under the Apache License, Version 2.0 (the "License");
|
||||
you may not use this file except in compliance with the License.
|
||||
You may obtain a copy of the License at
|
||||
|
||||
http://www.apache.org/licenses/LICENSE-2.0
|
||||
|
||||
Unless required by applicable law or agreed to in writing, software
|
||||
distributed under the License is distributed on an "AS IS" BASIS,
|
||||
WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
See the License for the specific language governing permissions and
|
||||
limitations under the License.
|
||||
|
||||
Title: MCUXpresso exporter.
|
||||
|
||||
Description: Creates a managed build project that can be imported by
|
||||
the MCUXpresso IDE from NXP
|
||||
|
||||
Based on GNU ARM Eclipse Exporter from Liviu Ionescu <ilg@livius.net>
|
||||
modified for MCUXpresso by Johannes Stratmann <jojos62@online.de>
|
||||
"""
|
||||
|
||||
import copy
|
||||
import tempfile
|
||||
import shutil
|
||||
|
||||
from subprocess import Popen, PIPE
|
||||
from os import getcwd, remove
|
||||
from os.path import splitext, basename, exists
|
||||
from random import randint
|
||||
|
||||
from tools.export.gnuarmeclipse import GNUARMEclipse, UID
|
||||
from tools.export.exporters import apply_supported_whitelist
|
||||
from tools.targets import TARGET_MAP
|
||||
from tools.utils import NotSupportedException
|
||||
from tools.build_api import prepare_toolchain
|
||||
|
||||
|
||||
# =============================================================================
|
||||
|
||||
|
||||
POST_BINARY_WHITELIST = set([
|
||||
"TEENSY3_1Code.binary_hook",
|
||||
"MCU_NRF51Code.binary_hook",
|
||||
"LPCTargetCode.lpc_patch",
|
||||
"LPC4088Code.binary_hook"
|
||||
])
|
||||
|
||||
class MCUXpresso(GNUARMEclipse):
|
||||
NAME = 'MCUXpresso'
|
||||
TOOLCHAIN = 'GCC_ARM'
|
||||
|
||||
MBED_CONFIG_HEADER_SUPPORTED = True
|
||||
|
||||
@classmethod
|
||||
def is_target_supported(cls, target_name):
|
||||
# targes suppoerted when .cproject templatefile exists
|
||||
if exists(cls.TEMPLATE_DIR + '/mcuxpresso/' + target_name + '_cproject.tmpl'):
|
||||
target = TARGET_MAP[target_name]
|
||||
return apply_supported_whitelist(
|
||||
cls.TOOLCHAIN, POST_BINARY_WHITELIST, target)
|
||||
else:
|
||||
return False
|
||||
|
||||
# override
|
||||
def generate(self):
|
||||
"""
|
||||
Generate the .project and .cproject files.
|
||||
"""
|
||||
if not self.resources.linker_script:
|
||||
raise NotSupportedException("No linker script found.")
|
||||
|
||||
print
|
||||
print 'Create a GNU ARM Eclipse C++ managed project'
|
||||
print 'Project name: {0}'.format(self.project_name)
|
||||
print 'Target: {0}'.format(self.toolchain.target.name)
|
||||
print 'Toolchain: {0}'.format(self.TOOLCHAIN)
|
||||
|
||||
self.resources.win_to_unix()
|
||||
|
||||
# TODO: use some logger to display additional info if verbose
|
||||
|
||||
self.libraries = []
|
||||
# print 'libraries'
|
||||
# print self.resources.libraries
|
||||
for lib in self.resources.libraries:
|
||||
l, _ = splitext(basename(lib))
|
||||
self.libraries.append(l[3:])
|
||||
|
||||
self.system_libraries = [
|
||||
'stdc++', 'supc++', 'm', 'c', 'gcc', 'nosys'
|
||||
]
|
||||
|
||||
# Read in all profiles, we'll extract compiler options.
|
||||
profiles = self.get_all_profiles()
|
||||
|
||||
profile_ids = [s.lower() for s in profiles]
|
||||
profile_ids.sort()
|
||||
|
||||
# TODO: get the list from existing .cproject
|
||||
build_folders = [s.capitalize() for s in profile_ids]
|
||||
build_folders.append('BUILD')
|
||||
# print build_folders
|
||||
|
||||
objects = [self.filter_dot(s) for s in self.resources.objects]
|
||||
for bf in build_folders:
|
||||
objects = [o for o in objects if not o.startswith(bf + '/')]
|
||||
# print 'objects'
|
||||
# print objects
|
||||
|
||||
self.compute_exclusions()
|
||||
|
||||
self.include_path = [
|
||||
self.filter_dot(s) for s in self.resources.inc_dirs]
|
||||
print 'Include folders: {0}'.format(len(self.include_path))
|
||||
|
||||
self.as_defines = self.toolchain.get_symbols(True)
|
||||
self.c_defines = self.toolchain.get_symbols()
|
||||
self.cpp_defines = self.c_defines
|
||||
print 'Symbols: {0}'.format(len(self.c_defines))
|
||||
|
||||
self.ld_script = self.filter_dot(
|
||||
self.resources.linker_script)
|
||||
print 'Linker script: {0}'.format(self.ld_script)
|
||||
|
||||
self.options = {}
|
||||
profile_ids.remove('develop')
|
||||
for id in profile_ids:
|
||||
|
||||
# There are 4 categories of options, a category common too
|
||||
# all tools and a specific category for each of the tools.
|
||||
opts = {}
|
||||
opts['common'] = {}
|
||||
opts['as'] = {}
|
||||
opts['c'] = {}
|
||||
opts['cpp'] = {}
|
||||
opts['ld'] = {}
|
||||
|
||||
opts['id'] = id
|
||||
opts['name'] = opts['id'].capitalize()
|
||||
|
||||
print
|
||||
print 'Build configuration: {0}'.format(opts['name'])
|
||||
|
||||
profile = profiles[id]
|
||||
|
||||
# A small hack, do not bother with src_path again,
|
||||
# pass an empty string to avoid crashing.
|
||||
src_paths = ['']
|
||||
target_name = self.toolchain.target.name
|
||||
toolchain = prepare_toolchain(
|
||||
src_paths, "", target_name, self.TOOLCHAIN, build_profile=[profile])
|
||||
|
||||
# Hack to fill in build_dir
|
||||
toolchain.build_dir = self.toolchain.build_dir
|
||||
|
||||
flags = self.toolchain_flags(toolchain)
|
||||
|
||||
print 'Common flags:', ' '.join(flags['common_flags'])
|
||||
print 'C++ flags:', ' '.join(flags['cxx_flags'])
|
||||
print 'C flags:', ' '.join(flags['c_flags'])
|
||||
print 'ASM flags:', ' '.join(flags['asm_flags'])
|
||||
print 'Linker flags:', ' '.join(flags['ld_flags'])
|
||||
|
||||
# Most GNU ARM Eclipse options have a parent,
|
||||
# either debug or release.
|
||||
if '-O0' in flags['common_flags'] or '-Og' in flags['common_flags']:
|
||||
opts['parent_id'] = 'debug'
|
||||
else:
|
||||
opts['parent_id'] = 'release'
|
||||
|
||||
self.process_options(opts, flags)
|
||||
|
||||
opts['as']['defines'] = self.as_defines
|
||||
opts['c']['defines'] = self.c_defines
|
||||
opts['cpp']['defines'] = self.cpp_defines
|
||||
|
||||
opts['common']['include_paths'] = self.include_path
|
||||
opts['common']['excluded_folders'] = '|'.join(
|
||||
self.excluded_folders)
|
||||
self.excluded_folders = [item.replace("\\", "/") for item in self.excluded_folders]
|
||||
|
||||
opts['ld']['library_paths'] = [
|
||||
self.filter_dot(s) for s in self.resources.lib_dirs]
|
||||
|
||||
opts['ld']['object_files'] = objects
|
||||
opts['ld']['user_libraries'] = self.libraries
|
||||
opts['ld']['system_libraries'] = self.system_libraries
|
||||
opts['ld']['script'] = "linker-script-%s.ld" % id
|
||||
opts['cpp_cmd'] = " ".join(toolchain.preproc)
|
||||
|
||||
# Unique IDs used in multiple places.
|
||||
# Those used only once are implemented with {{u.id}}.
|
||||
u = UID()
|
||||
uid = {}
|
||||
uid['config'] = u.id
|
||||
uid['tool_c_compiler'] = u.id
|
||||
uid['tool_c_compiler_input'] = u.id
|
||||
uid['tool_cpp_compiler'] = u.id
|
||||
uid['tool_cpp_compiler_input'] = u.id
|
||||
|
||||
opts['uid'] = uid
|
||||
|
||||
self.options[id] = opts
|
||||
|
||||
jinja_ctx = {
|
||||
'name': self.project_name,
|
||||
'ld_script': self.ld_script,
|
||||
|
||||
# Compiler & linker command line options
|
||||
'options': self.options,
|
||||
|
||||
# Must be an object with an `id` property, which
|
||||
# will be called repeatedly, to generate multiple UIDs.
|
||||
'u': u,
|
||||
}
|
||||
|
||||
self.gen_file('mcuxpresso/.project.tmpl', jinja_ctx,
|
||||
'.project', trim_blocks=True, lstrip_blocks=True)
|
||||
self.gen_file('mcuxpresso/{0}_cproject.tmpl'.format(target_name), jinja_ctx,
|
||||
'.cproject', trim_blocks=True, lstrip_blocks=True)
|
||||
self.gen_file('mcuxpresso/makefile.targets.tmpl', jinja_ctx,
|
||||
'makefile.targets', trim_blocks=True, lstrip_blocks=True)
|
||||
self.gen_file('mcuxpresso/mbedignore.tmpl', jinja_ctx, '.mbedignore')
|
||||
|
||||
print
|
||||
print 'Done. Import the \'{0}\' project in Eclipse.'.format(self.project_name)
|
||||
|
||||
# override
|
||||
@staticmethod
|
||||
def build(project_name, log_name="build_log.txt", cleanup=True):
|
||||
"""
|
||||
Headless build an Eclipse project.
|
||||
|
||||
The following steps are performed:
|
||||
- a temporary workspace is created,
|
||||
- the project is imported,
|
||||
- a clean build of all configurations is performed and
|
||||
- the temporary workspace is removed.
|
||||
|
||||
The build results are in the Debug & Release folders.
|
||||
|
||||
All executables (eclipse & toolchain) must be in the PATH.
|
||||
|
||||
The general method to start a headless Eclipse build is:
|
||||
|
||||
$ eclipse \
|
||||
--launcher.suppressErrors \
|
||||
-nosplash \
|
||||
-application org.eclipse.cdt.managedbuilder.core.headlessbuild \
|
||||
-data /path/to/workspace \
|
||||
-import /path/to/project \
|
||||
-cleanBuild "project[/configuration] | all"
|
||||
"""
|
||||
|
||||
# TODO: possibly use the log file.
|
||||
|
||||
# Create a temporary folder for the workspace.
|
||||
tmp_folder = tempfile.mkdtemp()
|
||||
|
||||
cmd = [
|
||||
'mcuxpressoide',
|
||||
'--launcher.suppressErrors',
|
||||
'-nosplash',
|
||||
'-application org.eclipse.cdt.managedbuilder.core.headlessbuild',
|
||||
'-data', tmp_folder,
|
||||
'-import', getcwd(),
|
||||
'-cleanBuild', project_name
|
||||
]
|
||||
|
||||
p = Popen(' '.join(cmd), shell=True, stdout=PIPE, stderr=PIPE)
|
||||
out, err = p.communicate()
|
||||
ret_code = p.returncode
|
||||
stdout_string = "=" * 10 + "STDOUT" + "=" * 10 + "\n"
|
||||
err_string = "=" * 10 + "STDERR" + "=" * 10 + "\n"
|
||||
err_string += err
|
||||
success = any(l.startswith("Finished building target:") for l in out.split("\n"))
|
||||
|
||||
if success:
|
||||
ret_string = "SUCCESS\n"
|
||||
else:
|
||||
ret_string = "FAILURE: build returned %s \n" % ret_code
|
||||
|
||||
print "%s\n%s\n%s\n%s" % (stdout_string, out, err_string, ret_string)
|
||||
|
||||
if log_name:
|
||||
# Write the output to the log file
|
||||
with open(log_name, 'w+') as f:
|
||||
f.write(stdout_string)
|
||||
f.write(out)
|
||||
f.write(err_string)
|
||||
f.write(ret_string)
|
||||
|
||||
# Cleanup the exported and built files
|
||||
if cleanup:
|
||||
if exists(log_name):
|
||||
remove(log_name)
|
||||
remove('.project')
|
||||
remove('.cproject')
|
||||
if exists('Debug'):
|
||||
shutil.rmtree('Debug')
|
||||
if exists('Release'):
|
||||
shutil.rmtree('Release')
|
||||
if exists('makefile.targets'):
|
||||
remove('makefile.targets')
|
||||
|
||||
# Always remove the temporary folder.
|
||||
if exists(tmp_folder):
|
||||
shutil.rmtree(tmp_folder)
|
||||
|
||||
return not(success)
|
||||
|
||||
|
||||
# -------------------------------------------------------------------------
|
||||
|
||||
def process_options(self, opts, flags_in):
|
||||
"""
|
||||
CDT managed projects store lots of build options in separate
|
||||
variables, with separate IDs in the .cproject file.
|
||||
When the CDT build is started, all these options are brought
|
||||
together to compose the compiler and linker command lines.
|
||||
|
||||
Here the process is reversed, from the compiler and linker
|
||||
command lines, the options are identified and various flags are
|
||||
set to control the template generation process.
|
||||
|
||||
Once identified, the options are removed from the command lines.
|
||||
|
||||
The options that were not identified are options that do not
|
||||
have CDT equivalents and will be passed in the 'Other options'
|
||||
categories.
|
||||
|
||||
Although this process does not have a very complicated logic,
|
||||
given the large number of explicit configuration options
|
||||
used by the GNU ARM Eclipse managed build plug-in, it is tedious...
|
||||
"""
|
||||
|
||||
# Make a copy of the flags, to be one by one removed after processing.
|
||||
flags = copy.deepcopy(flags_in)
|
||||
|
||||
if False:
|
||||
print
|
||||
print 'common_flags', flags['common_flags']
|
||||
print 'asm_flags', flags['asm_flags']
|
||||
print 'c_flags', flags['c_flags']
|
||||
print 'cxx_flags', flags['cxx_flags']
|
||||
print 'ld_flags', flags['ld_flags']
|
||||
|
||||
# Initialise the 'last resort' options where all unrecognised
|
||||
# options will be collected.
|
||||
opts['as']['other'] = ''
|
||||
opts['c']['other'] = ''
|
||||
opts['cpp']['other'] = ''
|
||||
opts['ld']['other'] = ''
|
||||
|
||||
MCPUS = {
|
||||
'Cortex-M0': {'mcpu': 'cortex-m0', 'fpu_unit': None},
|
||||
'Cortex-M0+': {'mcpu': 'cortex-m0plus', 'fpu_unit': None},
|
||||
'Cortex-M1': {'mcpu': 'cortex-m1', 'fpu_unit': None},
|
||||
'Cortex-M3': {'mcpu': 'cortex-m3', 'fpu_unit': None},
|
||||
'Cortex-M4': {'mcpu': 'cortex-m4', 'fpu_unit': None},
|
||||
'Cortex-M4F': {'mcpu': 'cortex-m4', 'fpu_unit': 'fpv4spd16'},
|
||||
'Cortex-M7': {'mcpu': 'cortex-m7', 'fpu_unit': None},
|
||||
'Cortex-M7F': {'mcpu': 'cortex-m7', 'fpu_unit': 'fpv4spd16'},
|
||||
'Cortex-M7FD': {'mcpu': 'cortex-m7', 'fpu_unit': 'fpv5d16'},
|
||||
'Cortex-A9': {'mcpu': 'cortex-a9', 'fpu_unit': 'vfpv3'}
|
||||
}
|
||||
|
||||
MCPU_NXP = {
|
||||
'cortex-m7' : 'cm7',
|
||||
'cortex-m4' : 'cm4',
|
||||
'cortex-m3' : 'cm3',
|
||||
'cortex-m1' : 'cm1',
|
||||
'cortex-m0' : 'cm0',
|
||||
'cortex-m0.small-multiply' : 'cm0.smallmul',
|
||||
'cortex-m0plus' : 'cm0plus',
|
||||
'cortex-m0plus.small-multiply' : 'cm0plus.smallmul'
|
||||
}
|
||||
|
||||
# Remove options that are supplied by CDT
|
||||
self.remove_option(flags['common_flags'], '-c')
|
||||
self.remove_option(flags['common_flags'], '-MMD')
|
||||
|
||||
# As 'plan B', get the CPU from the target definition.
|
||||
core = self.toolchain.target.core
|
||||
|
||||
opts['common']['arm.target.family'] = None
|
||||
|
||||
# cortex-m0, cortex-m0-small-multiply, cortex-m0plus,
|
||||
# cortex-m0plus-small-multiply, cortex-m1, cortex-m1-small-multiply,
|
||||
# cortex-m3, cortex-m4, cortex-m7.
|
||||
str = self.find_options(flags['common_flags'], '-mcpu=')
|
||||
if str != None:
|
||||
opts['common']['arm.target.family'] = str[len('-mcpu='):]
|
||||
opts['common']['arm.target.family_nxp'] = MCPU_NXP[str[len('-mcpu='):]]
|
||||
self.remove_option(flags['common_flags'], str)
|
||||
self.remove_option(flags['ld_flags'], str)
|
||||
else:
|
||||
if core not in MCPUS:
|
||||
raise NotSupportedException(
|
||||
'Target core {0} not supported.'.format(core))
|
||||
opts['common']['arm.target.family'] = MCPUS[core]['mcpu']
|
||||
|
||||
opts['common']['arm.target.arch'] = 'none'
|
||||
str = self.find_options(flags['common_flags'], '-march=')
|
||||
arch = str[len('-march='):]
|
||||
archs = {'armv6-m': 'armv6-m', 'armv7-m': 'armv7-m', 'armv7-a': 'armv7-a'}
|
||||
if arch in archs:
|
||||
opts['common']['arm.target.arch'] = archs[arch]
|
||||
self.remove_option(flags['common_flags'], str)
|
||||
|
||||
opts['common']['arm.target.instructionset'] = 'thumb'
|
||||
if '-mthumb' in flags['common_flags']:
|
||||
self.remove_option(flags['common_flags'], '-mthumb')
|
||||
self.remove_option(flags['ld_flags'], '-mthumb')
|
||||
elif '-marm' in flags['common_flags']:
|
||||
opts['common']['arm.target.instructionset'] = 'arm'
|
||||
self.remove_option(flags['common_flags'], '-marm')
|
||||
self.remove_option(flags['ld_flags'], '-marm')
|
||||
|
||||
opts['common']['arm.target.thumbinterwork'] = False
|
||||
if '-mthumb-interwork' in flags['common_flags']:
|
||||
opts['common']['arm.target.thumbinterwork'] = True
|
||||
self.remove_option(flags['common_flags'], '-mthumb-interwork')
|
||||
|
||||
opts['common']['arm.target.endianness'] = None
|
||||
if '-mlittle-endian' in flags['common_flags']:
|
||||
opts['common']['arm.target.endianness'] = 'little'
|
||||
self.remove_option(flags['common_flags'], '-mlittle-endian')
|
||||
elif '-mbig-endian' in flags['common_flags']:
|
||||
opts['common']['arm.target.endianness'] = 'big'
|
||||
self.remove_option(flags['common_flags'], '-mbig-endian')
|
||||
|
||||
opts['common']['arm.target.fpu.unit'] = None
|
||||
opts['common']['arm.target.fpu.unit_nxp'] = None
|
||||
# default, fpv4spd16, fpv5d16, fpv5spd16
|
||||
str = self.find_options(flags['common_flags'], '-mfpu=')
|
||||
if str != None:
|
||||
fpu = str[len('-mfpu='):]
|
||||
fpus = {
|
||||
'fpv4-sp-d16': 'fpv4spd16',
|
||||
'fpv5-d16': 'fpv5d16',
|
||||
'fpv5-sp-d16': 'fpv5spd16'
|
||||
}
|
||||
fpus_nxp = {
|
||||
'fpv4-sp-d16': 'fpv4',
|
||||
'fpv5-d16': 'fpv5dp',
|
||||
'fpv5-sp-d16': 'fpv5sp'
|
||||
}
|
||||
if fpu in fpus:
|
||||
opts['common']['arm.target.fpu.unit'] = fpus[fpu]
|
||||
opts['common']['arm.target.fpu.unit_nxp'] = fpus_nxp[fpu]
|
||||
|
||||
self.remove_option(flags['common_flags'], str)
|
||||
self.remove_option(flags['ld_flags'], str)
|
||||
if opts['common']['arm.target.fpu.unit'] == None:
|
||||
if core not in MCPUS:
|
||||
raise NotSupportedException(
|
||||
'Target core {0} not supported.'.format(core))
|
||||
if MCPUS[core]['fpu_unit']:
|
||||
opts['common'][
|
||||
'arm.target.fpu.unit'] = MCPUS[core]['fpu_unit']
|
||||
|
||||
# soft, softfp, hard.
|
||||
str = self.find_options(flags['common_flags'], '-mfloat-abi=')
|
||||
if str != None:
|
||||
opts['common']['arm.target.fpu.abi'] = str[
|
||||
len('-mfloat-abi='):]
|
||||
self.remove_option(flags['common_flags'], str)
|
||||
self.remove_option(flags['ld_flags'], str)
|
||||
if opts['common']['arm.target.fpu.abi'] == 'hard':
|
||||
opts['common']['arm.target.fpu.unit_nxp'] += '.hard'
|
||||
|
||||
# Default optimisation level for Release.
|
||||
opts['common']['optimization.level'] = '-Os'
|
||||
|
||||
# If the project defines an optimisation level, it is used
|
||||
# only for the Release configuration, the Debug one used '-Og'.
|
||||
str = self.find_options(flags['common_flags'], '-O')
|
||||
if str != None:
|
||||
levels = {
|
||||
'-O0': 'none', '-O1': 'optimize', '-O2': 'more',
|
||||
'-O3': 'most', '-Os': 'size', '-Og': 'debug'
|
||||
}
|
||||
if str in levels:
|
||||
opts['common']['optimization.level'] = levels[str]
|
||||
self.remove_option(flags['common_flags'], str)
|
||||
|
||||
include_files = []
|
||||
for all_flags in [flags['common_flags'], flags['c_flags'], flags['cxx_flags']]:
|
||||
while '-include' in all_flags:
|
||||
ix = all_flags.index('-include')
|
||||
str = all_flags[ix + 1]
|
||||
if str not in include_files:
|
||||
include_files.append(str)
|
||||
self.remove_option(all_flags, '-include')
|
||||
self.remove_option(all_flags, str)
|
||||
|
||||
opts['common']['include_files'] = include_files
|
||||
|
||||
if '-ansi' in flags['c_flags']:
|
||||
opts['c']['compiler.std'] = '-ansi'
|
||||
self.remove_option(flags['c_flags'], str)
|
||||
else:
|
||||
str = self.find_options(flags['c_flags'], '-std')
|
||||
std = str[len('-std='):]
|
||||
c_std = {
|
||||
'c90': 'c90', 'c89': 'c90', 'gnu90': 'gnu90', 'gnu89': 'gnu90',
|
||||
'c99': 'c99', 'c9x': 'c99', 'gnu99': 'gnu99', 'gnu9x': 'gnu98',
|
||||
'c11': 'c11', 'c1x': 'c11', 'gnu11': 'gnu11', 'gnu1x': 'gnu11'
|
||||
}
|
||||
if std in c_std:
|
||||
opts['c']['compiler.std'] = c_std[std]
|
||||
self.remove_option(flags['c_flags'], str)
|
||||
|
||||
if '-ansi' in flags['cxx_flags']:
|
||||
opts['cpp']['compiler.std'] = '-ansi'
|
||||
self.remove_option(flags['cxx_flags'], str)
|
||||
else:
|
||||
str = self.find_options(flags['cxx_flags'], '-std')
|
||||
std = str[len('-std='):]
|
||||
cpp_std = {
|
||||
'c++98': 'cpp98', 'c++03': 'cpp03',
|
||||
'gnu++98': 'gnupp98', 'gnu++03': 'gnupp03',
|
||||
'c++0x': 'cpp03', 'gnu++0x': 'gnupp03',
|
||||
'c++11': 'cpp11', 'gnu++11': 'gnupp11',
|
||||
'c++1y': 'cpp11', 'gnu++1y': 'gnupp11',
|
||||
'c++14': 'cpp14', 'gnu++14': 'gnupp14',
|
||||
'c++1z': 'cpp1z', 'gnu++1z': 'gnupp1z',
|
||||
}
|
||||
if std in cpp_std:
|
||||
opts['cpp']['compiler.std'] = cpp_std[std]
|
||||
self.remove_option(flags['cxx_flags'], str)
|
||||
|
||||
# Common optimisation options.
|
||||
optimization_options = {
|
||||
'-flto': 'optimization.lto',
|
||||
'--ffat-lto-objects': 'optimization.lto_objects'
|
||||
}
|
||||
for option in optimization_options:
|
||||
opts['common'][optimization_options[option]] = False
|
||||
if option in flags['common_flags']:
|
||||
opts['common'][optimization_options[option]] = True
|
||||
self.remove_option(flags['common_flags'], option)
|
||||
|
||||
# Common warning options.
|
||||
warning_options = {
|
||||
'-fsyntax-only': 'warnings.syntaxonly',
|
||||
'-pedantic': 'warnings.pedantic',
|
||||
'-pedantic-errors': 'warnings.pedanticerrors',
|
||||
'-w': 'warnings.nowarn',
|
||||
'-Wall': 'warnings.allwarn',
|
||||
'-Wextra': 'warnings.extrawarn',
|
||||
'-Wconversion': 'warnings.conversion',
|
||||
'-Werror': 'warnings.toerrors',
|
||||
}
|
||||
|
||||
for option in warning_options:
|
||||
opts['common'][warning_options[option]] = False
|
||||
if option in flags['common_flags']:
|
||||
opts['common'][warning_options[option]] = True
|
||||
self.remove_option(flags['common_flags'], option)
|
||||
|
||||
# Common debug options.
|
||||
debug_levels = {
|
||||
'-g': 'default',
|
||||
'-g1': 'minimal',
|
||||
'-g3': 'max',
|
||||
}
|
||||
opts['common']['debugging.level'] = 'none'
|
||||
for option in debug_levels:
|
||||
if option in flags['common_flags']:
|
||||
opts['common'][
|
||||
'debugging.level'] = debug_levels[option]
|
||||
self.remove_option(flags['common_flags'], option)
|
||||
|
||||
|
||||
opts['common']['debugging.prof'] = False
|
||||
if '-p' in flags['common_flags']:
|
||||
opts['common']['debugging.prof'] = True
|
||||
self.remove_option(flags['common_flags'], '-p')
|
||||
|
||||
opts['common']['debugging.gprof'] = False
|
||||
if '-pg' in flags['common_flags']:
|
||||
opts['common']['debugging.gprof'] = True
|
||||
self.remove_option(flags['common_flags'], '-gp')
|
||||
|
||||
# Assembler options.
|
||||
opts['as']['usepreprocessor'] = False
|
||||
while '-x' in flags['asm_flags']:
|
||||
ix = flags['asm_flags'].index('-x')
|
||||
str = flags['asm_flags'][ix + 1]
|
||||
|
||||
if str == 'assembler-with-cpp':
|
||||
opts['as']['usepreprocessor'] = True
|
||||
else:
|
||||
# Collect all other assembler options.
|
||||
opts['as']['other'] += ' -x ' + str
|
||||
|
||||
self.remove_option(flags['asm_flags'], '-x')
|
||||
self.remove_option(flags['asm_flags'], 'assembler-with-cpp')
|
||||
|
||||
opts['as']['nostdinc'] = False
|
||||
if '-nostdinc' in flags['asm_flags']:
|
||||
opts['as']['nostdinc'] = True
|
||||
self.remove_option(flags['asm_flags'], '-nostdinc')
|
||||
|
||||
opts['as']['verbose'] = False
|
||||
if '-v' in flags['asm_flags']:
|
||||
opts['as']['verbose'] = True
|
||||
self.remove_option(flags['asm_flags'], '-v')
|
||||
|
||||
# C options.
|
||||
opts['c']['nostdinc'] = False
|
||||
if '-nostdinc' in flags['c_flags']:
|
||||
opts['c']['nostdinc'] = True
|
||||
self.remove_option(flags['c_flags'], '-nostdinc')
|
||||
|
||||
opts['c']['verbose'] = False
|
||||
if '-v' in flags['c_flags']:
|
||||
opts['c']['verbose'] = True
|
||||
self.remove_option(flags['c_flags'], '-v')
|
||||
|
||||
|
||||
# C++ options.
|
||||
opts['cpp']['nostdinc'] = False
|
||||
if '-nostdinc' in flags['cxx_flags']:
|
||||
opts['cpp']['nostdinc'] = True
|
||||
self.remove_option(flags['cxx_flags'], '-nostdinc')
|
||||
|
||||
opts['cpp']['nostdincpp'] = False
|
||||
if '-nostdinc++' in flags['cxx_flags']:
|
||||
opts['cpp']['nostdincpp'] = True
|
||||
self.remove_option(flags['cxx_flags'], '-nostdinc++')
|
||||
|
||||
optimization_options = {
|
||||
'-fno-exceptions': 'optimization.noexceptions',
|
||||
'-fno-rtti': 'optimization.nortti',
|
||||
'-fno-use-cxa-atexit': 'optimization.nousecxaatexit',
|
||||
'-fno-threadsafe-statics': 'optimization.nothreadsafestatics',
|
||||
}
|
||||
|
||||
for option in optimization_options:
|
||||
opts['cpp'][optimization_options[option]] = False
|
||||
if option in flags['cxx_flags']:
|
||||
opts['cpp'][optimization_options[option]] = True
|
||||
if option in flags['common_flags']:
|
||||
opts['cpp'][optimization_options[option]] = True
|
||||
|
||||
opts['cpp']['verbose'] = False
|
||||
if '-v' in flags['cxx_flags']:
|
||||
opts['cpp']['verbose'] = True
|
||||
self.remove_option(flags['cxx_flags'], '-v')
|
||||
|
||||
# Linker options.
|
||||
linker_options = {
|
||||
'-nostartfiles': 'nostart',
|
||||
'-nodefaultlibs': 'nodeflibs',
|
||||
'-nostdlib': 'nostdlibs',
|
||||
}
|
||||
|
||||
for option in linker_options:
|
||||
opts['ld'][linker_options[option]] = False
|
||||
if option in flags['ld_flags']:
|
||||
opts['ld'][linker_options[option]] = True
|
||||
self.remove_option(flags['ld_flags'], option)
|
||||
|
||||
opts['ld']['gcsections'] = False
|
||||
if '-Wl,--gc-sections' in flags['ld_flags']:
|
||||
opts['ld']['gcsections'] = True
|
||||
self.remove_option(flags['ld_flags'], '-Wl,--gc-sections')
|
||||
|
||||
opts['ld']['flags'] = []
|
||||
to_remove = []
|
||||
for opt in flags['ld_flags']:
|
||||
if opt.startswith('-Wl,--wrap,'):
|
||||
opts['ld']['flags'].append(
|
||||
'--wrap=' + opt[len('-Wl,--wrap,'):])
|
||||
to_remove.append(opt)
|
||||
for opt in to_remove:
|
||||
self.remove_option(flags['ld_flags'], opt)
|
||||
|
||||
# Other tool remaining options are separated by category.
|
||||
opts['as']['otherwarnings'] = self.find_options(
|
||||
flags['asm_flags'], '-W')
|
||||
|
||||
opts['c']['otherwarnings'] = self.find_options(
|
||||
flags['c_flags'], '-W')
|
||||
opts['c']['otheroptimizations'] = self.find_options(flags[
|
||||
'c_flags'], '-f')
|
||||
|
||||
opts['cpp']['otherwarnings'] = self.find_options(
|
||||
flags['cxx_flags'], '-W')
|
||||
opts['cpp']['otheroptimizations'] = self.find_options(
|
||||
flags['cxx_flags'], '-f')
|
||||
|
||||
# Other common remaining options are separated by category.
|
||||
opts['common']['optimization.other'] = self.find_options(
|
||||
flags['common_flags'], '-f')
|
||||
opts['common']['warnings.other'] = self.find_options(
|
||||
flags['common_flags'], '-W')
|
||||
|
||||
# Remaining common flags are added to each tool.
|
||||
opts['as']['other'] += ' ' + \
|
||||
' '.join(flags['common_flags']) + ' ' + \
|
||||
' '.join(flags['asm_flags'])
|
||||
opts['c']['other'] += ' ' + \
|
||||
' '.join(flags['common_flags']) + ' ' + ' '.join(flags['c_flags'])
|
||||
opts['cpp']['other'] += ' ' + \
|
||||
' '.join(flags['common_flags']) + ' ' + \
|
||||
' '.join(flags['cxx_flags'])
|
||||
opts['ld']['other'] += ' ' + \
|
||||
' '.join(flags['common_flags']) + ' ' + ' '.join(flags['ld_flags'])
|
||||
|
||||
if len(self.system_libraries) > 0:
|
||||
opts['ld']['other'] += ' -Wl,--start-group '
|
||||
opts['ld'][
|
||||
'other'] += ' '.join('-l' + s for s in self.system_libraries) + ' '
|
||||
opts['ld'][
|
||||
'other'] += ' '.join('-l' + s for s in self.libraries)
|
||||
opts['ld']['other'] += ' -Wl,--end-group '
|
||||
|
||||
# Strip all 'other' flags, since they might have leading spaces.
|
||||
opts['as']['other'] = opts['as']['other'].strip()
|
||||
opts['c']['other'] = opts['c']['other'].strip()
|
||||
opts['cpp']['other'] = opts['cpp']['other'].strip()
|
||||
opts['ld']['other'] = opts['ld']['other'].strip()
|
||||
|
||||
if False:
|
||||
print
|
||||
print opts
|
||||
|
||||
print
|
||||
print 'common_flags', flags['common_flags']
|
||||
print 'asm_flags', flags['asm_flags']
|
||||
print 'c_flags', flags['c_flags']
|
||||
print 'cxx_flags', flags['cxx_flags']
|
||||
print 'ld_flags', flags['ld_flags']
|
||||
|
||||
|
|
@ -0,0 +1,77 @@
|
|||
{% extends "mcuxpresso/.cproject.tmpl" %}
|
||||
|
||||
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
|
||||
<TargetConfig>
|
||||
<Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC1768" property_count="5" version="1"/>
|
||||
<infoList vendor="NXP">
|
||||
<info chip="LPC1768" match_id="0x00013f37,0x26013F37,0x26113F37" name="LPC1768" package="lpc17_lqfp100.xml">
|
||||
<chip>
|
||||
<name>LPC1768</name>
|
||||
<family>LPC17xx</family>
|
||||
<vendor>NXP (formerly Philips)</vendor>
|
||||
<reset board="None" core="Real" sys="Real"/>
|
||||
<clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/>
|
||||
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
|
||||
<memory id="RAM" type="RAM"/>
|
||||
<memory id="Periph" is_volatile="true" type="Peripheral"/>
|
||||
<memoryInstance derived_from="Flash" id="MFlash512" location="0x00000000" size="0x80000"/>
|
||||
<memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/>
|
||||
<memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/>
|
||||
<prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/>
|
||||
<prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/>
|
||||
<peripheralInstance derived_from="LPC17_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/>
|
||||
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM0&amp;0x1" id="TIMER0" location="0x40004000"/>
|
||||
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM1&amp;0x1" id="TIMER1" location="0x40008000"/>
|
||||
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM2&amp;0x1" id="TIMER2" location="0x40090000"/>
|
||||
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM3&amp;0x1" id="TIMER3" location="0x40094000"/>
|
||||
<peripheralInstance derived_from="LPC17_RIT" determined="infoFile" enable="SYSCTL.PCONP.PCRIT&amp;0x1" id="RIT" location="0x400B0000"/>
|
||||
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO0" location="0x2009C000"/>
|
||||
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO1" location="0x2009C020"/>
|
||||
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO2" location="0x2009C040"/>
|
||||
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO3" location="0x2009C060"/>
|
||||
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO4" location="0x2009C080"/>
|
||||
<peripheralInstance derived_from="LPC17_I2S" determined="infoFile" enable="SYSCTL.PCONP&amp;0x08000000" id="I2S" location="0x400A8000"/>
|
||||
<peripheralInstance derived_from="LPC17_SYSCTL" determined="infoFile" id="SYSCTL" location="0x400FC000"/>
|
||||
<peripheralInstance derived_from="LPC17_DAC" determined="infoFile" enable="PCB.PINSEL1.P0_26&amp;0x2=2" id="DAC" location="0x4008C000"/>
|
||||
<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART0&amp;0x1" id="UART0" location="0x4000C000"/>
|
||||
<peripheralInstance derived_from="LPC17xx_UART_MODEM" determined="infoFile" enable="SYSCTL.PCONP.PCUART1&amp;0x1" id="UART1" location="0x40010000"/>
|
||||
<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART2&amp;0x1" id="UART2" location="0x40098000"/>
|
||||
<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART3&amp;0x1" id="UART3" location="0x4009C000"/>
|
||||
<peripheralInstance derived_from="SPI" determined="infoFile" enable="SYSCTL.PCONP.PCSPI&amp;0x1" id="SPI" location="0x40020000"/>
|
||||
<peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP0&amp;0x1" id="SSP0" location="0x40088000"/>
|
||||
<peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP1&amp;0x1" id="SSP1" location="0x40030000"/>
|
||||
<peripheralInstance derived_from="LPC17_ADC" determined="infoFile" enable="SYSCTL.PCONP.PCAD&amp;0x1" id="ADC" location="0x40034000"/>
|
||||
<peripheralInstance derived_from="LPC17_USBINTST" determined="infoFile" enable="USBCLKCTL.USBClkCtrl&amp;0x12" id="USBINTSTAT" location="0x400fc1c0"/>
|
||||
<peripheralInstance derived_from="LPC17_USB_CLK_CTL" determined="infoFile" id="USBCLKCTL" location="0x5000cff4"/>
|
||||
<peripheralInstance derived_from="LPC17_USBDEV" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;0x12=0x12" id="USBDEV" location="0x5000C200"/>
|
||||
<peripheralInstance derived_from="LPC17_PWM" determined="infoFile" enable="SYSCTL.PCONP.PWM1&amp;0x1" id="PWM" location="0x40018000"/>
|
||||
<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C0&amp;0x1" id="I2C0" location="0x4001C000"/>
|
||||
<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C1&amp;0x1" id="I2C1" location="0x4005C000"/>
|
||||
<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C2&amp;0x1" id="I2C2" location="0x400A0000"/>
|
||||
<peripheralInstance derived_from="LPC17_DMA" determined="infoFile" enable="SYSCTL.PCONP.PCGPDMA&amp;0x1" id="DMA" location="0x50004000"/>
|
||||
<peripheralInstance derived_from="LPC17_ENET" determined="infoFile" enable="SYSCTL.PCONP.PCENET&amp;0x1" id="ENET" location="0x50000000"/>
|
||||
<peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/>
|
||||
<peripheralInstance derived_from="LPC17_PCB" determined="infoFile" id="PCB" location="0x4002c000"/>
|
||||
<peripheralInstance derived_from="LPC17_QEI" determined="infoFile" enable="SYSCTL.PCONP.PCQEI&amp;0x1" id="QEI" location="0x400bc000"/>
|
||||
<peripheralInstance derived_from="LPC17_USBHOST" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;0x11=0x11" id="USBHOST" location="0x5000C000"/>
|
||||
<peripheralInstance derived_from="LPC17_USBOTG" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;0x1c=0x1c" id="USBOTG" location="0x5000C000"/>
|
||||
<peripheralInstance derived_from="LPC17_RTC" determined="infoFile" enable="SYSCTL.PCONP.PCRTC&amp;0x1" id="RTC" location="0x40024000"/>
|
||||
<peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/>
|
||||
<peripheralInstance derived_from="LPC1x_WDT" determined="infoFile" id="WDT" location="0x40000000"/>
|
||||
<peripheralInstance derived_from="LPC17_FLASHCFG" determined="infoFile" id="FLASHACCEL" location="0x400FC000"/>
|
||||
<peripheralInstance derived_from="GPIO_INT" determined="infoFile" id="GPIOINTMAP" location="0x40028080"/>
|
||||
<peripheralInstance derived_from="LPC17_CANAFR" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;0x1|SYSCTL.PCONP.PCCAN2&amp;0x1" id="CANAFR" location="0x4003C000"/>
|
||||
<peripheralInstance derived_from="LPC17_CANCEN" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;0x1|SYSCTL.PCONP.PCCAN2&amp;0x1" id="CANCEN" location="0x40040000"/>
|
||||
<peripheralInstance derived_from="LPC17_CANWAKESLEEP" determined="infoFile" id="CANWAKESLEEP" location="0x400FC110"/>
|
||||
<peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;0x1" id="CANCON1" location="0x40044000"/>
|
||||
<peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN2&amp;0x1" id="CANCON2" location="0x40048000"/>
|
||||
<peripheralInstance derived_from="LPC17_MCPWM" determined="infoFile" enable="SYSCTL.PCONP.PCMCPWM&amp;0x1" id="MCPWM" location="0x400B8000"/>
|
||||
</chip>
|
||||
<processor>
|
||||
<name gcc_name="cortex-m3">Cortex-M3</name>
|
||||
<family>Cortex-M</family>
|
||||
</processor>
|
||||
<link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/>
|
||||
</info>
|
||||
</infoList>
|
||||
</TargetConfig>{% endblock %}
|
||||
|
|
@ -0,0 +1,46 @@
|
|||
{% extends "mcuxpresso/.cproject.tmpl" %}
|
||||
|
||||
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
|
||||
<TargetConfig>
|
||||
<Properties property_0="" property_2="LPC11_12_13_32K_4K.cfx" property_3="NXP" property_4="LPC1114FN/102" property_count="5" version="60100"/>
|
||||
<infoList vendor="NXP">
|
||||
<info chip="LPC1114FN/102" flash_driver="LPC11_12_13_32K_4K.cfx" match_id="0x0A40902B,0x1A40902B" name="LPC1114FN/102" stub="crt_emu_lpc11_13_nxp">
|
||||
<chip>
|
||||
<name>LPC1114FN/102</name>
|
||||
<family>LPC11xx</family>
|
||||
<vendor>NXP (formerly Philips)</vendor>
|
||||
<reset board="None" core="Real" sys="Real"/>
|
||||
<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
|
||||
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
|
||||
<memory id="RAM" type="RAM"/>
|
||||
<memory id="Periph" is_volatile="true" type="Peripheral"/>
|
||||
<memoryInstance derived_from="Flash" id="MFlash32" location="0x0" size="0x8000"/>
|
||||
<memoryInstance derived_from="RAM" id="RamLoc4" location="0x10000000" size="0x1000"/>
|
||||
<peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/>
|
||||
<peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/>
|
||||
<peripheralInstance derived_from="I2C" determined="infoFile" id="I2C" location="0x40000000"/>
|
||||
<peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/>
|
||||
<peripheralInstance derived_from="UART" determined="infoFile" id="UART" location="0x40008000"/>
|
||||
<peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/>
|
||||
<peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/>
|
||||
<peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/>
|
||||
<peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/>
|
||||
<peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/>
|
||||
<peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/>
|
||||
<peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/>
|
||||
<peripheralInstance derived_from="SPI0" determined="infoFile" id="SPI0" location="0x40040000"/>
|
||||
<peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/>
|
||||
<peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/>
|
||||
<peripheralInstance derived_from="GPIO0" determined="infoFile" id="GPIO0" location="0x50000000"/>
|
||||
<peripheralInstance derived_from="GPIO1" determined="infoFile" id="GPIO1" location="0x50010000"/>
|
||||
<peripheralInstance derived_from="GPIO2" determined="infoFile" id="GPIO2" location="0x50020000"/>
|
||||
<peripheralInstance derived_from="GPIO3" determined="infoFile" id="GPIO3" location="0x50030000"/>
|
||||
</chip>
|
||||
<processor>
|
||||
<name gcc_name="cortex-m0">Cortex-M0</name>
|
||||
<family>Cortex-M</family>
|
||||
</processor>
|
||||
<link href="LPC11xx_peripheral.xme" show="embed" type="simple"/>
|
||||
</info>
|
||||
</infoList>
|
||||
</TargetConfig>{% endblock %}
|
||||
|
|
@ -0,0 +1,49 @@
|
|||
{% extends "mcuxpresso/.cproject.tmpl" %}
|
||||
|
||||
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
|
||||
<TargetConfig>
|
||||
<Properties property_0="" property_2="LPC11_12_13_64K_8K.cfx" property_3="NXP" property_4="LPC11U35/401" property_count="5" version="70002"/>
|
||||
<infoList vendor="NXP">
|
||||
<info chip="LPC11U35/401" flash_driver="LPC11_12_13_64K_8K.cfx" match_id="0x0001BC40" name="LPC11U35/401" stub="crt_emu_lpc11_13_nxp">
|
||||
<chip>
|
||||
<name>LPC11U35/401</name>
|
||||
<family>LPC11Uxx</family>
|
||||
<vendor>NXP (formerly Philips)</vendor>
|
||||
<reset board="None" core="Real" sys="Real"/>
|
||||
<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
|
||||
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
|
||||
<memory id="RAM" type="RAM"/>
|
||||
<memory id="Periph" is_volatile="true" type="Peripheral"/>
|
||||
<memoryInstance derived_from="Flash" id="MFlash64" location="0x0" size="0x10000"/>
|
||||
<memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/>
|
||||
<memoryInstance derived_from="RAM" id="RamUsb2" location="0x20004000" size="0x800"/>
|
||||
<peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/>
|
||||
<peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/>
|
||||
<peripheralInstance derived_from="I2C" determined="infoFile" id="I2C" location="0x40000000"/>
|
||||
<peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/>
|
||||
<peripheralInstance derived_from="USART" determined="infoFile" id="USART" location="0x40008000"/>
|
||||
<peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/>
|
||||
<peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/>
|
||||
<peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/>
|
||||
<peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/>
|
||||
<peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/>
|
||||
<peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/>
|
||||
<peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/>
|
||||
<peripheralInstance derived_from="SSP0" determined="infoFile" id="SSP0" location="0x40040000"/>
|
||||
<peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/>
|
||||
<peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/>
|
||||
<peripheralInstance derived_from="GPIO-PIN-INT" determined="infoFile" id="GPIO-PIN-INT" location="0x4004c000"/>
|
||||
<peripheralInstance derived_from="SSP1" determined="infoFile" id="SSP1" location="0x40058000"/>
|
||||
<peripheralInstance derived_from="GPIO-GROUP-INT0" determined="infoFile" id="GPIO-GROUP-INT0" location="0x4005c000"/>
|
||||
<peripheralInstance derived_from="GPIO-GROUP-INT1" determined="infoFile" id="GPIO-GROUP-INT1" location="0x40060000"/>
|
||||
<peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x40080000"/>
|
||||
<peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0x50000000"/>
|
||||
</chip>
|
||||
<processor>
|
||||
<name gcc_name="cortex-m0">Cortex-M0</name>
|
||||
<family>Cortex-M</family>
|
||||
</processor>
|
||||
<link href="LPC11Uxx_peripheral.xme" show="embed" type="simple"/>
|
||||
</info>
|
||||
</infoList>
|
||||
</TargetConfig>{% endblock %}
|
||||
|
|
@ -0,0 +1,49 @@
|
|||
{% extends "mcuxpresso/.cproject.tmpl" %}
|
||||
|
||||
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
|
||||
<TargetConfig>
|
||||
<Properties property_0="" property_2="LPC11_12_13_64K_8K.cfx" property_3="NXP" property_4="LPC11U35/501" property_count="5" version="70002"/>
|
||||
<infoList vendor="NXP">
|
||||
<info chip="LPC11U35/501" flash_driver="LPC11_12_13_64K_8K.cfx" match_id="0x0001BC40" name="LPC11U35/501" stub="crt_emu_lpc11_13_nxp">
|
||||
<chip>
|
||||
<name>LPC11U35/501</name>
|
||||
<family>LPC11Uxx</family>
|
||||
<vendor>NXP (formerly Philips)</vendor>
|
||||
<reset board="None" core="Real" sys="Real"/>
|
||||
<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
|
||||
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
|
||||
<memory id="RAM" type="RAM"/>
|
||||
<memory id="Periph" is_volatile="true" type="Peripheral"/>
|
||||
<memoryInstance derived_from="Flash" id="MFlash64" location="0x0" size="0x10000"/>
|
||||
<memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/>
|
||||
<memoryInstance derived_from="RAM" id="RamUsb2" location="0x20004000" size="0x800"/>
|
||||
<peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/>
|
||||
<peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/>
|
||||
<peripheralInstance derived_from="I2C" determined="infoFile" id="I2C" location="0x40000000"/>
|
||||
<peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/>
|
||||
<peripheralInstance derived_from="USART" determined="infoFile" id="USART" location="0x40008000"/>
|
||||
<peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/>
|
||||
<peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/>
|
||||
<peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/>
|
||||
<peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/>
|
||||
<peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/>
|
||||
<peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/>
|
||||
<peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/>
|
||||
<peripheralInstance derived_from="SSP0" determined="infoFile" id="SSP0" location="0x40040000"/>
|
||||
<peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/>
|
||||
<peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/>
|
||||
<peripheralInstance derived_from="GPIO-PIN-INT" determined="infoFile" id="GPIO-PIN-INT" location="0x4004c000"/>
|
||||
<peripheralInstance derived_from="SSP1" determined="infoFile" id="SSP1" location="0x40058000"/>
|
||||
<peripheralInstance derived_from="GPIO-GROUP-INT0" determined="infoFile" id="GPIO-GROUP-INT0" location="0x4005c000"/>
|
||||
<peripheralInstance derived_from="GPIO-GROUP-INT1" determined="infoFile" id="GPIO-GROUP-INT1" location="0x40060000"/>
|
||||
<peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x40080000"/>
|
||||
<peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0x50000000"/>
|
||||
</chip>
|
||||
<processor>
|
||||
<name gcc_name="cortex-m0">Cortex-M0</name>
|
||||
<family>Cortex-M</family>
|
||||
</processor>
|
||||
<link href="LPC11Uxx_peripheral.xme" show="embed" type="simple"/>
|
||||
</info>
|
||||
</infoList>
|
||||
</TargetConfig>{% endblock %}
|
||||
|
|
@ -0,0 +1,58 @@
|
|||
{% extends "mcuxpresso/.cproject.tmpl" %}
|
||||
|
||||
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
|
||||
<TargetConfig>
|
||||
<Properties property_0="" property_2="LPC11U6x_256K.cfx" property_3="NXP" property_4="LPC11U68" property_count="5" version="70200"/>
|
||||
<infoList vendor="NXP"> <info chip="LPC11U68" flash_driver="LPC11U6x_256K.cfx" match_id="0x0" name="LPC11U68" stub="crt_emu_cm3_gen"> <chip> <name> LPC11U68</name>
|
||||
<family> LPC11U6x</family>
|
||||
<vendor> NXP (formerly Philips)</vendor>
|
||||
<reset board="None" core="Real" sys="Real"/>
|
||||
<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
|
||||
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
|
||||
<memory id="RAM" type="RAM"/>
|
||||
<memory id="Periph" is_volatile="true" type="Peripheral"/>
|
||||
<memoryInstance derived_from="Flash" id="MFlash256" location="0x0" size="0x40000"/>
|
||||
<memoryInstance derived_from="RAM" id="Ram0_32" location="0x10000000" size="0x8000"/>
|
||||
<memoryInstance derived_from="RAM" id="Ram1_2" location="0x20000000" size="0x800"/>
|
||||
<memoryInstance derived_from="RAM" id="Ram2USB_2" location="0x20004000" size="0x800"/>
|
||||
<peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/>
|
||||
<peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/>
|
||||
<peripheralInstance derived_from="I2C0" determined="infoFile" id="I2C0" location="0x40000000"/>
|
||||
<peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/>
|
||||
<peripheralInstance derived_from="USART0" determined="infoFile" id="USART0" location="0x40008000"/>
|
||||
<peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/>
|
||||
<peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/>
|
||||
<peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/>
|
||||
<peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/>
|
||||
<peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/>
|
||||
<peripheralInstance derived_from="I2C1" determined="infoFile" id="I2C1" location="0x40020000"/>
|
||||
<peripheralInstance derived_from="RTC" determined="infoFile" id="RTC" location="0x40024000"/>
|
||||
<peripheralInstance derived_from="DMATRIGMUX" determined="infoFile" id="DMATRIGMUX" location="0x40028000"/>
|
||||
<peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/>
|
||||
<peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/>
|
||||
<peripheralInstance derived_from="SSP0" determined="infoFile" id="SSP0" location="0x40040000"/>
|
||||
<peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/>
|
||||
<peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/>
|
||||
<peripheralInstance derived_from="USART4" determined="infoFile" id="USART4" location="0x4004c000"/>
|
||||
<peripheralInstance derived_from="SSP1" determined="infoFile" id="SSP1" location="0x40058000"/>
|
||||
<peripheralInstance derived_from="GINT0" determined="infoFile" id="GINT0" location="0x4005c000"/>
|
||||
<peripheralInstance derived_from="GINT1" determined="infoFile" id="GINT1" location="0x40060000"/>
|
||||
<peripheralInstance derived_from="USART1" determined="infoFile" id="USART1" location="0x4006c000"/>
|
||||
<peripheralInstance derived_from="USART2" determined="infoFile" id="USART2" location="0x40070000"/>
|
||||
<peripheralInstance derived_from="USART3" determined="infoFile" id="USART3" location="0x40074000"/>
|
||||
<peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x40080000"/>
|
||||
<peripheralInstance derived_from="CRC" determined="infoFile" id="CRC" location="0x50000000"/>
|
||||
<peripheralInstance derived_from="DMA" determined="infoFile" id="DMA" location="0x50004000"/>
|
||||
<peripheralInstance derived_from="SCT0" determined="infoFile" id="SCT0" location="0x5000c000"/>
|
||||
<peripheralInstance derived_from="SCT1" determined="infoFile" id="SCT1" location="0x5000e000"/>
|
||||
<peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0xa0000000"/>
|
||||
<peripheralInstance derived_from="PINT" determined="infoFile" id="PINT" location="0xa0004000"/>
|
||||
</chip>
|
||||
<processor>
|
||||
<name gcc_name="cortex-m0">Cortex-M0</name>
|
||||
<family>Cortex-M</family>
|
||||
</processor>
|
||||
<link href="LPC11Uxx_peripheral.xme" show="embed" type="simple"/>
|
||||
</info>
|
||||
</infoList>
|
||||
</TargetConfig>{% endblock %}
|
||||
|
|
@ -0,0 +1,77 @@
|
|||
{% extends "mcuxpresso/.cproject.tmpl" %}
|
||||
|
||||
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
|
||||
<TargetConfig>
|
||||
<Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC1768" property_count="5" version="1"/>
|
||||
<infoList vendor="NXP">
|
||||
<info chip="LPC1768" match_id="0x00013f37,0x26013F37,0x26113F37" name="LPC1768" package="lpc17_lqfp100.xml">
|
||||
<chip>
|
||||
<name>LPC1768</name>
|
||||
<family>LPC17xx</family>
|
||||
<vendor>NXP (formerly Philips)</vendor>
|
||||
<reset board="None" core="Real" sys="Real"/>
|
||||
<clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/>
|
||||
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
|
||||
<memory id="RAM" type="RAM"/>
|
||||
<memory id="Periph" is_volatile="true" type="Peripheral"/>
|
||||
<memoryInstance derived_from="Flash" id="MFlash512" location="0x00000000" size="0x80000"/>
|
||||
<memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/>
|
||||
<memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/>
|
||||
<prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/>
|
||||
<prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/>
|
||||
<peripheralInstance derived_from="LPC17_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/>
|
||||
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM0&amp;0x1" id="TIMER0" location="0x40004000"/>
|
||||
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM1&amp;0x1" id="TIMER1" location="0x40008000"/>
|
||||
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM2&amp;0x1" id="TIMER2" location="0x40090000"/>
|
||||
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM3&amp;0x1" id="TIMER3" location="0x40094000"/>
|
||||
<peripheralInstance derived_from="LPC17_RIT" determined="infoFile" enable="SYSCTL.PCONP.PCRIT&amp;0x1" id="RIT" location="0x400B0000"/>
|
||||
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO0" location="0x2009C000"/>
|
||||
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO1" location="0x2009C020"/>
|
||||
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO2" location="0x2009C040"/>
|
||||
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO3" location="0x2009C060"/>
|
||||
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO4" location="0x2009C080"/>
|
||||
<peripheralInstance derived_from="LPC17_I2S" determined="infoFile" enable="SYSCTL.PCONP&amp;0x08000000" id="I2S" location="0x400A8000"/>
|
||||
<peripheralInstance derived_from="LPC17_SYSCTL" determined="infoFile" id="SYSCTL" location="0x400FC000"/>
|
||||
<peripheralInstance derived_from="LPC17_DAC" determined="infoFile" enable="PCB.PINSEL1.P0_26&amp;0x2=2" id="DAC" location="0x4008C000"/>
|
||||
<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART0&amp;0x1" id="UART0" location="0x4000C000"/>
|
||||
<peripheralInstance derived_from="LPC17xx_UART_MODEM" determined="infoFile" enable="SYSCTL.PCONP.PCUART1&amp;0x1" id="UART1" location="0x40010000"/>
|
||||
<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART2&amp;0x1" id="UART2" location="0x40098000"/>
|
||||
<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART3&amp;0x1" id="UART3" location="0x4009C000"/>
|
||||
<peripheralInstance derived_from="SPI" determined="infoFile" enable="SYSCTL.PCONP.PCSPI&amp;0x1" id="SPI" location="0x40020000"/>
|
||||
<peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP0&amp;0x1" id="SSP0" location="0x40088000"/>
|
||||
<peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP1&amp;0x1" id="SSP1" location="0x40030000"/>
|
||||
<peripheralInstance derived_from="LPC17_ADC" determined="infoFile" enable="SYSCTL.PCONP.PCAD&amp;0x1" id="ADC" location="0x40034000"/>
|
||||
<peripheralInstance derived_from="LPC17_USBINTST" determined="infoFile" enable="USBCLKCTL.USBClkCtrl&amp;0x12" id="USBINTSTAT" location="0x400fc1c0"/>
|
||||
<peripheralInstance derived_from="LPC17_USB_CLK_CTL" determined="infoFile" id="USBCLKCTL" location="0x5000cff4"/>
|
||||
<peripheralInstance derived_from="LPC17_USBDEV" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;0x12=0x12" id="USBDEV" location="0x5000C200"/>
|
||||
<peripheralInstance derived_from="LPC17_PWM" determined="infoFile" enable="SYSCTL.PCONP.PWM1&amp;0x1" id="PWM" location="0x40018000"/>
|
||||
<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C0&amp;0x1" id="I2C0" location="0x4001C000"/>
|
||||
<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C1&amp;0x1" id="I2C1" location="0x4005C000"/>
|
||||
<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C2&amp;0x1" id="I2C2" location="0x400A0000"/>
|
||||
<peripheralInstance derived_from="LPC17_DMA" determined="infoFile" enable="SYSCTL.PCONP.PCGPDMA&amp;0x1" id="DMA" location="0x50004000"/>
|
||||
<peripheralInstance derived_from="LPC17_ENET" determined="infoFile" enable="SYSCTL.PCONP.PCENET&amp;0x1" id="ENET" location="0x50000000"/>
|
||||
<peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/>
|
||||
<peripheralInstance derived_from="LPC17_PCB" determined="infoFile" id="PCB" location="0x4002c000"/>
|
||||
<peripheralInstance derived_from="LPC17_QEI" determined="infoFile" enable="SYSCTL.PCONP.PCQEI&amp;0x1" id="QEI" location="0x400bc000"/>
|
||||
<peripheralInstance derived_from="LPC17_USBHOST" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;0x11=0x11" id="USBHOST" location="0x5000C000"/>
|
||||
<peripheralInstance derived_from="LPC17_USBOTG" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;0x1c=0x1c" id="USBOTG" location="0x5000C000"/>
|
||||
<peripheralInstance derived_from="LPC17_RTC" determined="infoFile" enable="SYSCTL.PCONP.PCRTC&amp;0x1" id="RTC" location="0x40024000"/>
|
||||
<peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/>
|
||||
<peripheralInstance derived_from="LPC1x_WDT" determined="infoFile" id="WDT" location="0x40000000"/>
|
||||
<peripheralInstance derived_from="LPC17_FLASHCFG" determined="infoFile" id="FLASHACCEL" location="0x400FC000"/>
|
||||
<peripheralInstance derived_from="GPIO_INT" determined="infoFile" id="GPIOINTMAP" location="0x40028080"/>
|
||||
<peripheralInstance derived_from="LPC17_CANAFR" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;0x1|SYSCTL.PCONP.PCCAN2&amp;0x1" id="CANAFR" location="0x4003C000"/>
|
||||
<peripheralInstance derived_from="LPC17_CANCEN" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;0x1|SYSCTL.PCONP.PCCAN2&amp;0x1" id="CANCEN" location="0x40040000"/>
|
||||
<peripheralInstance derived_from="LPC17_CANWAKESLEEP" determined="infoFile" id="CANWAKESLEEP" location="0x400FC110"/>
|
||||
<peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;0x1" id="CANCON1" location="0x40044000"/>
|
||||
<peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN2&amp;0x1" id="CANCON2" location="0x40048000"/>
|
||||
<peripheralInstance derived_from="LPC17_MCPWM" determined="infoFile" enable="SYSCTL.PCONP.PCMCPWM&amp;0x1" id="MCPWM" location="0x400B8000"/>
|
||||
</chip>
|
||||
<processor>
|
||||
<name gcc_name="cortex-m3">Cortex-M3</name>
|
||||
<family>Cortex-M</family>
|
||||
</processor>
|
||||
<link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/>
|
||||
</info>
|
||||
</infoList>
|
||||
</TargetConfig>{% endblock %}
|
||||
|
|
@ -0,0 +1,72 @@
|
|||
{% extends "mcuxpresso/.cproject.tmpl" %}
|
||||
|
||||
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
|
||||
<TargetConfig>
|
||||
<Properties property_0="" property_2="LPC177x_8x_407x_8x_512.cfx" property_3="NXP" property_4="LPC4088" property_count="5" version="1"/>
|
||||
<infoList vendor="NXP"><info chip="LPC4088" flash_driver="LPC177x_8x_407x_8x_512.cfx" match_id="0x481D3F47" name="LPC4088" stub="crt_emu_cm3_nxp"><chip><name>LPC4088</name>
|
||||
<family>LPC407x_8x</family>
|
||||
<vendor>NXP (formerly Philips)</vendor>
|
||||
<reset board="None" core="Real" sys="Real"/>
|
||||
<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
|
||||
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
|
||||
<memory id="RAM" type="RAM"/>
|
||||
<memory id="Periph" is_volatile="true" type="Peripheral"/>
|
||||
<memoryInstance derived_from="Flash" id="MFlash512" location="0x0" size="0x80000"/>
|
||||
<memoryInstance derived_from="RAM" id="RamLoc64" location="0x10000000" size="0x10000"/>
|
||||
<memoryInstance derived_from="RAM" id="RamPeriph32" location="0x20000000" size="0x8000"/>
|
||||
<prog_flash blocksz="0x1000" location="0x0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/>
|
||||
<prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/>
|
||||
<peripheralInstance derived_from="V7M_MPU" id="MPU" location="0xe000ed90"/>
|
||||
<peripheralInstance derived_from="V7M_NVIC" id="NVIC" location="0xe000e000"/>
|
||||
<peripheralInstance derived_from="V7M_DCR" id="DCR" location="0xe000edf0"/>
|
||||
<peripheralInstance derived_from="V7M_ITM" id="ITM" location="0xe0000000"/>
|
||||
<peripheralInstance derived_from="FLASHCTRL" id="FLASHCTRL" location="0x200000"/>
|
||||
<peripheralInstance derived_from="GPDMA" id="GPDMA" location="0x20080000"/>
|
||||
<peripheralInstance derived_from="ETHERNET" id="ETHERNET" location="0x20084000"/>
|
||||
<peripheralInstance derived_from="LCD" id="LCD" location="0x20088000"/>
|
||||
<peripheralInstance derived_from="USB" id="USB" location="0x2008c000"/>
|
||||
<peripheralInstance derived_from="CRC" id="CRC" location="0x20090000"/>
|
||||
<peripheralInstance derived_from="GPIO" id="GPIO" location="0x20098000"/>
|
||||
<peripheralInstance derived_from="EMC" id="EMC" location="0x2009c000"/>
|
||||
<peripheralInstance derived_from="WWDT" id="WWDT" location="0x40000000"/>
|
||||
<peripheralInstance derived_from="TIMER0" id="TIMER0" location="0x40004000"/>
|
||||
<peripheralInstance derived_from="TIMER1" id="TIMER1" location="0x40008000"/>
|
||||
<peripheralInstance derived_from="UART0" id="UART0" location="0x4000c000"/>
|
||||
<peripheralInstance derived_from="UART1" id="UART1" location="0x40010000"/>
|
||||
<peripheralInstance derived_from="PWM0" id="PWM0" location="0x40014000"/>
|
||||
<peripheralInstance derived_from="PWM1" id="PWM1" location="0x40018000"/>
|
||||
<peripheralInstance derived_from="I2C0" id="I2C0" location="0x4001c000"/>
|
||||
<peripheralInstance derived_from="COMPARATOR" id="COMPARATOR" location="0x40020000"/>
|
||||
<peripheralInstance derived_from="RTC" id="RTC" location="0x40024000"/>
|
||||
<peripheralInstance derived_from="GPIOINT" id="GPIOINT" location="0x40028080"/>
|
||||
<peripheralInstance derived_from="IOCON" id="IOCON" location="0x4002c000"/>
|
||||
<peripheralInstance derived_from="SSP1" id="SSP1" location="0x40030000"/>
|
||||
<peripheralInstance derived_from="ADC" id="ADC" location="0x40034000"/>
|
||||
<peripheralInstance derived_from="CANAFRAM" id="CANAFRAM" location="0x40038000"/>
|
||||
<peripheralInstance derived_from="CANAF" id="CANAF" location="0x4003c000"/>
|
||||
<peripheralInstance derived_from="CCAN" id="CCAN" location="0x40040000"/>
|
||||
<peripheralInstance derived_from="CAN1" id="CAN1" location="0x40044000"/>
|
||||
<peripheralInstance derived_from="CAN2" id="CAN2" location="0x40048000"/>
|
||||
<peripheralInstance derived_from="I2C1" id="I2C1" location="0x4005c000"/>
|
||||
<peripheralInstance derived_from="SSP0" id="SSP0" location="0x40088000"/>
|
||||
<peripheralInstance derived_from="DAC" id="DAC" location="0x4008c000"/>
|
||||
<peripheralInstance derived_from="TIMER2" id="TIMER2" location="0x40090000"/>
|
||||
<peripheralInstance derived_from="TIMER3" id="TIMER3" location="0x40094000"/>
|
||||
<peripheralInstance derived_from="UART2" id="UART2" location="0x40098000"/>
|
||||
<peripheralInstance derived_from="UART3" id="UART3" location="0x4009c000"/>
|
||||
<peripheralInstance derived_from="I2C2" id="I2C2" location="0x400a0000"/>
|
||||
<peripheralInstance derived_from="UART4" id="UART4" location="0x400a4000"/>
|
||||
<peripheralInstance derived_from="I2S" id="I2S" location="0x400a8000"/>
|
||||
<peripheralInstance derived_from="SSP2" id="SSP2" location="0x400ac000"/>
|
||||
<peripheralInstance derived_from="MCPWM" id="MCPWM" location="0x400b8000"/>
|
||||
<peripheralInstance derived_from="QEI" id="QEI" location="0x400bc000"/>
|
||||
<peripheralInstance derived_from="SDMMC" id="SDMMC" location="0x400c0000"/>
|
||||
<peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x400fc000"/>
|
||||
</chip>
|
||||
<processor><name gcc_name="cortex-m4">Cortex-M4</name>
|
||||
<family>Cortex-M</family>
|
||||
</processor>
|
||||
<link href="nxp_lpc407x_8x_peripheral.xme" show="embed" type="simple"/>
|
||||
</info>
|
||||
</infoList>
|
||||
</TargetConfig>{% endblock %}
|
||||
|
|
@ -0,0 +1,72 @@
|
|||
{% extends "mcuxpresso/.cproject.tmpl" %}
|
||||
|
||||
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
|
||||
<TargetConfig>
|
||||
<Properties property_0="" property_2="LPC177x_8x_407x_8x_512.cfx" property_3="NXP" property_4="LPC4088" property_count="5" version="1"/>
|
||||
<infoList vendor="NXP"><info chip="LPC4088" flash_driver="LPC177x_8x_407x_8x_512.cfx" match_id="0x481D3F47" name="LPC4088" stub="crt_emu_cm3_nxp"><chip><name>LPC4088</name>
|
||||
<family>LPC407x_8x</family>
|
||||
<vendor>NXP (formerly Philips)</vendor>
|
||||
<reset board="None" core="Real" sys="Real"/>
|
||||
<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
|
||||
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
|
||||
<memory id="RAM" type="RAM"/>
|
||||
<memory id="Periph" is_volatile="true" type="Peripheral"/>
|
||||
<memoryInstance derived_from="Flash" id="MFlash512" location="0x0" size="0x80000"/>
|
||||
<memoryInstance derived_from="RAM" id="RamLoc64" location="0x10000000" size="0x10000"/>
|
||||
<memoryInstance derived_from="RAM" id="RamPeriph32" location="0x20000000" size="0x8000"/>
|
||||
<prog_flash blocksz="0x1000" location="0x0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/>
|
||||
<prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/>
|
||||
<peripheralInstance derived_from="V7M_MPU" id="MPU" location="0xe000ed90"/>
|
||||
<peripheralInstance derived_from="V7M_NVIC" id="NVIC" location="0xe000e000"/>
|
||||
<peripheralInstance derived_from="V7M_DCR" id="DCR" location="0xe000edf0"/>
|
||||
<peripheralInstance derived_from="V7M_ITM" id="ITM" location="0xe0000000"/>
|
||||
<peripheralInstance derived_from="FLASHCTRL" id="FLASHCTRL" location="0x200000"/>
|
||||
<peripheralInstance derived_from="GPDMA" id="GPDMA" location="0x20080000"/>
|
||||
<peripheralInstance derived_from="ETHERNET" id="ETHERNET" location="0x20084000"/>
|
||||
<peripheralInstance derived_from="LCD" id="LCD" location="0x20088000"/>
|
||||
<peripheralInstance derived_from="USB" id="USB" location="0x2008c000"/>
|
||||
<peripheralInstance derived_from="CRC" id="CRC" location="0x20090000"/>
|
||||
<peripheralInstance derived_from="GPIO" id="GPIO" location="0x20098000"/>
|
||||
<peripheralInstance derived_from="EMC" id="EMC" location="0x2009c000"/>
|
||||
<peripheralInstance derived_from="WWDT" id="WWDT" location="0x40000000"/>
|
||||
<peripheralInstance derived_from="TIMER0" id="TIMER0" location="0x40004000"/>
|
||||
<peripheralInstance derived_from="TIMER1" id="TIMER1" location="0x40008000"/>
|
||||
<peripheralInstance derived_from="UART0" id="UART0" location="0x4000c000"/>
|
||||
<peripheralInstance derived_from="UART1" id="UART1" location="0x40010000"/>
|
||||
<peripheralInstance derived_from="PWM0" id="PWM0" location="0x40014000"/>
|
||||
<peripheralInstance derived_from="PWM1" id="PWM1" location="0x40018000"/>
|
||||
<peripheralInstance derived_from="I2C0" id="I2C0" location="0x4001c000"/>
|
||||
<peripheralInstance derived_from="COMPARATOR" id="COMPARATOR" location="0x40020000"/>
|
||||
<peripheralInstance derived_from="RTC" id="RTC" location="0x40024000"/>
|
||||
<peripheralInstance derived_from="GPIOINT" id="GPIOINT" location="0x40028080"/>
|
||||
<peripheralInstance derived_from="IOCON" id="IOCON" location="0x4002c000"/>
|
||||
<peripheralInstance derived_from="SSP1" id="SSP1" location="0x40030000"/>
|
||||
<peripheralInstance derived_from="ADC" id="ADC" location="0x40034000"/>
|
||||
<peripheralInstance derived_from="CANAFRAM" id="CANAFRAM" location="0x40038000"/>
|
||||
<peripheralInstance derived_from="CANAF" id="CANAF" location="0x4003c000"/>
|
||||
<peripheralInstance derived_from="CCAN" id="CCAN" location="0x40040000"/>
|
||||
<peripheralInstance derived_from="CAN1" id="CAN1" location="0x40044000"/>
|
||||
<peripheralInstance derived_from="CAN2" id="CAN2" location="0x40048000"/>
|
||||
<peripheralInstance derived_from="I2C1" id="I2C1" location="0x4005c000"/>
|
||||
<peripheralInstance derived_from="SSP0" id="SSP0" location="0x40088000"/>
|
||||
<peripheralInstance derived_from="DAC" id="DAC" location="0x4008c000"/>
|
||||
<peripheralInstance derived_from="TIMER2" id="TIMER2" location="0x40090000"/>
|
||||
<peripheralInstance derived_from="TIMER3" id="TIMER3" location="0x40094000"/>
|
||||
<peripheralInstance derived_from="UART2" id="UART2" location="0x40098000"/>
|
||||
<peripheralInstance derived_from="UART3" id="UART3" location="0x4009c000"/>
|
||||
<peripheralInstance derived_from="I2C2" id="I2C2" location="0x400a0000"/>
|
||||
<peripheralInstance derived_from="UART4" id="UART4" location="0x400a4000"/>
|
||||
<peripheralInstance derived_from="I2S" id="I2S" location="0x400a8000"/>
|
||||
<peripheralInstance derived_from="SSP2" id="SSP2" location="0x400ac000"/>
|
||||
<peripheralInstance derived_from="MCPWM" id="MCPWM" location="0x400b8000"/>
|
||||
<peripheralInstance derived_from="QEI" id="QEI" location="0x400bc000"/>
|
||||
<peripheralInstance derived_from="SDMMC" id="SDMMC" location="0x400c0000"/>
|
||||
<peripheralInstance derived_from="SYSCON" id="SYSCON" location="0x400fc000"/>
|
||||
</chip>
|
||||
<processor><name gcc_name="cortex-m4">Cortex-M4</name>
|
||||
<family>Cortex-M</family>
|
||||
</processor>
|
||||
<link href="nxp_lpc407x_8x_peripheral.xme" show="embed" type="simple"/>
|
||||
</info>
|
||||
</infoList>
|
||||
</TargetConfig>{% endblock %}
|
||||
|
|
@ -0,0 +1,77 @@
|
|||
{% extends "mcuxpresso/.cproject.tmpl" %}
|
||||
|
||||
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
|
||||
<TargetConfig>
|
||||
<Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC4330" property_count="5" version="1"/>
|
||||
<infoList vendor="NXP">
|
||||
<info chip="LPC4330" match_id="0x00013f37,0x26013F37,0x26113F37" name="LPC4330" package="LPC43_lqfp100.xml">
|
||||
<chip>
|
||||
<name>LPC4330</name>
|
||||
<family>LPC43xx</family>
|
||||
<vendor>NXP (formerly Philips)</vendor>
|
||||
<reset board="None" core="Real" sys="Real"/>
|
||||
<clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/>
|
||||
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
|
||||
<memory id="RAM" type="RAM"/>
|
||||
<memory id="Periph" is_volatile="true" type="Peripheral"/>
|
||||
<memoryInstance derived_from="Flash" id="MFlash512" location="0x00000000" size="0x80000"/>
|
||||
<memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/>
|
||||
<memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/>
|
||||
<prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/>
|
||||
<prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/>
|
||||
<peripheralInstance derived_from="LPC43_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/>
|
||||
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM0&amp;0x1" id="TIMER0" location="0x40004000"/>
|
||||
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM1&amp;0x1" id="TIMER1" location="0x40008000"/>
|
||||
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM2&amp;0x1" id="TIMER2" location="0x40090000"/>
|
||||
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM3&amp;0x1" id="TIMER3" location="0x40094000"/>
|
||||
<peripheralInstance derived_from="LPC43_RIT" determined="infoFile" enable="SYSCTL.PCONP.PCRIT&amp;0x1" id="RIT" location="0x400B0000"/>
|
||||
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO0" location="0x2009C000"/>
|
||||
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO1" location="0x2009C020"/>
|
||||
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO2" location="0x2009C040"/>
|
||||
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO3" location="0x2009C060"/>
|
||||
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO4" location="0x2009C080"/>
|
||||
<peripheralInstance derived_from="LPC43_I2S" determined="infoFile" enable="SYSCTL.PCONP&amp;0x08000000" id="I2S" location="0x400A8000"/>
|
||||
<peripheralInstance derived_from="LPC43_SYSCTL" determined="infoFile" id="SYSCTL" location="0x400FC000"/>
|
||||
<peripheralInstance derived_from="LPC43_DAC" determined="infoFile" enable="PCB.PINSEL1.P0_26&amp;0x2=2" id="DAC" location="0x4008C000"/>
|
||||
<peripheralInstance derived_from="LPC43xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART0&amp;0x1" id="UART0" location="0x4000C000"/>
|
||||
<peripheralInstance derived_from="LPC43xx_UART_MODEM" determined="infoFile" enable="SYSCTL.PCONP.PCUART1&amp;0x1" id="UART1" location="0x40010000"/>
|
||||
<peripheralInstance derived_from="LPC43xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART2&amp;0x1" id="UART2" location="0x40098000"/>
|
||||
<peripheralInstance derived_from="LPC43xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART3&amp;0x1" id="UART3" location="0x4009C000"/>
|
||||
<peripheralInstance derived_from="SPI" determined="infoFile" enable="SYSCTL.PCONP.PCSPI&amp;0x1" id="SPI" location="0x40020000"/>
|
||||
<peripheralInstance derived_from="LPC43_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP0&amp;0x1" id="SSP0" location="0x40088000"/>
|
||||
<peripheralInstance derived_from="LPC43_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP1&amp;0x1" id="SSP1" location="0x40030000"/>
|
||||
<peripheralInstance derived_from="LPC43_ADC" determined="infoFile" enable="SYSCTL.PCONP.PCAD&amp;0x1" id="ADC" location="0x40034000"/>
|
||||
<peripheralInstance derived_from="LPC43_USBINTST" determined="infoFile" enable="USBCLKCTL.USBClkCtrl&amp;0x12" id="USBINTSTAT" location="0x400fc1c0"/>
|
||||
<peripheralInstance derived_from="LPC43_USB_CLK_CTL" determined="infoFile" id="USBCLKCTL" location="0x5000cff4"/>
|
||||
<peripheralInstance derived_from="LPC43_USBDEV" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;0x12=0x12" id="USBDEV" location="0x5000C200"/>
|
||||
<peripheralInstance derived_from="LPC43_PWM" determined="infoFile" enable="SYSCTL.PCONP.PWM1&amp;0x1" id="PWM" location="0x40018000"/>
|
||||
<peripheralInstance derived_from="LPC43_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C0&amp;0x1" id="I2C0" location="0x4001C000"/>
|
||||
<peripheralInstance derived_from="LPC43_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C1&amp;0x1" id="I2C1" location="0x4005C000"/>
|
||||
<peripheralInstance derived_from="LPC43_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C2&amp;0x1" id="I2C2" location="0x400A0000"/>
|
||||
<peripheralInstance derived_from="LPC43_DMA" determined="infoFile" enable="SYSCTL.PCONP.PCGPDMA&amp;0x1" id="DMA" location="0x50004000"/>
|
||||
<peripheralInstance derived_from="LPC43_ENET" determined="infoFile" enable="SYSCTL.PCONP.PCENET&amp;0x1" id="ENET" location="0x50000000"/>
|
||||
<peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/>
|
||||
<peripheralInstance derived_from="LPC43_PCB" determined="infoFile" id="PCB" location="0x4002c000"/>
|
||||
<peripheralInstance derived_from="LPC43_QEI" determined="infoFile" enable="SYSCTL.PCONP.PCQEI&amp;0x1" id="QEI" location="0x400bc000"/>
|
||||
<peripheralInstance derived_from="LPC43_USBHOST" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;0x11=0x11" id="USBHOST" location="0x5000C000"/>
|
||||
<peripheralInstance derived_from="LPC43_USBOTG" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;0x1c=0x1c" id="USBOTG" location="0x5000C000"/>
|
||||
<peripheralInstance derived_from="LPC43_RTC" determined="infoFile" enable="SYSCTL.PCONP.PCRTC&amp;0x1" id="RTC" location="0x40024000"/>
|
||||
<peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/>
|
||||
<peripheralInstance derived_from="LPC4x_WDT" determined="infoFile" id="WDT" location="0x40000000"/>
|
||||
<peripheralInstance derived_from="LPC43_FLASHCFG" determined="infoFile" id="FLASHACCEL" location="0x400FC000"/>
|
||||
<peripheralInstance derived_from="GPIO_INT" determined="infoFile" id="GPIOINTMAP" location="0x40028080"/>
|
||||
<peripheralInstance derived_from="LPC43_CANAFR" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;0x1|SYSCTL.PCONP.PCCAN2&amp;0x1" id="CANAFR" location="0x4003C000"/>
|
||||
<peripheralInstance derived_from="LPC43_CANCEN" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;0x1|SYSCTL.PCONP.PCCAN2&amp;0x1" id="CANCEN" location="0x40040000"/>
|
||||
<peripheralInstance derived_from="LPC43_CANWAKESLEEP" determined="infoFile" id="CANWAKESLEEP" location="0x400FC110"/>
|
||||
<peripheralInstance derived_from="LPC43_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;0x1" id="CANCON1" location="0x40044000"/>
|
||||
<peripheralInstance derived_from="LPC43_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN2&amp;0x1" id="CANCON2" location="0x40048000"/>
|
||||
<peripheralInstance derived_from="LPC43_MCPWM" determined="infoFile" enable="SYSCTL.PCONP.PCMCPWM&amp;0x1" id="MCPWM" location="0x400B8000"/>
|
||||
</chip>
|
||||
<processor>
|
||||
<name gcc_name="cortex-m4">Cortex-M4</name>
|
||||
<family>Cortex-M</family>
|
||||
</processor>
|
||||
<link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/>
|
||||
</info>
|
||||
</infoList>
|
||||
</TargetConfig>{% endblock %}
|
||||
|
|
@ -0,0 +1,49 @@
|
|||
{% extends "mcuxpresso/.cproject.tmpl" %}
|
||||
|
||||
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
|
||||
<TargetConfig>
|
||||
<Properties property_0="" property_2="LPC11_12_13_64K_8K.cfx" property_3="NXP" property_4="LPC11U37/501" property_count="5" version="70002"/>
|
||||
<infoList vendor="NXP">
|
||||
<info chip="LPC11U37/501" flash_driver="LPC11_12_13_64K_8K.cfx" match_id="0x0001BC40" name="LPC11U37/501" stub="crt_emu_lpc11_13_nxp">
|
||||
<chip>
|
||||
<name>LPC11U37/501</name>
|
||||
<family>LPC11Uxx</family>
|
||||
<vendor>NXP (formerly Philips)</vendor>
|
||||
<reset board="None" core="Real" sys="Real"/>
|
||||
<clock changeable="TRUE" freq="12MHz" is_accurate="TRUE"/>
|
||||
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
|
||||
<memory id="RAM" type="RAM"/>
|
||||
<memory id="Periph" is_volatile="true" type="Peripheral"/>
|
||||
<memoryInstance derived_from="Flash" id="MFlash64" location="0x0" size="0x10000"/>
|
||||
<memoryInstance derived_from="RAM" id="RamLoc8" location="0x10000000" size="0x2000"/>
|
||||
<memoryInstance derived_from="RAM" id="RamUsb2" location="0x20004000" size="0x800"/>
|
||||
<peripheralInstance derived_from="V6M_NVIC" determined="infoFile" id="NVIC" location="0xe000e000"/>
|
||||
<peripheralInstance derived_from="V6M_DCR" determined="infoFile" id="DCR" location="0xe000edf0"/>
|
||||
<peripheralInstance derived_from="I2C" determined="infoFile" id="I2C" location="0x40000000"/>
|
||||
<peripheralInstance derived_from="WWDT" determined="infoFile" id="WWDT" location="0x40004000"/>
|
||||
<peripheralInstance derived_from="USART" determined="infoFile" id="USART" location="0x40008000"/>
|
||||
<peripheralInstance derived_from="CT16B0" determined="infoFile" id="CT16B0" location="0x4000c000"/>
|
||||
<peripheralInstance derived_from="CT16B1" determined="infoFile" id="CT16B1" location="0x40010000"/>
|
||||
<peripheralInstance derived_from="CT32B0" determined="infoFile" id="CT32B0" location="0x40014000"/>
|
||||
<peripheralInstance derived_from="CT32B1" determined="infoFile" id="CT32B1" location="0x40018000"/>
|
||||
<peripheralInstance derived_from="ADC" determined="infoFile" id="ADC" location="0x4001c000"/>
|
||||
<peripheralInstance derived_from="PMU" determined="infoFile" id="PMU" location="0x40038000"/>
|
||||
<peripheralInstance derived_from="FLASHCTRL" determined="infoFile" id="FLASHCTRL" location="0x4003c000"/>
|
||||
<peripheralInstance derived_from="SSP0" determined="infoFile" id="SSP0" location="0x40040000"/>
|
||||
<peripheralInstance derived_from="IOCON" determined="infoFile" id="IOCON" location="0x40044000"/>
|
||||
<peripheralInstance derived_from="SYSCON" determined="infoFile" id="SYSCON" location="0x40048000"/>
|
||||
<peripheralInstance derived_from="GPIO-PIN-INT" determined="infoFile" id="GPIO-PIN-INT" location="0x4004c000"/>
|
||||
<peripheralInstance derived_from="SSP1" determined="infoFile" id="SSP1" location="0x40058000"/>
|
||||
<peripheralInstance derived_from="GPIO-GROUP-INT0" determined="infoFile" id="GPIO-GROUP-INT0" location="0x4005c000"/>
|
||||
<peripheralInstance derived_from="GPIO-GROUP-INT1" determined="infoFile" id="GPIO-GROUP-INT1" location="0x40060000"/>
|
||||
<peripheralInstance derived_from="USB" determined="infoFile" id="USB" location="0x40080000"/>
|
||||
<peripheralInstance derived_from="GPIO-PORT" determined="infoFile" id="GPIO-PORT" location="0x50000000"/>
|
||||
</chip>
|
||||
<processor>
|
||||
<name gcc_name="cortex-m0">Cortex-M0</name>
|
||||
<family>Cortex-M</family>
|
||||
</processor>
|
||||
<link href="LPC11Uxx_peripheral.xme" show="embed" type="simple"/>
|
||||
</info>
|
||||
</infoList>
|
||||
</TargetConfig>{% endblock %}
|
||||
|
|
@ -0,0 +1,13 @@
|
|||
# DO NOT REMOVE! Generated by the MCUXpresso exporter from an mBed project.
|
||||
|
||||
mbedclean:
|
||||
$(RM) $(OBJS)
|
||||
$(RM) $(CC_DEPS)$(C++_DEPS)$(C_UPPER_DEPS)$(CXX_DEPS)$(C_DEPS)$(CPP_DEPS)
|
||||
$(RM) $(EXECUTABLES) {{name}}.* linker-script-*.ld
|
||||
-@echo ' '
|
||||
|
||||
{% for config, data in options.iteritems() %}
|
||||
linker-script-{{config}}.ld: ../{{ld_script}}
|
||||
{{data.cpp_cmd}} {{data.ld.other}} $< -o $@
|
||||
{{name}}.elf: linker-script-{{config}}.ld
|
||||
{% endfor %}
|
||||
|
|
@ -0,0 +1,3 @@
|
|||
{%- for config in options.values() -%}
|
||||
{{config.name}}/*
|
||||
{% endfor -%}
|
||||
|
|
@ -0,0 +1,77 @@
|
|||
{% extends "mcuxpresso/.cproject.tmpl" %}
|
||||
|
||||
{% block cpu_config %}<?xml version="1.0" encoding="UTF-8"?>
|
||||
<TargetConfig>
|
||||
<Properties property_0="" property_1="" property_2="" property_3="NXP" property_4="LPC1768" property_count="5" version="1"/>
|
||||
<infoList vendor="NXP">
|
||||
<info chip="LPC1768" match_id="0x00013f37,0x26013F37,0x26113F37" name="LPC1768" package="lpc17_lqfp100.xml">
|
||||
<chip>
|
||||
<name>LPC1768</name>
|
||||
<family>LPC17xx</family>
|
||||
<vendor>NXP (formerly Philips)</vendor>
|
||||
<reset board="None" core="Real" sys="Real"/>
|
||||
<clock changeable="TRUE" freq="20MHz" is_accurate="TRUE"/>
|
||||
<memory can_program="true" id="Flash" is_ro="true" type="Flash"/>
|
||||
<memory id="RAM" type="RAM"/>
|
||||
<memory id="Periph" is_volatile="true" type="Peripheral"/>
|
||||
<memoryInstance derived_from="Flash" id="MFlash512" location="0x00000000" size="0x80000"/>
|
||||
<memoryInstance derived_from="RAM" id="RamLoc32" location="0x10000000" size="0x8000"/>
|
||||
<memoryInstance derived_from="RAM" id="RamAHB32" location="0x2007c000" size="0x8000"/>
|
||||
<prog_flash blocksz="0x1000" location="0" maxprgbuff="0x1000" progwithcode="TRUE" size="0x10000"/>
|
||||
<prog_flash blocksz="0x8000" location="0x10000" maxprgbuff="0x1000" progwithcode="TRUE" size="0x70000"/>
|
||||
<peripheralInstance derived_from="LPC17_NVIC" determined="infoFile" id="NVIC" location="0xE000E000"/>
|
||||
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM0&amp;0x1" id="TIMER0" location="0x40004000"/>
|
||||
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM1&amp;0x1" id="TIMER1" location="0x40008000"/>
|
||||
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM2&amp;0x1" id="TIMER2" location="0x40090000"/>
|
||||
<peripheralInstance derived_from="TIMER" determined="infoFile" enable="SYSCTL.PCONP.PCTIM3&amp;0x1" id="TIMER3" location="0x40094000"/>
|
||||
<peripheralInstance derived_from="LPC17_RIT" determined="infoFile" enable="SYSCTL.PCONP.PCRIT&amp;0x1" id="RIT" location="0x400B0000"/>
|
||||
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO0" location="0x2009C000"/>
|
||||
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO1" location="0x2009C020"/>
|
||||
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO2" location="0x2009C040"/>
|
||||
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO3" location="0x2009C060"/>
|
||||
<peripheralInstance derived_from="FGPIO" determined="infoFile" enable="SYSCTL.PCONP.PCGPIO&amp;0x1" id="GPIO4" location="0x2009C080"/>
|
||||
<peripheralInstance derived_from="LPC17_I2S" determined="infoFile" enable="SYSCTL.PCONP&amp;0x08000000" id="I2S" location="0x400A8000"/>
|
||||
<peripheralInstance derived_from="LPC17_SYSCTL" determined="infoFile" id="SYSCTL" location="0x400FC000"/>
|
||||
<peripheralInstance derived_from="LPC17_DAC" determined="infoFile" enable="PCB.PINSEL1.P0_26&amp;0x2=2" id="DAC" location="0x4008C000"/>
|
||||
<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART0&amp;0x1" id="UART0" location="0x4000C000"/>
|
||||
<peripheralInstance derived_from="LPC17xx_UART_MODEM" determined="infoFile" enable="SYSCTL.PCONP.PCUART1&amp;0x1" id="UART1" location="0x40010000"/>
|
||||
<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART2&amp;0x1" id="UART2" location="0x40098000"/>
|
||||
<peripheralInstance derived_from="LPC17xx_UART" determined="infoFile" enable="SYSCTL.PCONP.PCUART3&amp;0x1" id="UART3" location="0x4009C000"/>
|
||||
<peripheralInstance derived_from="SPI" determined="infoFile" enable="SYSCTL.PCONP.PCSPI&amp;0x1" id="SPI" location="0x40020000"/>
|
||||
<peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP0&amp;0x1" id="SSP0" location="0x40088000"/>
|
||||
<peripheralInstance derived_from="LPC17_SSP" determined="infoFile" enable="SYSCTL.PCONP.PCSSP1&amp;0x1" id="SSP1" location="0x40030000"/>
|
||||
<peripheralInstance derived_from="LPC17_ADC" determined="infoFile" enable="SYSCTL.PCONP.PCAD&amp;0x1" id="ADC" location="0x40034000"/>
|
||||
<peripheralInstance derived_from="LPC17_USBINTST" determined="infoFile" enable="USBCLKCTL.USBClkCtrl&amp;0x12" id="USBINTSTAT" location="0x400fc1c0"/>
|
||||
<peripheralInstance derived_from="LPC17_USB_CLK_CTL" determined="infoFile" id="USBCLKCTL" location="0x5000cff4"/>
|
||||
<peripheralInstance derived_from="LPC17_USBDEV" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;0x12=0x12" id="USBDEV" location="0x5000C200"/>
|
||||
<peripheralInstance derived_from="LPC17_PWM" determined="infoFile" enable="SYSCTL.PCONP.PWM1&amp;0x1" id="PWM" location="0x40018000"/>
|
||||
<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C0&amp;0x1" id="I2C0" location="0x4001C000"/>
|
||||
<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C1&amp;0x1" id="I2C1" location="0x4005C000"/>
|
||||
<peripheralInstance derived_from="LPC17_I2C" determined="infoFile" enable="SYSCTL.PCONP.PCI2C2&amp;0x1" id="I2C2" location="0x400A0000"/>
|
||||
<peripheralInstance derived_from="LPC17_DMA" determined="infoFile" enable="SYSCTL.PCONP.PCGPDMA&amp;0x1" id="DMA" location="0x50004000"/>
|
||||
<peripheralInstance derived_from="LPC17_ENET" determined="infoFile" enable="SYSCTL.PCONP.PCENET&amp;0x1" id="ENET" location="0x50000000"/>
|
||||
<peripheralInstance derived_from="CM3_DCR" determined="infoFile" id="DCR" location="0xE000EDF0"/>
|
||||
<peripheralInstance derived_from="LPC17_PCB" determined="infoFile" id="PCB" location="0x4002c000"/>
|
||||
<peripheralInstance derived_from="LPC17_QEI" determined="infoFile" enable="SYSCTL.PCONP.PCQEI&amp;0x1" id="QEI" location="0x400bc000"/>
|
||||
<peripheralInstance derived_from="LPC17_USBHOST" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;0x11=0x11" id="USBHOST" location="0x5000C000"/>
|
||||
<peripheralInstance derived_from="LPC17_USBOTG" determined="infoFile" enable="USBCLKCTL.USBClkSt&amp;0x1c=0x1c" id="USBOTG" location="0x5000C000"/>
|
||||
<peripheralInstance derived_from="LPC17_RTC" determined="infoFile" enable="SYSCTL.PCONP.PCRTC&amp;0x1" id="RTC" location="0x40024000"/>
|
||||
<peripheralInstance derived_from="MPU" determined="infoFile" id="MPU" location="0xE000ED90"/>
|
||||
<peripheralInstance derived_from="LPC1x_WDT" determined="infoFile" id="WDT" location="0x40000000"/>
|
||||
<peripheralInstance derived_from="LPC17_FLASHCFG" determined="infoFile" id="FLASHACCEL" location="0x400FC000"/>
|
||||
<peripheralInstance derived_from="GPIO_INT" determined="infoFile" id="GPIOINTMAP" location="0x40028080"/>
|
||||
<peripheralInstance derived_from="LPC17_CANAFR" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;0x1|SYSCTL.PCONP.PCCAN2&amp;0x1" id="CANAFR" location="0x4003C000"/>
|
||||
<peripheralInstance derived_from="LPC17_CANCEN" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;0x1|SYSCTL.PCONP.PCCAN2&amp;0x1" id="CANCEN" location="0x40040000"/>
|
||||
<peripheralInstance derived_from="LPC17_CANWAKESLEEP" determined="infoFile" id="CANWAKESLEEP" location="0x400FC110"/>
|
||||
<peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN1&amp;0x1" id="CANCON1" location="0x40044000"/>
|
||||
<peripheralInstance derived_from="LPC17_CANCON" determined="infoFile" enable="SYSCTL.PCONP.PCCAN2&amp;0x1" id="CANCON2" location="0x40048000"/>
|
||||
<peripheralInstance derived_from="LPC17_MCPWM" determined="infoFile" enable="SYSCTL.PCONP.PCMCPWM&amp;0x1" id="MCPWM" location="0x400B8000"/>
|
||||
</chip>
|
||||
<processor>
|
||||
<name gcc_name="cortex-m3">Cortex-M3</name>
|
||||
<family>Cortex-M</family>
|
||||
</processor>
|
||||
<link href="nxp_lpcxxxx_peripheral.xme" show="embed" type="simple"/>
|
||||
</info>
|
||||
</infoList>
|
||||
</TargetConfig>{% endblock %}
|
||||
Loading…
Reference in New Issue