Reason for needing greater timeout could be this test's performance.
UDPSOCKET_ECHOTEST_BURST_NONBLOCK is implementing the receiving
differently and is passing with 1 second timeout.
Get rid of a volatile, and use atomics to synchronise with the interrupt
routine instead.
Useful as a non-RTOS basic compilation check for the atomics - the
fuller atomic test relies on the RTOS.
These are platform tests, but rely on the RTOS to run multiple threads
to exercise it.
(The atomics are still useful in non-RTOS, to protect against interrupt
handlers, but testing versus other threads is easier. The implementation
is the same either way, so doesn't seem worth testing non-RTOS
specifically).
The loop was wrongly incrementing the index of the array after assiging
the value. Thus the first array element was used twice and the last one
was never user. The issue is fixed and the loops are refactored and
simplified to avoid such confusion in the future.
This test case uses `hidapi` -- a cross-platform Python module.
To keep the initial Mbed setup as simple as possible, the `hidapi`
module is skipped on Linux hosts because of its external dependancies
for this platform.
The module can be easily installed following instructions from the
README file.
The test case is skipped if the host machine lacks `hidapi` module.
Wait for the host driver to finish setup before sending any HID reports
from the device.
USBHID::wait_ready() blocks until the device reaches 'configured' state,
but the state of the host HID driver remains unknown to the device.
To successfully use pyusb on Windows hosts, a Zadig configuration has to
be performed. Since config for basic tests has already been provided,
use it again.
FastModels are a software simulator for Arm platform/cores.
They mean to be used as a tool for testing or early prototype stage development.
Due to the nature of software simulator can't grantee the timing accuracy like HW.
So time drifting test is skipped for software models.
Reason for needing greater timeout could be this test's performance.
UDPSOCKET_ECHOTEST_BURST_NONBLOCK is implementing the receiving
differently and is passing with 1 second timeout.
Added WiFi_Bt CM4 PSA target in mbedos json
Added SPE-NSPE mailbox initialization for CM4 SystemInit
Made similar to FUTURE_SEQUANA configurations
Copied FUTURE_SEQUANA CM0 SPM part for WiFi_Bt smoke test
Added CY8CKIT_062_WIFI_BT_M0 and CY8CKIT_062_WIFI_BT_M0_PSA targets
Sorted files for new CY8CKIT_062_WIFI_BT_M0 and CY8CKIT_062_WIFI_BT_M0_PSA targets
Copied files for CY8CKIT_062_WIFI_BT_M0_PSA from FUTURE_SEQUANA
Copied and updated cm0p start files
Corrected according to FUTURE_SEQUANA
Changes to M0 startup files to have SPM started
Fixed implicit declaration warning
Commented interrupts enabling according to FUTURE_SEQUANA flow
Updated prebuild spm_smore CM0 hex for CM4 target
Turned on greentea environment
Used special memory region for common CM0/CM4 data
Updated prebuild CM0 SPM hex
Placed shared memory region for flash operations into SPM shared memory region
Updated cyprotection code and configuration
Start address of protected regions is set by a defined number from target.json
Added masters pcMask configuration
Added support for PSA target to WIFI_BT board
Enabled resources protection for SPM
Aligned RAM usage according to Cypress FlashBoot and CyBootloader
alligned protection config
Added CYW943012P6EVB_01_M0 target
Enlarged heap size, remobed nv_seed
Added heap reservation in linker script from mbed-os
Removed heap size definition
turned on nv_seed config
Removed nv_seed macros
Enabled protection for PSoC6 CM0
Added PSoC6 CM0 PSA readme
Enabled mbed_hal-spm test
Enabled nv_seed and removed unneeded ipc config define
Added SPDX string to feature_ble cypress target files
Removed unneeded supported_toolchains lines for Cypress targets
Disabled protection settings
Corrected flash initialization for PSoC6 CM0 PSA
Changed PSoC6 IPC6 protection for flash
Enabled special flash initialization and enabled protection settings
Updated and added new prebuild PSoC6 CM0 PSA hex files
Disabled HW TRNG and CRC for PSoC6 CM4 PSA target
Added missing const to allow types to match
Updated PSoC6 WIFI_BT_PSA prebuilt directory
Moved PSoC6 shared section usage area definition to begin of ld
Added initial ARM_STD linker and startup files for PSoC6 CM0
Added initial IAR linker and startup files for PSoC6 CM0
Added defines to disable some SPM protection settings for PSoC64
Moved Flash function variables into separate memory region
Added defines for new Public area definition
Updated PSoC6 CM0_PSA hex-files
On platforms using coretx m33 accessing the secure memory will cause SecureFault instead of Hardfault.
SecureFault is implemented in the secure image and cannot be changed in runtime.