1. Fix 'spurious close' by adding close() in open(). 'spurious close' gets frequent and cannot ignore when send() changes to asynchronous. User can retry open() until 'spurious close' gets true.
2. Allow only one actively sending socket because:
(1) ESP8266 AT packets 'SEND OK'/'SEND FAIL' are not associated with socket ID. No way to tell them.
(2) In original implementation, ESP8266::send() is synchronous, which implies only one actively sending socket.
3. Register 'SEND OK'/'SEND FAIL' oobs, like others in ESP8266::ESP8266 constructor. Don't get involved in oob management with send status because ESP8266 modem possibly doesn't reply these packets on error case.
4. Now that ESP8266::send() changes to asynchronous, drop the code with _parser.recv("SEND OK")/_parser.recv("SEND FAIL"). _parser.recv("SEND OK")/_parser.recv("SEND FAIL") and 'SEND OK'/'SEND FAIL' oobs both consume 'SEND OK'/'SEND FAIL' packets and complicate flow control.
Default NS lock functions use mutex to guarantee serialization into secure world.
But this mechanism doesn't support pre-rtos and interrupt-disabled.
This commit changes these functions to weak so that platform can override them to provide another mechanism.
This approach is just what TF-M repository is adopting.
https://review.trustedfirmware.org/c/trusted-firmware-m/+/1460
SPIFReducedBlockDevice parameters come from mbed_lib.json if not provided
explicitly.
Introduced an app config file for running filesystem tests with RSPIF
block device
SPIFBlockDevice parameters come from mbed_lib.json if not provided
explicitly.
Introduced an app config file for running filesystem tests with SPIF
modules
QSPIFBlockDevice parameters come from mbed_lib.json if not provided
explicitly.
Introduced an app config file for running filesystem tests with QSPIF
modules
We are now checking if ESP8266 has confirmed receiving data over serial
port with an undocumented (but existing) "Recv x bytes" message. Next we
are explicitly waiting for an official "SEND OK".
The size stated in the struct header was 0xB0, however
the actual size(including the header) is 0xAC. Changed the
len value in the header, to avoid memory corruption.
Raised in #12171
* Make mbed_error use bitwise MbedCRC call rather than local
implementation.
* Remove use of POLY_32BIT_REV_ANSI from LittleFS.
* Move some MbedCRC instances closer to use - construction cost is
trivial, and visibility aids compiler optimisation.
As the `psa` library is not included in the baremetal profile, perform
a TFM system reset only if the `psa` library is included in
the build otherwise perform a normal CMSIS system reset.
* Make mbed_error use bitwise MbedCRC call rather than local
implementation.
* Remove use of POLY_32BIT_REV_ANSI from LittleFS.
* Move some MbedCRC instances closer to use - construction cost is
trivial, and visibility aids compiler optimisation.
4-byte addressing has been seen to cause failures on NORDIC
boards and with Macronix memories. Suppress the attempt to enable it
on that hardware (via vendor quirks and a target check) until either
the failure cause can be fixed or a more robust suppression mechanism
is implemented.
Use a vendor id check to only perform this enable on devices which define the
second configuration register where the fast mode enable bit lives.
Change _enable_fast_mode to use the standard status register reading and writing functions
Default to 2 status registers, but update this value if necessary
during vendor quirk handling for parts (currently only Macronix)
which have one status register and two control registers. For the
purposes of QSPIFBlockDevice, these are all considered status
(or at least "status-like") registers because they are all written
via the Write Status Register instruction.
Set the custom RDCR instruction for Macronix during quirk handling.
Update reading and writing of status registers to handle a variable
number of status registers.
Introduce a separate function for handling alterations to device interaction
which are not covered by the SFDP tables and therefore require checking against
the vendor id.
QSPIFBlockDevice::_clear_block_protection() has logic to retain the
WIP and WEL bits in status register 1, but it failed to account for
the situation where the QE bit is also in status register 1.
In _sfdp_set_quad_enabled, note the status register and bit therein
for the quad enable, so that _clear_block_protection can retain it.
Anna Bridge
Martin Kojtal
Hugues Kamba
Michal Paszta
Kevin Bracey
Chun-Chieh Li
Veijo Pesonen
Tymoteusz Bloch
Ron Eldor
Antti Kauppila
Przemyslaw Stekiel
Antti Yli-Tokola
jeromecoutant
Jarkko Paso
Kyle Kearney