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684 Commits (ab3c1e3a1643cf9c8696ff52b3eeb85b78afaef5)

Author SHA1 Message Date
svastm 7966ee4067 [NUCLEO_L031K6] Change the default pwm pin 2016-04-29 15:58:43 +02:00
Martin Kojtal d224239ce9 Merge pull request #1690 from LMESTM/dev_stm32fxxx_cleanup 
stm32fxxx cleanup
 2016-04-28 19:07:05 -05:00
adustm 2451ac1026 [STM32F4 STM32F7] Overwrite HAL_Delay to allow SD example (#1624) 
* [STM32F4 STM32F7] Overwrite HAL_Delay to allow SD example

The weak function HAL_Delay is overwritten to use us ticker API. 
The user can use stm32f[4/7]xx_hal_sd.c that calls
HAL_Delay
This will allow us to add an example detecting / writing / reading an SD
card on DISCO_F469NI and DISCO_F746NG

(cherry picked from commit d491e3cd8b)
 2016-04-26 13:36:04 -05:00
Laurent Meunier 557dcd8881 [STM32F4] remove deprecated STM32F4XX directory 
None of the compiled STM32 targets seem to rely on this code anymore,
so better clean it up.
 2016-04-26 15:34:59 +02:00
Laurent Meunier 9554bb790d [STM32F3] remove deprecated STM32F3XX directory 
None of the compiled STM32 targets seems to rely on this code anymore,
so better clean it up.
 2016-04-26 15:34:59 +02:00
svastm ac10c80919 [NUCLEO_L031K6] Hard tabs removal 2016-04-22 09:12:53 +02:00
svastm 39486f74a0 [NUCLEO_L031K6] Update HAL API 2016-04-21 16:24:19 +02:00
svastm a58c1959c4 [NUCLEO_L031K6] Add HAL target 2016-04-21 16:23:19 +02:00
Martin Kojtal b5e7f79753 Merge pull request #1669 from svastm/master 
[STM32L0] Update STM32Cube_L0 from v1.2 to v1.5
 2016-04-19 11:00:22 +01:00
Mridupawan Das 92a345200d adding hwflwctl support for NUCLEO_L476RG (#1658) 2016-04-17 17:37:14 +01:00
svastm 2bc21a7641 Code misalignment correction 2016-04-15 14:37:08 +02:00
bcostm 9b277ae859 [STM32L4] Change LSI_VALUE to 32 kHz (#1662) 
* Add DEVICE_RTC_LSI=0

* Change LSI value to 32 kHz

This is the value written in the device datasheet.

* Replace tabulations with spaces
 2016-04-15 10:48:47 +01:00
svastm b77627dd30 Update STM32L0 HAL API to support STM32CUBE_L0 v1.5 2016-04-14 14:48:11 +02:00
Mridupawan Das 9cd482817d adding hwflwctl support for NUCLEO_F401RE (#1654) 2016-04-12 08:54:48 +01:00
dbestm e2cb35e9ad [XXX_F746XG] Move erasing of BkUpR in RTC API 
The erasing of back up register is only needed when using LSI in RTC API
 2016-04-04 22:02:48 +01:00
dbestm 7f6c0b8269 [XXX_F10XRB] enhance RTC API 
Add a define to select between LSE or LSI
 2016-04-04 16:11:02 +02:00
dbestm 76649d8a97 [XXX_L15XX] Move erasing of BkUpR in RTC API 
the erasing of back up register is only needed when using LSI
 2016-04-04 11:09:10 +01:00
Martin Kojtal c90b7f81d2 Merge pull request #1648 from dbestm/dev_xxx_l0x3xx_rtc 
[XXX_L0X3XX] Move erasing of BkUpR in RTC API
 2016-04-04 11:08:52 +01:00
dbestm 50845e8069 [XXX_L0X3XX] Move erasing of BkUpR in RTC API 
The erasing of back up register is needed only when using LSI in RTC API
 2016-04-04 11:05:52 +02:00
Martin Kojtal 47c580be86 Merge pull request #1640 from dbestm/dev_xxx_f3xx_rtc 
[XXX_F3XX] enhance RTC API
 2016-04-01 17:44:02 +01:00
Martin Kojtal 43b94d2fcf Merge pull request #1638 from dbestm/dev_xxx_f746xg_rtc 
[xxx_F746XG] enhance RTC api
 2016-04-01 17:43:34 +01:00
Martin Kojtal 53fd30ab31 Merge pull request #1641 from dbestm/dev_xxx_F0xx_rtc 
[XXX_F0XX] enhance RTC API
 2016-04-01 17:42:31 +01:00
Martin Kojtal 7b82f27438 Merge pull request #1642 from dbestm/dev_xxx_l476xg_rtc 
[XXX_L476XG] remove erasing of BkUpR in RTC API
 2016-04-01 17:42:12 +01:00
dbestm 31defa8bcd [xxx_F4XX] remove erasing of BkUpR in RTC API 
the erasing of back up register is only needed when using LSI in RTC API
 2016-04-01 11:39:51 +02:00
dbestm 9d60138873 [xxx_L476XG] remove erase of BkUpR in RTC API 
the erase of back up regsiters are needed only when using RTC+LSI
 2016-04-01 11:18:06 +02:00
dbestm fe0ea5c436 [XXX_F0XX] enhance RTC api 
add define to select LSI or LSE
modify rtc api accordingly
 2016-04-01 10:50:46 +02:00
dbestm f6cafe37c8 [XXX_F3XX] enhance rtc api 
add define to select LSI or LSE, update rtc api accordingly
 2016-03-31 17:34:42 +02:00
dbestm 8a1a67d189 [xxx_F746XG] enhance RTC api 
to support LSI and LSE with a define in device.h
 2016-03-31 10:44:01 +02:00
dbestm e42e174852 [XXX_L15XXX] enhance RTC files 2016-03-30 17:49:39 +02:00
bcostm 18f90871db Replace tabs with spaces 2016-03-25 14:56:56 +01:00
bcostm 481a451f2c Update LSI typical value to 38MHz (datasheet value) 
MBED_16 test re-checked ok with LSI on the 3 STM32L0 platforms.
 2016-03-25 14:56:01 +01:00
bcostm 3d6e522177 Move rtc_api.c in upper folder 
This file should be common for all L0 targets.
 2016-03-25 14:08:04 +01:00
Martin Kojtal ff9d4e2266 Merge pull request #1625 from dbestm/dev_l0x3_rtc 
[xxx_L0X3] debug RTC to add a proper init check feature
 2016-03-24 07:03:30 +01:00
dbestm 6dbe57b058 [xxx_L0X3] debug RTC to add a proper init check feature 2016-03-21 15:01:11 +01:00
Martin Kojtal 0a0fcbb5fd Merge pull request #1603 from arnaudrichard/master 
Fix IRQ enabled in serial_irq_set()
 2016-03-17 15:34:27 +00:00
bcostm 0ae3ed496d Remove I2C PA11 and PA12 pins 
There is no I2C on these pins.
 2016-03-17 08:44:46 +01:00
Martin Kojtal 3afb550952 Merge pull request #1611 from bcostm/dev_rtc_stm32f4 
[STM32F4] Add DEVICE_RTC_LSI=0 to all targets
 2016-03-15 08:54:05 +00:00
Martin Kojtal 2144dadad2 Merge pull request #1608 from MultiTechSystems/f4-serial-overrun 
avoid getting stuck in serial IRQ if ORE is set without RXNE
 2016-03-14 16:02:28 +00:00
bcostm 9db204bcf0 Add DEVICE_RTC_LSI=0 2016-03-14 16:01:24 +00:00
bcostm b956e27237 Add DEVICE_RTC_LSI = 0 to all targets 
Added for clarity. This flag must be set to 1 if the LSE xtal is not
present on the board or if the RTC must be clocked by the internal
clock.
 2016-03-14 14:26:27 +01:00
Mike Fiore 68b034541a avoid getting stuck in serial IRQ if ORE is set without RXNE - issue #1605 2016-03-11 11:49:03 -06:00
Arnaud RICHARD cbcdfab741 Fix IRQ enabled in serial_irq_set() 
UART_IT_TC was enabled instead of UART_IT_TXE
 This was causing an issue because UART_IT_TXE (and not UART_IT_TC) was disabled  by same function.
  Consequently if a transfer was ongoing when serial_irq_set() was called to disable IRQ, UART_IT_TC would still trigger (once).
 Side effect is maybe speed: I guess using UART_IT_TC prevented implementation of continuous transfer.
 This commit is focused on solving an issue observed with TARGET_STM32F4. It doesn't presume it should or shouldn't be done for other targets.
 2016-03-10 14:40:41 +01:00
Martin Kojtal 6501de9044 Merge pull request #1548 from dbestm/dev_F446_rtc 
[NUCLEO_F446RE] RTC+LSE+init
 2016-03-09 17:55:20 +00:00
dbestm 81f3abc770 Merge remote-tracking branch 'refs/remotes/mbedmicro/master' into dev_F446_rtc 2016-03-09 15:40:37 +01:00
Martin Kojtal 2c6c939564 Merge pull request #1580 from ohagendorf/f3xx_adc 
[STM32F3xx] bug fix multiple ADC channels using multiple ADC blocks
 2016-03-09 08:33:47 +00:00
adustm 5376c62f3d [STM32F7 family] fix issue with RTC init 
the logical test for RTC_ISR_INITS was wronlgy reported from other
STMfamilies.
MBED_16 test works with this modification.
 2016-03-01 08:03:23 +01:00
ohagendorf f96f9c2e2e [STM32F3xx] bug fix multiple ADC channels using multiple ADC blocks 
When two or more analogue inputs are initialized on more than one ADC HW block the initialisation fails with:
Cannot initialize ADC

The reason is the reusage of just one ADC_HandleTypeDef for all initializations (in mbed\targets\hal\TARGET_STM\TARGET_STM32F3\analogin_api.c). After the first (successful) ADC initialisation AdcHandle.State is set to HAL_ADC_STATE_READY).
But for another ADC block initialisation the AdcHandle.State has to be reset so that the HAL initialize it (in mbed\targets\cmsis\TARGET_STM\TARGET_STM32F3\stm32f3xx_hal_adc_ex.c line 424). When this state is not reset the HAL returns with an initialization error. And this error induces the above mbed error message.

The error message can be reproduced just with AnalogIn in1(xx); AnalogIn in2(yy); where xx and yy belongs to two different ADC blocks.
 2016-02-29 23:50:07 +01:00
Martin Kojtal bd0417cb15 Merge pull request #1520 from adustm/b_b96b_can 
[STM B96B_F446VE] Add CAN feature
 2016-02-26 17:07:15 +00:00
adustm d53f444a6f [STM32F7 family] revert RTC change in this PR that is due to new platform. It will be done through a separate PR. 2016-02-26 11:36:59 +00:00
adustm 3b3f89294e [NUCLEO_F746ZG] fix pins and system files after manual and automatic test phase 2016-02-26 11:36:57 +00:00