mirror of https://github.com/ARMmbed/mbed-os.git
commit
bd0417cb15
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@ -1,5 +1,5 @@
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/* mbed Microcontroller Library
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* Copyright (c) 2006-2013 ARM Limited
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* Copyright (c) 2006-2016 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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@ -65,4 +65,8 @@ extern const PinMap PinMap_SPI_MISO[];
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extern const PinMap PinMap_SPI_SCLK[];
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extern const PinMap PinMap_SPI_SSEL[];
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//*** CAN ***
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extern const PinMap PinMap_CAN_RD[];
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extern const PinMap PinMap_CAN_TD[];
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#endif
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@ -38,7 +38,7 @@ extern "C" {
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typedef enum {
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ADC_1 = (int)ADC1_BASE,
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ADC_3 = (int)ADC3_BASE,
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ADC_3 = (int)ADC3_BASE
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} ADCName;
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typedef enum {
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@ -92,6 +92,11 @@ typedef enum {
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PWM_14 = (int)TIM14_BASE
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} PWMName;
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typedef enum {
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CAN_1 = (int)CAN1_BASE,
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CAN_2 = (int)CAN2_BASE
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} CANName;
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#ifdef __cplusplus
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}
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#endif
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@ -288,3 +288,24 @@ const PinMap PinMap_SPI_SSEL[] = {
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{PE_11, SPI_4, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_PULLUP, GPIO_AF5_SPI4)},
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{NC, NC, 0}
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};
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//*** CAN ***
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const PinMap PinMap_CAN_RD[] = {
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// {PA_11, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, // unsolder JP73 to use it
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// {PB_5 , CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, // unsolder JP36 to use it
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// {PB_8, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, // connected to MEMs
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// {PB_12, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
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{PD_0, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
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{NC, NC, 0}
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};
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const PinMap PinMap_CAN_TD[] = {
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// {PA_12, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, // unsolder JP74 to use it
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// {PB_6 , CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)}, // unsolder JP43 to use it
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// {PB_9, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)}, // connected to MEMs
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// {PB_13, CAN_2, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN2)},
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{PD_1, CAN_1, STM_PIN_DATA(STM_MODE_AF_PP, GPIO_NOPULL, GPIO_AF9_CAN1)},
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{NC, NC, 0}
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};
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@ -120,7 +120,7 @@ typedef enum {
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PC_15 = 0x2F,
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PD_0 = 0x30,
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PD_1 = 0x31,
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PD_1 = 0x31,
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PD_2 = 0x32,
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PD_3 = 0x33,
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PD_4 = 0x34,
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@ -57,6 +57,8 @@
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#define DEVICE_SLEEP 1
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#define DEVICE_CAN 1
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//=======================================
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#define DEVICE_SEMIHOST 0
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@ -111,6 +111,11 @@ struct pwmout_s {
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uint8_t inverted;
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};
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struct can_s {
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CANName can;
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int index; // Used by irq
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};
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#include "gpio_object.h"
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#ifdef __cplusplus
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@ -0,0 +1,529 @@
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/* mbed Microcontroller Library
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* Copyright (c) 2006-2016 ARM Limited
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*
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* Licensed under the Apache License, Version 2.0 (the "License");
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* you may not use this file except in compliance with the License.
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* You may obtain a copy of the License at
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*
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* http://www.apache.org/licenses/LICENSE-2.0
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*
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* Unless required by applicable law or agreed to in writing, software
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* distributed under the License is distributed on an "AS IS" BASIS,
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* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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* See the License for the specific language governing permissions and
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* limitations under the License.
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*/
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#include "can_api.h"
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#if DEVICE_CAN
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#include "cmsis.h"
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#include "pinmap.h"
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#include "PeripheralPins.h"
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#include "mbed_error.h"
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#include <math.h>
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#include <string.h>
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#define CAN_NUM 2
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static CAN_HandleTypeDef CanHandle;
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static uint32_t can_irq_ids[CAN_NUM] = {0};
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static can_irq_handler irq_handler;
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void can_init(can_t *obj, PinName rd, PinName td)
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{
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CANName can_rd = (CANName)pinmap_peripheral(rd, PinMap_CAN_RD);
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CANName can_td = (CANName)pinmap_peripheral(td, PinMap_CAN_TD);
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obj->can = (CANName)pinmap_merge(can_rd, can_td);
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MBED_ASSERT((int)obj->can != NC);
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if(obj->can == CAN_1) {
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__HAL_RCC_CAN1_CLK_ENABLE();
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obj->index = 0;
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} else {
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__HAL_RCC_CAN2_CLK_ENABLE();
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obj->index = 0;
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}
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// Configure the CAN pins
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pinmap_pinout(rd, PinMap_CAN_RD);
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pinmap_pinout(td, PinMap_CAN_TD);
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if (rd != NC) {
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pin_mode(rd, PullUp);
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}
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if (td != NC) {
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pin_mode(td, PullUp);
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}
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CanHandle.Instance = (CAN_TypeDef *)(obj->can);
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CanHandle.Init.TTCM = DISABLE;
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CanHandle.Init.ABOM = DISABLE;
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CanHandle.Init.AWUM = DISABLE;
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CanHandle.Init.NART = DISABLE;
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CanHandle.Init.RFLM = DISABLE;
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CanHandle.Init.TXFP = DISABLE;
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CanHandle.Init.Mode = CAN_MODE_NORMAL;
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CanHandle.Init.SJW = CAN_SJW_1TQ;
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CanHandle.Init.BS1 = CAN_BS1_6TQ;
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CanHandle.Init.BS2 = CAN_BS2_8TQ;
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CanHandle.Init.Prescaler = 2;
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if (HAL_CAN_Init(&CanHandle) != HAL_OK) {
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error("Cannot initialize CAN");
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}
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can_filter(obj, 0, 0, CANStandard, 0);
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}
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void can_irq_init(can_t *obj, can_irq_handler handler, uint32_t id)
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{
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irq_handler = handler;
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can_irq_ids[obj->index] = id;
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}
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void can_irq_free(can_t *obj)
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{
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CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
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can->IER &= ~(CAN_IT_FMP0 | CAN_IT_FMP1 | CAN_IT_TME | \
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CAN_IT_ERR | CAN_IT_EPV | CAN_IT_BOF);
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can_irq_ids[obj->can] = 0;
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}
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void can_free(can_t *obj)
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{
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// Reset CAN and disable clock
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if (obj->can == CAN_1) {
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__HAL_RCC_CAN1_FORCE_RESET();
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__HAL_RCC_CAN1_RELEASE_RESET();
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__HAL_RCC_CAN1_CLK_DISABLE();
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}
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if (obj->can == CAN_2) {
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__HAL_RCC_CAN2_FORCE_RESET();
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__HAL_RCC_CAN2_RELEASE_RESET();
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__HAL_RCC_CAN2_CLK_DISABLE();
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}
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}
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// The following table is used to program bit_timing. It is an adjustment of the sample
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// point by synchronizing on the start-bit edge and resynchronizing on the following edges.
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// This table has the sampling points as close to 75% as possible (most commonly used).
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// The first value is TSEG1, the second TSEG2.
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static const int timing_pts[23][2] = {
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{0x0, 0x0}, // 2, 50%
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{0x1, 0x0}, // 3, 67%
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{0x2, 0x0}, // 4, 75%
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{0x3, 0x0}, // 5, 80%
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{0x3, 0x1}, // 6, 67%
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{0x4, 0x1}, // 7, 71%
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{0x5, 0x1}, // 8, 75%
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{0x6, 0x1}, // 9, 78%
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{0x6, 0x2}, // 10, 70%
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{0x7, 0x2}, // 11, 73%
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{0x8, 0x2}, // 12, 75%
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{0x9, 0x2}, // 13, 77%
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{0x9, 0x3}, // 14, 71%
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{0xA, 0x3}, // 15, 73%
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{0xB, 0x3}, // 16, 75%
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{0xC, 0x3}, // 17, 76%
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{0xD, 0x3}, // 18, 78%
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{0xD, 0x4}, // 19, 74%
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{0xE, 0x4}, // 20, 75%
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{0xF, 0x4}, // 21, 76%
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{0xF, 0x5}, // 22, 73%
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{0xF, 0x6}, // 23, 70%
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{0xF, 0x7}, // 24, 67%
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};
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static unsigned int can_speed(unsigned int pclk, unsigned int cclk, unsigned char psjw)
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{
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uint32_t btr;
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uint16_t brp = 0;
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uint32_t calcbit;
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uint32_t bitwidth;
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int hit = 0;
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int bits;
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bitwidth = (pclk / cclk);
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brp = bitwidth / 0x18;
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while ((!hit) && (brp < bitwidth / 4)) {
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brp++;
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for (bits = 22; bits > 0; bits--) {
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calcbit = (bits + 3) * (brp + 1);
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if (calcbit == bitwidth) {
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hit = 1;
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break;
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}
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}
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}
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if (hit) {
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btr = ((timing_pts[bits][1] << 20) & 0x00700000)
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| ((timing_pts[bits][0] << 16) & 0x000F0000)
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| ((psjw << 24) & 0x0000C000)
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| ((brp << 0) & 0x000003FF);
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} else {
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btr = 0xFFFFFFFF;
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}
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return btr;
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}
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int can_frequency(can_t *obj, int f)
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{
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int pclk ; //= PeripheralClock;
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int btr = can_speed(pclk, (unsigned int)f, 1);
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CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
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if (btr > 0) {
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can->MCR |= CAN_MCR_INRQ ;
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while((can->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) {
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}
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can->BTR = btr;
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can->MCR &= ~(uint32_t)CAN_MCR_INRQ;
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while((can->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) {
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}
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return 1;
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} else {
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return 0;
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}
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}
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int can_write(can_t *obj, CAN_Message msg, int cc)
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{
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uint32_t transmitmailbox = 5;
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CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
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/* Select one empty transmit mailbox */
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if ((can->TSR&CAN_TSR_TME0) == CAN_TSR_TME0) {
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transmitmailbox = 0;
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} else if ((can->TSR&CAN_TSR_TME1) == CAN_TSR_TME1) {
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transmitmailbox = 1;
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} else if ((can->TSR&CAN_TSR_TME2) == CAN_TSR_TME2) {
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transmitmailbox = 2;
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} else {
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transmitmailbox = CAN_TXSTATUS_NOMAILBOX;
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}
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if (transmitmailbox != CAN_TXSTATUS_NOMAILBOX) {
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can->sTxMailBox[transmitmailbox].TIR &= CAN_TI0R_TXRQ;
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if (!(msg.format))
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{
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can->sTxMailBox[transmitmailbox].TIR |= ((msg.id << 21) | msg.type);
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}
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else
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{
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can->sTxMailBox[transmitmailbox].TIR |= ((msg.id << 3) | CAN_ID_EXT | msg.type);
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}
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/* Set up the DLC */
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can->sTxMailBox[transmitmailbox].TDTR &= (uint32_t)0xFFFFFFF0;
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can->sTxMailBox[transmitmailbox].TDTR |= (msg.len & (uint8_t)0x0000000F);
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/* Set up the data field */
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can->sTxMailBox[transmitmailbox].TDLR = (((uint32_t)msg.data[3] << 24) |
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((uint32_t)msg.data[2] << 16) |
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((uint32_t)msg.data[1] << 8) |
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((uint32_t)msg.data[0]));
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can->sTxMailBox[transmitmailbox].TDHR = (((uint32_t)msg.data[7] << 24) |
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((uint32_t)msg.data[6] << 16) |
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((uint32_t)msg.data[5] << 8) |
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((uint32_t)msg.data[4]));
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/* Request transmission */
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can->sTxMailBox[transmitmailbox].TIR |= CAN_TI0R_TXRQ;
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}
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return 1;
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}
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int can_read(can_t *obj, CAN_Message *msg, int handle)
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{
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//handle is the FIFO number
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CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
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/* Get the Id */
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msg->format = (CANFormat)((uint8_t)0x04 & can->sFIFOMailBox[handle].RIR);
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if (!msg->format) {
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msg->id = (uint32_t)0x000007FF & (can->sFIFOMailBox[handle].RIR >> 21);
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} else {
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msg->id = (uint32_t)0x1FFFFFFF & (can->sFIFOMailBox[handle].RIR >> 3);
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}
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msg->type = (CANType)((uint8_t)0x02 & can->sFIFOMailBox[handle].RIR);
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/* Get the DLC */
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msg->len = (uint8_t)0x0F & can->sFIFOMailBox[handle].RDTR;
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// /* Get the FMI */
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// msg->FMI = (uint8_t)0xFF & (can->sFIFOMailBox[handle].RDTR >> 8);
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/* Get the data field */
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msg->data[0] = (uint8_t)0xFF & can->sFIFOMailBox[handle].RDLR;
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msg->data[1] = (uint8_t)0xFF & (can->sFIFOMailBox[handle].RDLR >> 8);
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msg->data[2] = (uint8_t)0xFF & (can->sFIFOMailBox[handle].RDLR >> 16);
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msg->data[3] = (uint8_t)0xFF & (can->sFIFOMailBox[handle].RDLR >> 24);
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msg->data[4] = (uint8_t)0xFF & can->sFIFOMailBox[handle].RDHR;
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msg->data[5] = (uint8_t)0xFF & (can->sFIFOMailBox[handle].RDHR >> 8);
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msg->data[6] = (uint8_t)0xFF & (can->sFIFOMailBox[handle].RDHR >> 16);
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msg->data[7] = (uint8_t)0xFF & (can->sFIFOMailBox[handle].RDHR >> 24);
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/* Release the FIFO */
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if(handle == CAN_FIFO0) {
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/* Release FIFO0 */
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can->RF0R = CAN_RF0R_RFOM0;
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} else { /* FIFONumber == CAN_FIFO1 */
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/* Release FIFO1 */
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can->RF1R = CAN_RF1R_RFOM1;
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}
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return 1;
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}
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void can_reset(can_t *obj)
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{
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CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
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can->MCR |= CAN_MCR_RESET;
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can->ESR = 0x0;
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}
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unsigned char can_rderror(can_t *obj)
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{
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CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
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return (can->ESR >> 24) & 0xFF;
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}
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unsigned char can_tderror(can_t *obj)
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{
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CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
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return (can->ESR >> 16) & 0xFF;
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}
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void can_monitor(can_t *obj, int silent)
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{
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CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
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can->MCR |= CAN_MCR_INRQ ;
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while((can->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) {
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}
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if (silent) {
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can->BTR |= ((uint32_t)1 << 31);
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} else {
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can->BTR &= ~((uint32_t)1 << 31);
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}
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can->MCR &= ~(uint32_t)CAN_MCR_INRQ;
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while((can->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) {
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}
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}
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int can_mode(can_t *obj, CanMode mode)
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{
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int success = 0;
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CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
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can->MCR |= CAN_MCR_INRQ ;
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while((can->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) {
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}
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switch (mode) {
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case MODE_NORMAL:
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can->BTR &= ~(CAN_BTR_SILM | CAN_BTR_LBKM);
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success = 1;
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break;
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case MODE_SILENT:
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can->BTR |= CAN_BTR_SILM;
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can->BTR &= ~CAN_BTR_LBKM;
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success = 1;
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break;
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case MODE_TEST_GLOBAL:
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||||
case MODE_TEST_LOCAL:
|
||||
can->BTR |= CAN_BTR_LBKM;
|
||||
can->BTR &= ~CAN_BTR_SILM;
|
||||
success = 1;
|
||||
break;
|
||||
case MODE_TEST_SILENT:
|
||||
can->BTR |= (CAN_BTR_SILM | CAN_BTR_LBKM);
|
||||
success = 1;
|
||||
break;
|
||||
default:
|
||||
success = 0;
|
||||
break;
|
||||
}
|
||||
can->MCR &= ~(uint32_t)CAN_MCR_INRQ;
|
||||
while((can->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) {
|
||||
}
|
||||
return success;
|
||||
}
|
||||
|
||||
int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t handle)
|
||||
{
|
||||
CanHandle.Instance = (CAN_TypeDef *)(obj->can);
|
||||
CAN_FilterConfTypeDef sFilterConfig;
|
||||
|
||||
sFilterConfig.FilterNumber = handle;
|
||||
sFilterConfig.FilterMode = CAN_FILTERMODE_IDMASK;
|
||||
sFilterConfig.FilterScale = CAN_FILTERSCALE_32BIT;
|
||||
sFilterConfig.FilterIdHigh = (uint8_t) (id >> 8);
|
||||
sFilterConfig.FilterIdLow = (uint8_t) id;
|
||||
sFilterConfig.FilterMaskIdHigh = (uint8_t) (mask >> 8);
|
||||
sFilterConfig.FilterMaskIdLow = (uint8_t) mask;
|
||||
sFilterConfig.FilterFIFOAssignment = 0;
|
||||
sFilterConfig.FilterActivation = ENABLE;
|
||||
sFilterConfig.BankNumber = 14 + handle;
|
||||
|
||||
HAL_CAN_ConfigFilter(&CanHandle, &sFilterConfig);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void can_irq(CANName name, int id)
|
||||
{
|
||||
uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0;
|
||||
CanHandle.Instance = (CAN_TypeDef *)name;
|
||||
|
||||
if(__HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_TME)) {
|
||||
tmp1 = __HAL_CAN_TRANSMIT_STATUS(&CanHandle, CAN_TXMAILBOX_0);
|
||||
tmp2 = __HAL_CAN_TRANSMIT_STATUS(&CanHandle, CAN_TXMAILBOX_1);
|
||||
tmp3 = __HAL_CAN_TRANSMIT_STATUS(&CanHandle, CAN_TXMAILBOX_2);
|
||||
if(tmp1 || tmp2 || tmp3)
|
||||
{
|
||||
irq_handler(can_irq_ids[id], IRQ_TX);
|
||||
}
|
||||
}
|
||||
|
||||
tmp1 = __HAL_CAN_MSG_PENDING(&CanHandle, CAN_FIFO0);
|
||||
tmp2 = __HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_FMP0);
|
||||
|
||||
if((tmp1 != 0) && tmp2) {
|
||||
irq_handler(can_irq_ids[id], IRQ_RX);
|
||||
}
|
||||
|
||||
tmp1 = __HAL_CAN_GET_FLAG(&CanHandle, CAN_FLAG_EPV);
|
||||
tmp2 = __HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_EPV);
|
||||
tmp3 = __HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_ERR);
|
||||
|
||||
if(tmp1 && tmp2 && tmp3) {
|
||||
irq_handler(can_irq_ids[id], IRQ_PASSIVE);
|
||||
}
|
||||
|
||||
tmp1 = __HAL_CAN_GET_FLAG(&CanHandle, CAN_FLAG_BOF);
|
||||
tmp2 = __HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_BOF);
|
||||
tmp3 = __HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_ERR);
|
||||
if(tmp1 && tmp2 && tmp3) {
|
||||
irq_handler(can_irq_ids[id], IRQ_BUS);
|
||||
}
|
||||
|
||||
tmp3 = __HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_ERR);
|
||||
if(tmp1 && tmp2 && tmp3) {
|
||||
irq_handler(can_irq_ids[id], IRQ_ERROR);
|
||||
}
|
||||
}
|
||||
|
||||
void CAN1_RX0_IRQHandler(void)
|
||||
{
|
||||
can_irq(CAN_1, 0);
|
||||
}
|
||||
|
||||
void CAN1_TX_IRQHandler(void)
|
||||
{
|
||||
can_irq(CAN_1, 0);
|
||||
}
|
||||
|
||||
void CAN1_SCE_IRQHandler(void)
|
||||
{
|
||||
can_irq(CAN_1, 0);
|
||||
}
|
||||
|
||||
void CAN2_RX0_IRQHandler(void)
|
||||
{
|
||||
can_irq(CAN_2, 1);
|
||||
}
|
||||
|
||||
void CAN2_TX_IRQHandler(void)
|
||||
{
|
||||
can_irq(CAN_2, 1);
|
||||
}
|
||||
|
||||
void CAN2_SCE_IRQHandler(void)
|
||||
{
|
||||
can_irq(CAN_2, 1);
|
||||
}
|
||||
|
||||
void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable)
|
||||
{
|
||||
|
||||
CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
|
||||
IRQn_Type irq_n = (IRQn_Type)0;
|
||||
uint32_t vector = 0;
|
||||
uint32_t ier;
|
||||
|
||||
if(obj->can == CAN_1) {
|
||||
switch (type) {
|
||||
case IRQ_RX:
|
||||
ier = CAN_IT_FMP0;
|
||||
irq_n = CAN1_RX0_IRQn;
|
||||
vector = (uint32_t)&CAN1_RX0_IRQHandler;
|
||||
break;
|
||||
case IRQ_TX:
|
||||
ier = CAN_IT_TME;
|
||||
irq_n = CAN1_TX_IRQn;
|
||||
vector = (uint32_t)&CAN1_TX_IRQHandler;
|
||||
break;
|
||||
case IRQ_ERROR:
|
||||
ier = CAN_IT_ERR;
|
||||
irq_n = CAN1_SCE_IRQn;
|
||||
vector = (uint32_t)&CAN1_SCE_IRQHandler;
|
||||
break;
|
||||
case IRQ_PASSIVE:
|
||||
ier = CAN_IT_EPV;
|
||||
irq_n = CAN1_SCE_IRQn;
|
||||
vector = (uint32_t)&CAN1_SCE_IRQHandler;
|
||||
break;
|
||||
case IRQ_BUS:
|
||||
ier = CAN_IT_BOF;
|
||||
irq_n = CAN1_SCE_IRQn;
|
||||
vector = (uint32_t)&CAN1_SCE_IRQHandler;
|
||||
break;
|
||||
default: return;
|
||||
}
|
||||
} else {
|
||||
switch (type) {
|
||||
case IRQ_RX:
|
||||
ier = CAN_IT_FMP0;
|
||||
irq_n = CAN2_RX0_IRQn;
|
||||
vector = (uint32_t)&CAN2_RX0_IRQHandler;
|
||||
break;
|
||||
case IRQ_TX:
|
||||
ier = CAN_IT_TME;
|
||||
irq_n = CAN2_TX_IRQn;
|
||||
vector = (uint32_t)&CAN2_TX_IRQHandler;
|
||||
break;
|
||||
case IRQ_ERROR:
|
||||
ier = CAN_IT_ERR;
|
||||
irq_n = CAN2_SCE_IRQn;
|
||||
vector = (uint32_t)&CAN2_SCE_IRQHandler;
|
||||
break;
|
||||
case IRQ_PASSIVE:
|
||||
ier = CAN_IT_EPV;
|
||||
irq_n = CAN2_SCE_IRQn;
|
||||
vector = (uint32_t)&CAN2_SCE_IRQHandler;
|
||||
break;
|
||||
case IRQ_BUS:
|
||||
ier = CAN_IT_BOF;
|
||||
irq_n = CAN2_SCE_IRQn;
|
||||
vector = (uint32_t)&CAN2_SCE_IRQHandler;
|
||||
break;
|
||||
default: return;
|
||||
}
|
||||
}
|
||||
|
||||
if(enable) {
|
||||
can->IER |= ier;
|
||||
} else {
|
||||
can->IER &= ~ier;
|
||||
}
|
||||
|
||||
NVIC_SetVector(irq_n, vector);
|
||||
NVIC_EnableIRQ(irq_n);
|
||||
}
|
||||
|
||||
#endif // DEVICE_CAN
|
||||
|
|
@ -7,6 +7,9 @@ DigitalOut led2(LED2);
|
|||
#if defined(TARGET_LPC1549)
|
||||
// LPC1549 support only single CAN channel
|
||||
CAN can1(D2, D3);
|
||||
#elif defined(TARGET_B96B_F446VE)
|
||||
// B96B_F446VE support only single CAN channel
|
||||
CAN can1(PD_0, PD_1);
|
||||
#else
|
||||
CAN can1(p9, p10);
|
||||
#endif
|
||||
|
@ -41,8 +44,8 @@ int main() {
|
|||
ticker.attach(&send, 1);
|
||||
CANMessage msg;
|
||||
while(1) {
|
||||
#if !defined(TARGET_LPC1549)
|
||||
printf("loop()\n");
|
||||
#if (!defined (TARGET_LPC1549) && !defined(TARGET_B96B_F446VE))
|
||||
printf("loop()\n");
|
||||
if(can2.read(msg)) {
|
||||
printmsg("Rx message:", &msg);
|
||||
led2 = !led2;
|
||||
|
|
|
@ -7,6 +7,9 @@ DigitalOut led2(LED2);
|
|||
#if defined(TARGET_LPC1549)
|
||||
// LPC1549 support only single CAN channel
|
||||
CAN can1(D2, D3);
|
||||
#elif defined(TARGET_B96B_F446VE)
|
||||
// B96B_F446VE support only single CAN channel
|
||||
CAN can1(PD_0, PD_1);
|
||||
#else
|
||||
CAN can1(p9, p10);
|
||||
#endif
|
||||
|
@ -36,7 +39,7 @@ void send() {
|
|||
led1 = !led1;
|
||||
}
|
||||
|
||||
#if !defined (TARGET_LPC1549)
|
||||
#if (!defined (TARGET_LPC1549) && !defined(TARGET_B96B_F446VE))
|
||||
void read() {
|
||||
CANMessage msg;
|
||||
printf("rx()\n");
|
||||
|
@ -50,7 +53,7 @@ void read() {
|
|||
int main() {
|
||||
printf("main()\n");
|
||||
ticker.attach(&send, 1);
|
||||
#if !defined (TARGET_LPC1549)
|
||||
#if (!defined (TARGET_LPC1549) && !defined(TARGET_B96B_F446VE))
|
||||
can2.attach(&read);
|
||||
#endif
|
||||
while(1) {
|
||||
|
|
|
@ -5,6 +5,8 @@
|
|||
CAN can1(D9, D8);
|
||||
#elif defined(TARGET_LPC1768) || defined(TARGET_LPC4088)
|
||||
CAN can1(p9, p10);
|
||||
#elif defined(TARGET_B96B_F446VE)
|
||||
CAN can1(PD_0, PD_1);
|
||||
#endif
|
||||
|
||||
#define TEST_ITERATIONS 127
|
||||
|
|
|
@ -283,7 +283,7 @@ TESTS = [
|
|||
"automated": True,
|
||||
"duration": 20,
|
||||
"peripherals": ["can_transceiver"],
|
||||
"mcu": ["LPC1549", "LPC1768"],
|
||||
"mcu": ["LPC1549", "LPC1768","B96B_F446VE"],
|
||||
},
|
||||
{
|
||||
"id": "MBED_BLINKY", "description": "Blinky",
|
||||
|
@ -554,13 +554,13 @@ TESTS = [
|
|||
"id": "MBED_29", "description": "CAN network test",
|
||||
"source_dir": join(TEST_DIR, "mbed", "can"),
|
||||
"dependencies": [MBED_LIBRARIES],
|
||||
"mcu": ["LPC1768", "LPC4088", "LPC1549", "RZ_A1H"]
|
||||
"mcu": ["LPC1768", "LPC4088", "LPC1549", "RZ_A1H", "B96B_F446VE"]
|
||||
},
|
||||
{
|
||||
"id": "MBED_30", "description": "CAN network test using interrupts",
|
||||
"source_dir": join(TEST_DIR, "mbed", "can_interrupt"),
|
||||
"dependencies": [MBED_LIBRARIES],
|
||||
"mcu": ["LPC1768", "LPC4088", "LPC1549", "RZ_A1H"]
|
||||
"mcu": ["LPC1768", "LPC4088", "LPC1549", "RZ_A1H", "B96B_F446VE"]
|
||||
},
|
||||
{
|
||||
"id": "MBED_31", "description": "PWM LED test",
|
||||
|
|
Loading…
Reference in New Issue