Commit Graph

88 Commits (a40469e7c53fd32cebc98e89bb61a0e0ca0498be)

Author SHA1 Message Date
Mahadevan Mahesh f2d2ed44cd LPC546XX: Add ENET support
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2017-11-28 16:18:36 +00:00
gorazd 5c2f2c3cff lpc546xx: remove obsolete line 2017-11-18 10:44:33 +01:00
gorazd 8411134184 lpc546xx: correct register name (DIGIMODE) 2017-11-17 19:16:42 +01:00
gorazd d62b47393e lpc546xx: fix adc
Resolve #5304
2017-11-17 13:54:25 +01:00
Martin Kojtal 494c25d71c
Merge pull request #5344 from gorazdko/add-new-target-L-TEK-FF-LPC546XX
add new target L-Tek FF-LPC546XX
2017-11-09 16:42:24 +00:00
Jimmy Brisson 02f1d0185a
Merge pull request #5320 from kegilbert/fix-build-warnings-lpc4088
Fix ethernet API build warnings for LPC4088
2017-10-30 10:08:15 -05:00
Kevin Gilbert 901157b305 Replace PACKED attribute on lpc4088 ethernet structs with MBED_PACKED. Placement of packed attribute was causing warnings due to following typedef 2017-10-26 11:34:48 -05:00
Anna Bridge 97e2d4a8c5 Merge pull request #5025 from grygorek/master
LPC1769 port
2017-10-26 11:35:35 +01:00
gorazd b010223145 add new target L-Tek FF-LPC546XX 2017-10-18 23:56:12 +02:00
Piotr Grygorczuk be5a8a98ee lpc1769 inherits from lpc1768; reuse lpc1768.ld for LPC1769 target 2017-10-17 11:12:59 +01:00
Jimmy Brisson a0b624b62e Merge pull request #5038 from chrissnow/LPC1768-Bootloader
Lpc1768 bootloader support
2017-10-05 11:11:08 -05:00
Chris Snow 82ae53a282 Simplify CRP placement. 2017-10-02 19:23:35 +01:00
Mahadevan Mahesh 880f106740 Change LPC54608 to LPC546XX to include support for LPC54608/18/28
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2017-10-02 11:20:27 -05:00
Piotr Grygorczuk 728a3a4a76 mbed LPC1768 & Xpresso LPC1769 unified
Target of LPC1769 links to mbed LPC1768.
The PinNames.h has conditional compile for the pin names.
LWIP lpc17xx emac driver modified to allow LPC1769 target
2017-10-02 11:05:39 +01:00
Chris Snow d6404726dd Ensure CRP is set correctly for IAR, GCC and ARM
CRP value can be set through a macro in mbed_app such as
"macros": [
    "CRP=CRP_NONE"
]
2017-09-30 19:26:05 +01:00
Chris Snow f8f54837cd Linker update for bootloader support 2017-09-30 19:00:25 +01:00
Chris Snow a08fc2bb7a Move CRP out of startup and into CRP.c so it can be conditionally compiled 2017-09-30 19:00:25 +01:00
Jimmy Brisson f5bb15f773 Merge pull request #5152 from NXPmicro/Update_RTC_HAL_driver
Kinetis RTC HAL: Allow writing 0 to the seconds register
2017-09-29 10:12:22 -05:00
Jimmy Brisson 3b224252ef Merge pull request #5141 from NXPmicro/Fix_LPC54608_LEDMap
LPC54608: Swap LED pin connections to match naming on the board
2017-09-29 10:12:04 -05:00
Jimmy Brisson 4f1cafd0b7 Merge pull request #5197 from c1728p9/fix_lpc54114
Fix LPC54114 vector table size
2017-09-27 09:01:44 -05:00
Russ Butler c32890294e Fix LPC54114 vector table size
Correct the vector table size on the LPC54114. This fixes crashes
seen on boot when building with GCC.
2017-09-25 18:49:38 -05:00
Martin Kojtal 9a191de5f9 LPC1768: flash_hal removal duplication
IAP typedef duplication removal
2017-09-25 19:18:18 +02:00
Martin Kojtal 6a6561028e LPC1768: flash erase/write require a critical section
From RM:

32.3.2.6 Interrupts during IAP
The on-chip flash memory is not accessible during erase/write operations. When the user
application code starts executing the interrupt vectors from the user flash area are active.
The user should either disable interrupts, or ensure that user interrupt vectors are active in
RAM and that the interrupt handlers reside in RAM, before making a flash erase/write IAP
call. The IAP code does not use or disable interrupts.
2017-09-25 19:18:06 +02:00
Martin Kojtal c623e889c0 LPC1768: RAM end adjust fix
The topmost 32 bytes used by IAP functions, this was not included in the RAM
end previously.
2017-09-25 13:50:54 +01:00
Chris Snow e2c42bb0a0 LPC1768 IAP Fix (#4993)
use IAP routines for the flash HAL implementation
2017-09-22 11:30:43 +01:00
Mahadevan Mahesh 1dadb055f7 RTC HAL: Allow writing 0 to the seconds register
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2017-09-21 13:33:07 -05:00
Mahadevan Mahesh 82a37b0eb1 LPC54608: Swap LED pin connections to match naming on the board
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2017-09-19 15:37:22 -05:00
Jimmy Brisson cd4fd86f1f Correct Freescale + NXP compiler detection macros
Also removes duplication of common files
2017-09-11 13:20:32 -05:00
Jimmy Brisson 15a9a0382b Enable Compiling with ARMC6 across all targets
remove duplicate sys.cpp
2017-09-11 13:20:32 -05:00
Martin Kojtal bb26bd6d2d Revert "Adjusting Stack size Allocation (IAR, LPC176x)"
This reverts commit fce2ca2122.
2017-09-06 13:56:27 +01:00
Piotr Grygorczuk 9c77957798 LPCXpresso LPC1769 board ported
The blinky example compiles and runs.
The board has a different eth phy component than mbed LPC1768. It requires a driver.
2017-09-05 15:30:14 +01:00
Hasnain Virk fce2ca2122 Adjusting Stack size Allocation (IAR, LPC176x)
Since mbed-os 5.4.3, something increased foot print of mbed-os and the applications that were barely fitting in started to spill.

IAR toolchain for LPC176x target family is set to use 2 RAM regions (32K each). RAM region
2 is being used for ETH/USB and 1 is being used for vector table, stack/heap/static data.

In this commit we have decreased heap size allocation from 8K to 7K so that the is more room for stack and static data.
2017-09-04 14:54:42 +03:00
toyowata da7fa0dd2a [HAL LPC43xx] Fix mask bits for SPI clock rate 2017-08-09 16:51:31 +09:00
toyowata 72e8241ee0 [HAL LPC408x] Fix mask bits for SPI clock rate 2017-08-09 16:51:31 +09:00
toyowata cb9b2b0456 [HAL LPC13xx] Fix mask bits for SPI clock rate 2017-08-09 16:51:31 +09:00
toyowata db2da2e932 [HAL LPC11xx_11Cxx] Fix mask bits for SPI clock rate 2017-08-09 16:51:31 +09:00
toyowata aa334b0d3e [HAL LPC11Uxx] Fix mask bits for SPI clock rate 2017-08-09 16:51:31 +09:00
toyowata fdc071d5e8 [HAL LPC11U6x] Fix mask bits for SPI clock rate 2017-08-09 16:51:31 +09:00
toyowata 9ad17b21a2 [HAL LPC176x] Fix mask bits for SPI clock rate 2017-08-09 16:51:31 +09:00
Martin Kojtal c8d43aeb2d LPC MCUXpresso: fix write_fill argument for block write function
The latest HAL extension was not applied to the LPC MCUXpresso targets.
2017-07-25 10:26:40 +01:00
Jimmy Brisson 1f94ede86c Merge pull request #4744 from deepikabhavnani/spi_issue_4743
Allow user to set default transfer byte for block read
2017-07-24 14:45:30 -05:00
Jimmy Brisson c20154234f Merge pull request #4756 from 0xc0170/fix_4613
Fix #4613: remove duplicated startup files for MICRONFCBOARD
2017-07-24 10:56:57 -05:00
Deepika 1b797e9081 Closed review comments
1. Doxygen and Grammar related
2. Change dummy to spi_fill
3. Remove NXP driver and add default loop in spi block read (same as all
other drivers)
2017-07-21 09:46:22 -05:00
Mahadevan Mahesh 316b859baf LPC: Move platform specific code out of the analog api file
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2017-07-20 13:16:06 -05:00
Mahadevan Mahesh 7d8b6d7684 LPC: Move platform specific code out of sleep api file
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2017-07-20 13:15:59 -05:00
Mahadevan Mahesh dfe2d3ba4c Add support for LPC54608
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2017-07-20 13:15:51 -05:00
Mahadevan Mahesh aee6f7b227 Add mbed support for LPCXpresso54114 board
Signed-off-by: Mahadevan Mahesh <Mahesh.Mahadevan@nxp.com>
2017-07-20 13:15:36 -05:00
Martin Kojtal a7f9dc66b8 Fix #4613: remove duplicated startup files for MICRONFCBOARD
Inherits from LPC11U34_421, that defines startup. They were identical.
2017-07-13 17:03:29 +01:00
Martin Kojtal 10ea63b8e7 Ticker: add fire interrupt now function
fire_interrupt function should be used for events in the past. As we have now
64bit timestamp, we can figure out what is in the past, and ask a target to invoke
an interrupt immediately. The previous attemps in the target HAL tickers were not ideal, as it can wrap around easily (16 or 32 bit counters). This new
functionality should solve this problem.

set_interrupt for tickers in HAL code should not handle anything but the next match interrupt. If it was in the past is handled by the upper layer.

It is possible that we are setting next event to the close future, so once it is set it is already in the past. Therefore we add a check after set interrupt to verify it is in future.
If it is not, we fire interrupt immediately. This results in
two events - first one immediate, correct one. The second one might be scheduled in far future (almost entire ticker range),
that should be discarded.

The specification for the fire_interrupts are:
- should set pending bit for the ticker interrupt (as soon as possible),
the event we are scheduling is already in the past, and we do not want to skip
any events
- no arguments are provided, neither return value, not needed
- ticker should be initialized prior calling this function (no need to check if it is already initialized)

All our targets provide this new functionality, removing old misleading if (timestamp is in the past) checks.
2017-07-13 12:23:25 +01:00
Rob Meades fdf8a7980f Platform support for OnboardCellular modem and u-blox cellular interface drivers. This change allows the u-blox C027 and C030 boards to use both the mbed-os OnboardCellular modem driver and the u-blox cellular interface drivers (which support both PPP and AT data modes). 2017-06-15 14:32:09 +01:00