DAPLink implementation on Cypress kits cannot handle hex files
with 64 bytes per row: refer to https://github.com/ARMmbed/DAPLink,
source/daplink/drag-n-drop/intelhex.c, hex_line_t struct, data field.
Below are the options read from the toolchains/arm
armclang --target=arm-arm-none-eabi -mcpu=list
The following arguments to option 'mcpu' can be selected:
-mcpu=cortex-m0
-mcpu=cortex-m0plus
-mcpu=cortex-m1
-mcpu=cortex-m3
-mcpu=cortex-m4
-mcpu=cortex-m7
-mcpu=cortex-m23
-mcpu=cortex-m33
...
armlink --cpu=list
The following arguments to option 'cpu' can be selected:
--cpu=Cortex-M0
--cpu=Cortex-M0plus
--cpu=Cortex-M1
--cpu=Cortex-M1.os_extension
--cpu=Cortex-M1.no_os_extension
--cpu=Cortex-M4
--cpu=Cortex-M4.no_fp
--cpu=Cortex-M7
--cpu=Cortex-M7.fp.sp
--cpu=Cortex-M7.no_fp
--cpu=Cortex-M23
--cpu=Cortex-M33
--cpu=Cortex-M33.no_fp
--cpu=Cortex-M33.no_dsp
--cpu=Cortex-M33.no_dsp.no_fp
...
armclang --target=arm-arm-none-eabi -mfpu=list
The following arguments to option 'mfpu' can be selected:
-mfpu=fpv4-sp-d16
-mfpu=fpv5-sp-d16
-mfpu=fpv5-d16
...
Rename the existing PSoC-specific m0_core_img key in targets.json
as a more generic hex_filename key. Update makefile exporter to select
the subset of resources.hex_files matching the hex_filename value.
Without this fix, multiple prebuilt CM0+ hex files are found in the
target resources and erroneously passed to the srec_cat tool.
The fix is generic so other targets that need post-build hex merging
can use this key to pass the correct image to srecord tool.
The fix also removes sub_target key: instead, rely hex_filename json
key to detect if the hex image merging needs to be done.
The sub_target is not used in mbed-os codebase for anything else.
It is possible to override the hex file name in mbed_app.json:
{
"target_overrides": {
"*": {
"target.hex_filename": "my_custom_m0_image.hex"
}
}
Replace hard-coded numeric offsets of PSoC 6 hex file sections
with sensible constants.
Do not attempt to update the checksum and metadata contents
if the sections are not found in the original HEX file.
PSoC 6 hex files contain 4-byte chip ID at virtual offset 0x90500002
added by PSoC Creator or cymcuelftool from .cymeta ELF section.
merge_images compares chip ID in CM0+ and CM4 hex files and raises
an exception in case of mismatch. Chip ID is different for each MPN
(for example, 0xE2072100 for CY8C6347BZI-BLD53 and 0xE2062100 for
CY8C6247BZI-D54). CM0+ prebuilt images target CY8C6347BZI-BLD53
but should be compatible with other PSoC6 MPNs.
Remove the check to enable merging CM0+ images with CM4 applications
built for different MPNs, with empty or absent cymetadata.
Main thread in Mbed OS is statically allocated and was not available in call
stack of Keil MDK. The RTX5 kernel requires statically allocated thread
information objects that are placed into a specific section to enable RTOS
thread awareness in Keil MDK. This fix is to keep main thread in specific
section of memory.
This is for OS2 testing. Previously, targets that were configured with
the option "default_toolchain": "uARM" would still build to a
TOOLCHAIN_ARM_STD directory. This fixes these targets to build into
TOOLCHAIN_ARM_MICRO.
The DEVICE_FOO macros are always defined (either 0 or 1).
This patch replaces any instances of a define check on a DEVICE_FOO
macro with value test instead.
Signed-off-by: Alastair D'Silva <alastair@d-silva.org>
For binary compatibility with ARMC5, use the hard ABI variant whenever
we have FP hardware - this is ARMC5's default behaviour, which we do not
override.
Cortex-M4F was already using hard; this brings M7F and M33F into line.
### Description
PR #8607 will cause problems for the NRF52832 and the NRF52840
in the online compiler starting with 5.10.2. This PR prevents this problem
by using a toggle in `targets.json` to enable these new defines for every
target except for the NRF52832 and NRF52840.
### Pull request type
[x] Fix
[ ] Refactor
[ ] Target update
[ ] Functionality change
[ ] Docs update
[ ] Test update
[ ] Breaking change
This covers the case when a macro is set with the same name as a
parameter. Previously, the macro would be repeated on the command line,
which causes certain toolchains to break (ex. IAR assembler). Now the
config system will override the parameter's value with the macro's
value.
IAR 8 linker map puts C++14-style apostrophe digit separators in its
addresses, such as:
.data inited 0x2000'1ff0 0x4 mbed_rtx_idle.o [159]
Extend the regex pattern to allow this.
* Modify linker scripts to be compatible with bootloader and PSA
* Add memory protection
* Modify original post-build step to allow link with PSA binaries
* Config kvstore for ITS on FUTURE_SEQUANA_PSA
* Enable PSA-Crypto on PSoC6 with NVSeed
Volodymyr Medvid
deepikabhavnani
Ari Parkkila
Cruz Monrreal
Mahesh Mahadevan
Kevin Gilbert
Martin Kojtal
Amir Cohen
jeromecoutant
Andriy.Lishchynskyi
Michal Paszta
Seppo Takalo
Qinghao Shi
Naveen Kaje
Garrett
Kevin Bracey
kegilbert
Michael Schwarcz
Brian Daniels
Senthil Ramakrishnan
Alastair D'Silva
Anna Bridge
Jimmy Brisson
Jenny Plunkett
Oren Cohen