Exporter hooks removed completely.
Cleanup and improvements to the comments, including removal of the redundant doxygen comments.
Code run through astyle. Additionally:
- changes to drivers/Timer.cpp reverted
- ipcpipe_transport.* files removed as they are not used for now,
- fixed condition in stdio_init.cpp to perform serial initialization only when STDIO is enabled,
- added missing resurce manager call in PWM initialization,
- us_ticker initialization changed to use pre-reserved clock divider (to avoid resource manager call).
Changed reporting level from info to debug in PSOC6.py.
Added missing includes for function declarations in startup files.
Fixed (removed) garbadge text in psoc6_utils.c
Precompiled binaries updated for recent changes in psoc6_utils.c and moved to a separate folder; README and LICENSE files added.
1. In drivers/Timer.cpp make sure that hardware timer is initialized outside of critical section.
This is because on PSoC 6 hardware resources are shared between both cores
and we have to make sure that the other core is not already using a particular resource.
This mechanism is based on interprocessor communication taht cannot be handled iside of
critical section.
2. Added support for post-binary hook function for PSoC 6 targets, so the hex image for M0+ CPU core
can be merged with M4 core image for the final image.
3. Added possibility to use hook function from exportes, so the M0+ hex image could be included
in the generated project.
4. Included hex images in the build dependency list, so the update of image is catched by the
build process.
### Description
Noticed by the online compiler:
When a user has an incomplete target definition, the error is not show
to the user. That's because it's reported as a `KeyError`. This PR adds
an outer `NotSupportedException` so that the outer catch statement knows
that this is not a build system crash, but a user error.
### Pull request type
[x] Fix
[ ] Refactor
[ ] Target update
[ ] Functionality change
[ ] Breaking change
### Description
The NRF51 post build hook finds it's hex files using the Resources
object. This PR fixes the corner case where the hex files within a
project have a name!=path (This really only happens online).
### Pull request type
[x] Fix
[ ] Refactor
[ ] Target update
[ ] Functionality change
[ ] Breaking change
1. move ota region 1 from 0x00b000 to 0x040000
2. move ota region 2 from 0x0c0000 to 0x120000
3. refactor bootloader header as follows:
uint32_t tag;
uint32_t ver;
uint64_t timestamp;
uint32_t size;
uint8_t hash[32];
uint8_t campaign[16];
uint32_t crc32;
where,
a. hash is the sha256 checksum of the payload.
b. crc32 is the crc32 checksum of headers from tag to campaign.
4. Call NVIC_SystemReset for soft reset.
Signed-off-by: Tony Wu <tung7970@gmail.com>
Use TOOLCHAIN_PATHS to locate toolchain binaries for users might set
compiler paths, through mbed_settings.py, env vars, or system path.
Signed-off-by: Tony Wu <tonywu@realtek.com>
When the RTOS is present and the tickless mode is not implemented, it is
expected that the next tick issued by the Systick timer will wake up the MCU.
However nothing prevents an implementation of the ARM architecture to gate the
systick clock signal upon sleep entry.
Therefore on those targets sleep shall be prohibited if the RTOS is present and the
tickless mode is not implemented.
To ease life of porters , a new option has been added in the device add list:
STCLK_OF_DURING_SLEEP. This option expose that the target turn of the systick
clock during sleep.
Targets which exhibit such behavior shall add this define in their device_has list.
Update directory structure to include RTX for only cortex targets, and
for all cortex targets. This patch accomplishes this by moving mbed-os
specific RTX files and RTX itself into rtos/TARGET_CORTEX along with
removing TARGET_CORTEX_M from the RTX5 directory.
The old directory structure:
rtos/rtx5/<mbed-os specific RTX files>
rtos/rtx5/TARGET_CORTEX_M/*
rtos/rtx4/*
rtos/<mbed-os specific RTX files>
Is re-arranged to:
rtos/TARGET_CORTEX/rtx5/*
rtos/TARGET_CORTEX/rtx4/*
rtos/TARGET_CORTEX/<mbed-os specific rtx files>
This both encapsulates RTX code more cleanly and makes it easier to
experiment with non-cortex cmsis-os2 backends, such as a posix
based cmsis-os2 backend.
Note - A potentially better name for the CORTEX_M directory would be
something like FEATURE_RTX5 since this directory only contains RTX5
related files. This cannot be done because there is not an easy way
to turn this feature on, since it cannot be done from mbed_lib.json.
1. Rearrange SDRAM and SRAM layout. Move timing critical code to SRAM,
and the rest to SDRAM.
2. Add bootloader that's capable of FOTA over mbed cloud.
Signed-off-by: Tony Wu <tonywu@realtek.com>
jeromecoutant
Leszek Rusinowicz
Jimmy Brisson
Cruz Monrreal
Russ Butler
Oren Cohen
Martin Kojtal
Bartek Szatkowski
Cruz Monrreal
drewcassidy
Ashok Rao
chrisyang
Tony Wu
Anna Bridge
Vincent Coubard
Deepika
Yuguo Zou
Tony Wu
jacobjohnson-ON