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rtl8195am - fix ARMCC SRAM + SDRAM porting 

Signed-off-by: Tony Wu <tonywu@realtek.com>
pull/4665/head
Tony Wu 2017-08-01 15:00:40 +08:00 committed by Yuguo Zou
parent d1c87347af
commit 35d7ca27be
5 changed files with 80 additions and 96 deletions
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86
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/rtl8195a.sct
View File

@ -1,55 +1,57 @@
; *************************************************************
; *** Scatter-Loading Description File for RTL8195A ***
; *************************************************************
LR_ROM 0x00000000 0x00030000{
_ROM_CODE 0x00000000 0x00030000 {
;*.o (RESET, +First)
;*(InRoot$$Sections)
}
}
; Realtek Semiconductor Corp.
;
; RTL8195A ARMCC Scatter File
;
; MEMORY
; {
; SROM (rx) : ORIGIN = 0x10000000, LENGTH = 0x00007000
; SRAM (rwx) : ORIGIN = 0x10007000, LENGTH = 0x00070000 - 0x00007000
; TCM (rwx) : ORIGIN = 0x1FFF0000, LENGTH = 0x00010000
; DRAM (rwx) : ORIGIN = 0x30000000, LENGTH = 2M
; }
LR_RAM 0x10006000 0x6FFFF {
;LR_RAM 0x10000000 0x6FFFF {
;ROM_BSS 0x10000000 0x0005FFF{
;rtl_console.o(.mon.ram.bss*)
;}
.image2.table 0x10006000 FIXED {
rtl8195a_init.o(.image2.ram.data*)
rtl8195a_init.o(.image2.validate.rodata*)
}
.text +0 FIXED{
rtl8195a_init.o(.infra.ram.start)
;*.o(.mon.ram.text*)
;*.o(.hal.flash.text*)
;*.o(.hal.sdrc.text*)
;*.o(.hal.gpio.text*)
;*.o(.text*)
;*.o(.rodata*)
.ANY (+RO)
LR_IRAM 0x10007000 (0x70000 - 0x7000) {
IMAGE2_TABLE 0x10007000 FIXED {
*rtl8195a_init.o(.image2.ram.data*, +FIRST)
*rtl8195a_init.o(.image2.validate.rodata*)
}
.data +0 FIXED{
.ANY (+RW)
ER_IRAM +0 FIXED {
*rtl8195a_crypto.o(.text*, .rodata*)
*mbedtls*.o(.text*, .rodata*)
libc.a: (.text*, .rodata*)
}
RW_IRAM1 +0 UNINIT FIXED {
.ANY (+ZI)
*rtl8195a_crypto.o(.data*)
*mbedtls*.o(.data*)
libc.a: (.data*)
*(.sdram.data*)
}
RW_IRAM2 +0 UNINIT FIXED {
*rtl8195a_crypto.o(.bss*, COMMON)
*mbedtls*.o(.bss*, COMMON)
libc.a: (.bss*, COMMON)
*(.bss.thread_stack_main)
}
ARM_LIB_STACK (0x10070000 - 0x1000) EMPTY 0x1000 {
}
}
TCM_OVERLAY 0x1FFF0000 0x10000{
lwip_mem.o(.bss*)
lwip_memp.o(.bss*)
*.o(.tcm.heap*)
LR_DRAM 0x30000000 0x200000 {
ER_DRAM +0 FIXED {
.ANY (+RO)
}
RW_DRAM1 +0 UNINIT FIXED {
.ANY (+RW)
}
RW_DRAM2 +0 UNINIT FIXED {
.ANY (+ZI)
}
}
LR_DRAM 0x30000000 0x1FFFFF{
_DRAM_CODE 0x30000000 0x1FFFFF{
*.o(.text*)
}
}

42
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/TOOLCHAIN_ARM_STD/sys.cpp
View File

@ -1,46 +1,24 @@
/******************************************************************************
* Copyright (c) 2013-2016 Realtek Semiconductor Corp.
/* mbed Microcontroller Library - stackheap
* Copyright (C) 2009-2011 ARM Limited. All rights reserved.
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
******************************************************************************
* mbed Microcontroller Library - stackheap
* Setup a fixed single stack/heap memory model,
* between the top of the RW/ZI region and the stackpointer
******************************************************************************/
* Setup a fixed single stack/heap memory model,
* between the top of the RW/ZI region and the stackpointer
*/
#ifdef __cplusplus
extern "C" {
#endif
#endif
#include <rt_misc.h>
#include <stdint.h>
extern char Image$$RW_IRAM1$$ZI$$Limit[];
extern char Image$$RW_IRAM2$$ZI$$Limit[];
extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_t R0, uint32_t R1, uint32_t R2, uint32_t R3) {
uint32_t zi_limit = (uint32_t)Image$$RW_IRAM1$$ZI$$Limit;
uint32_t zi_limit = (uint32_t)Image$$RW_IRAM2$$ZI$$Limit;
uint32_t sp_limit = __current_sp();
zi_limit = (zi_limit + 7) & ~0x7; // ensure zi_limit is 8-byte aligned
//push down stack pointer to recycle some of the stack space that are not use in future
__asm volatile
(
"MRS IP, MSP \n"
"ADD IP, #64 \n"
"BIC IP, IP, #7 \n"
"MSR MSP, IP \n"
);
struct __initial_stackheap r;
r.heap_base = zi_limit;
r.heap_limit = sp_limit;
@ -49,4 +27,4 @@ extern __value_in_regs struct __initial_stackheap __user_setup_stackheap(uint32_
#ifdef __cplusplus
}
#endif
#endif

18
targets/TARGET_Realtek/TARGET_AMEBA/TARGET_RTL8195A/device/rtl8195a_init.c
View File

@ -28,10 +28,14 @@
(defined (__ARMCC_VERSION) && __ARMCC_VERSION >= 6010050)
extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Limit;
extern uint8_t Image$$RW_IRAM1$$ZI$$Base[];
extern uint8_t Image$$RW_IRAM1$$ZI$$Limit[];
#define __bss_start__ Image$$RW_IRAM1$$ZI$$Base
#define __bss_end__ Image$$RW_IRAM1$$ZI$$Limit
extern uint8_t Image$$RW_IRAM2$$ZI$$Base[];
extern uint8_t Image$$RW_IRAM2$$ZI$$Limit[];
extern uint8_t Image$$RW_DRAM2$$ZI$$Base[];
extern uint8_t Image$$RW_DRAM2$$ZI$$Limit[];
#define __bss_sram_start__ Image$$RW_IRAM2$$ZI$$Base
#define __bss_sram_end__ Image$$RW_IRAM2$$ZI$$Limit
#define __bss_dram_start__ Image$$RW_DRAM2$$ZI$$Base
#define __bss_dram_end__ Image$$RW_DRAM2$$ZI$$Limit
#elif defined (__ICCARM__)
@ -181,11 +185,11 @@ void PLAT_Start(void)
#endif
// Clear RAM BSS
#if defined (__ICCARM__) || defined (__CC_ARM)
#if defined (__ICCARM__)
__memset((void *)__bss_start__, 0, __bss_end__ - __bss_start__);
#else
__memset((void *)__bss_sram1_start__, 0, __bss_sram1_end__ - __bss_sram1_start__);
__memset((void *)__bss_sram2_start__, 0, __bss_sram2_end__ - __bss_sram2_start__);
__memset((void *)__bss_sram_start__, 0, __bss_sram_end__ - __bss_sram_start__);
__memset((void *)__bss_dram_start__, 0, __bss_dram_end__ - __bss_dram_start__);
#endif
#if defined (__CC_ARM)

13
targets/TARGET_Realtek/mbed_rtx.h
View File

@ -21,16 +21,14 @@
#include "rtl8195a.h"
#if defined(__CC_ARM)
#ifdef CONFIG_RTL8195A
#define INITIAL_SP 0x10070000
#define ISR_STACK_START 0x1FFFEFFC
#else
#ERROR "NOT SUPPORT NOW"
#endif
extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Base[];
extern uint32_t Image$$ARM_LIB_STACK$$ZI$$Length[];
#define ISR_STACK_START (unsigned char *)(Image$$ARM_LIB_STACK$$ZI$$Base)
#define ISR_STACK_SIZE (uint32_t)(Image$$ARM_LIB_STACK$$ZI$$Length)
#define INITIAL_SP (uint32_t)(Image$$ARM_LIB_STACK$$ZI$$Base)
#elif defined(__GNUC__)
extern uint32_t __StackTop[];
extern uint32_t __StackLimit[];
// extern uint32_t __end__[];
extern uint32_t __HeapLimit[];
#define INITIAL_SP (__StackTop)
#endif
@ -54,4 +52,3 @@
#endif
#endif

17
tools/targets/REALTEK_RTL8195AM.py
View File

@ -6,6 +6,7 @@ RTL8195A elf2bin script
import sys, array, struct, os, re, subprocess
import hashlib
import shutil
from tools.paths import TOOLS_BOOTLOADERS
from datetime import datetime
@ -59,6 +60,9 @@ def get_version_by_time():
secs = int((datetime.now()-datetime(2016,11,1)).total_seconds())
return RAM2_VER + secs
# ----------------------------
# main function
# ----------------------------
def prepend(image, entry, segment, image_ram2, image_ota):
# parse input arguments
@ -226,13 +230,6 @@ def parse_load_segment(toolchain, image_elf):
def write_load_segment(image_elf, image_bin, segment):
file_elf = open(image_elf, "rb")
#delete folder with same name when using ARMCC
if os.path.isfile(image_bin):
pass
else:
for i in os.listdir(image_bin):
os.remove(os.path.join(image_bin, i))
os.removedirs(image_bin)
file_bin = open(image_bin, "wb")
for (offset, addr, size) in segment:
file_elf.seek(offset)
@ -248,6 +245,12 @@ def write_load_segment(image_elf, image_bin, segment):
# main function
# ----------------------------
def rtl8195a_elf2bin(t_self, image_elf, image_bin):
# remove target binary file/path
if os.path.isfile(image_bin):
os.remove(image_bin)
else:
shutil.rmtree(image_bin)
segment = parse_load_segment(t_self.name, image_elf)
write_load_segment(image_elf, image_bin, segment)