The osKernelGetTickCount() is the only function to get kernel tick information,
however it's not allowed to access in ISR.
It's already enabled in API v2.1.1.
Some Cortex-M0 devices, such as the nrf51, don't have the SysTick.
Instead, these targets use a software interrupt to simulate SysTick.
Add the hooks in the tickless code to support these devices. Targets
which do not have SysTick should now define NO_SYSTICK in targets.json
and implement mbed_get_m0_tick_irqn to add os suport.
This patch also removes os tick handling from the existing devices
(nrf51) since this is now handled in common code.
Add support for tickless by replacing RTX's SysTick timer code with
with code which uses an mbed timer along with suspending and
resuming the kernel in the idle loop. Tickless is enabled on a
per-target basis by defining the macro MBED_TICKLESS.
Make calls to cmsis-os to get thread state, stack size, and max stack
usage rather than accessing internal RTX data directly. Wrap RTX5
specific code in OS_BACKEND_RTX5.
Also refactor the code to use mbed types rather than RTX types:
os_timer_t -> mbed_rtos_storage_timer_t
os_event_flags_t -> mbed_rtos_storage_event_flags_t
osRtxMutex_t -> mbed_rtos_storage_thread_t
Update directory structure to include RTX for only cortex targets, and
for all cortex targets. This patch accomplishes this by moving mbed-os
specific RTX files and RTX itself into rtos/TARGET_CORTEX along with
removing TARGET_CORTEX_M from the RTX5 directory.
The old directory structure:
rtos/rtx5/<mbed-os specific RTX files>
rtos/rtx5/TARGET_CORTEX_M/*
rtos/rtx4/*
rtos/<mbed-os specific RTX files>
Is re-arranged to:
rtos/TARGET_CORTEX/rtx5/*
rtos/TARGET_CORTEX/rtx4/*
rtos/TARGET_CORTEX/<mbed-os specific rtx files>
This both encapsulates RTX code more cleanly and makes it easier to
experiment with non-cortex cmsis-os2 backends, such as a posix
based cmsis-os2 backend.
Note - A potentially better name for the CORTEX_M directory would be
something like FEATURE_RTX5 since this directory only contains RTX5
related files. This cannot be done because there is not an easy way
to turn this feature on, since it cannot be done from mbed_lib.json.
Provide fix for pool buffer size: pool block size must be
a multiple of 4 bytes.
Add assertion to forbid creation of MemoryPool object with queue size equal to 0.
Update description of free() function. Add information about
statuses returned by this function.
The prev-pointer of the running threads mutex list was not set when
multiple mutexes are acquired at a time. This leads to a corrupted list
if the mutexes are not freed in reversed order.
Original commit for CMSIS_5:
commit 729f6ab08540342b7de7612fac103539d5b2f168
Author: Jonatan Antoni <jonatan.antoni@arm.com>
Date: Wed Apr 19 15:38:43 2017 +0200
Before rtx 5, the max count on semaphores was UINT16_MAX, aftewards it
was decreased to 1024 with an assert on overflow.
This is especially problematic for semaphores used for signaling, since
there is no replacement currently available in C++.
The stack required for the idle thread is highly dependent on the
target because it will call the sleep function which is target
specific.
While 256 bytes of stack is enough for most targets, others like the
NRF52840 might require more.
With this change, target maintainers can specify the idle thread stack
size in their mbed_rtx.h file.
uVisor doesn't set the PSP of the target thread. The RTOS sets the PSP
of the target thread from the target thread's TCB. However, when
interrupts of higher priority than PendSV happen between the call to
uVisor to switch boxes, and the RTOS setting PSP, the uVisor vIRQ
interrupt handler will attempt to use an invalid PSP (the PSP from
before the box and thread switch). This leads to a crash. Make box and
thread switching atomic by disabling interrupts immediately before the
box switching until immediately after the new PSP is set.
Add the attribute flash to enable priority inheritance and robust mode.
The robust flag allows mutexes held by terminated threads to be
properly released.
Wrap the file mbed_rtos_storage.h in extern "C". This allows the
functions inside rtx_lib.h to have correct definitions when included
in a C++ file.
This is required for the RTX5 error trapping.
OsEventObserver objects expect a context to be maintained per thread on
their behalf. Add this context to the thread control block and extend
the thread creation functions with the ability to supply a context.
Add the OsEventObserver mechanism. A client interested in receiving
notifications on certain OS events can register to receive notifications
with osRegisterForOsEvents. This is useful for clients like the secure
memory allocator, which observes thread switching events in order to
swap in and out different memory allocator objects.
Remove the RTOS and CMSIS files in preperation for CMSIS 5. Note that
the RTOS heap ad stack test is left since this is still applicable to
RTX5. This file can be found here:
rtos\rtx\TARGET_CORTEX_M\TESTS\memory\heap_and_stack\main.cpp
If the free memory on a device is small enough then the calculation to
determine heap size could underflow to a large value. If this happens
then malloc will never return failure and instead will cause a crash on
allocation. This patch prevents the underflow so malloc works as
expected even with low amounts of free memory.
Calling Thread::start multiple times leads to undefined behavior since
the Thread class was not designed to handle being restarted. Return an
error code if Thread::start is called a second time to prevent this
behavior.
In CI, I receive an mbed assert of stack stats by running the following commands. Its assert is TIMEOUT.
mbed test -m RZ_A1H -t GCC_ARM -DMBED_STACK_STATS_ENABLED=1 --clean --compile
mbed test -m RZ_A1H -t GCC_ARM --run -n tests-mbed_drivers-stl_features -v
So, I fixed the process of related to stack stats (osThreadInfoStackMax).The Detail contents is here.
https://github.com/ARMmbed/mbed-os/issues/3273#issuecomment-268407191
* [RZ/A1H]Support RTX v4.80 for Cortex-A and a few Malloc API
PR to update RTX to v4.80 for Cortex-A.
In the latest CI test, three tests result in an error. The cause is mainly three points
- Unsupport RTX v4.80 for Cortex-A
- Insufficient stack size of thread defined in test
- A few Lack of Malloc API in GCC
Therefore, I supported to these. For the stack size for test, @Russ already supported in PR #3362.
Reference for issue of test error is here.
https://github.com/ARMmbed/mbed-os/issues/3273
Reference for PR to update RTX for Cortex-M.
https://github.com/ARMmbed/mbed-os/pull/1702
* Revert "[RZ/A1H]Support RTX v4.80 for Cortex-A and a few Malloc API"
This reverts commit e71f79aaf2.
* [RZ/A1H]Support RTX v4.80 for Cortex-A and a few Malloc API
PR to update RTX to v4.80 for Cortex-A.
In the latest CI test, three tests result in an error. The cause is mainly three points
- Unsupport RTX v4.80 for Cortex-A
- Insufficient stack size of thread defined in test
- A few Lack of Malloc API in GCC
Therefore, I supported to these. For the stack size for test, @c1728p9 already supported in PR #3362.
Reference for issue of test error is here.
https://github.com/ARMmbed/mbed-os/issues/3273
Reference for PR to update RTX for Cortex-M.
https://github.com/ARMmbed/mbed-os/pull/1702
Jimmy Brisson
Maciej Bocianski
Martin Kojtal
YarivCol
Anna Bridge
Deepika
Jaeden Amero
Viller Hsiao
Russ Butler
Russ Butler
Filip Jagodzinski
Przemyslaw Stekiel
Bartek Szatkowski
Kevin Gilbert
Vincent Coubard
Christopher Haster
Bartosz Szatkowski
Yuguo Zou
Russ Butler
Sam Grove
Wolfgang Betz
TomoYamanaka