mirror of https://github.com/ARMmbed/mbed-os.git
Replaced older version of assembly file with 2016-2017 version from RTX
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@ -1,5 +1,5 @@
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;/*
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; * Copyright (c) 2016 ARM Limited. All rights reserved.
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; * Copyright (c) 2016-2017 ARM Limited. All rights reserved.
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; *
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; * SPDX-License-Identifier: Apache-2.0
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; *
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@ -27,7 +27,7 @@ I_T_RUN_OFS EQU 28 ; osInfo.thread.run offset
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TCB_SM_OFS EQU 48 ; TCB.stack_mem offset
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TCB_SP_OFS EQU 56 ; TCB.SP offset
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TCB_SF_OFS EQU 34 ; TCB.stack_frame offset
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TCB_TZM_OFS EQU 60 ; TCB.tz_memory offset
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TCB_TZM_OFS EQU 64 ; TCB.tz_memory offset
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PRESERVE8
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@ -35,8 +35,8 @@ TCB_TZM_OFS EQU 60 ; TCB.tz_memory offset
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AREA |.constdata|, DATA, READONLY
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EXPORT os_irq_cm
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os_irq_cm DCB 0 ; Non weak library reference
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EXPORT irqRtxLib
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irqRtxLib DCB 0 ; Non weak library reference
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AREA |.text|, CODE, READONLY
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@ -44,8 +44,8 @@ os_irq_cm DCB 0 ; Non weak library reference
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SVC_Handler PROC
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EXPORT SVC_Handler
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IMPORT os_UserSVC_Table
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IMPORT os_Info
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IMPORT osRtxUserSVC
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IMPORT osRtxInfo
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#ifdef __DOMAIN_NS
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IMPORT TZ_LoadContext_S
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IMPORT TZ_StoreContext_S
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@ -66,8 +66,8 @@ SVC_Handler PROC
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MOV LR,R3 ; Set EXC_RETURN
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SVC_Context
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LDR R3,=os_Info+I_T_RUN_OFS; Load address of os_Info.run
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LDMIA R3!,{R1,R2} ; Load os_Info.thread.run: curr & next
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LDR R3,=osRtxInfo+I_T_RUN_OFS; Load address of osRtxInfo.run
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LDMIA R3!,{R1,R2} ; Load osRtxInfo.thread.run: curr & next
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CMP R1,R2 ; Check if thread switch is required
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BEQ SVC_Exit ; Branch when threads are the same
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@ -102,7 +102,7 @@ SVC_ContextSave2
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SVC_ContextSwitch
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SUBS R3,R3,#8 ; Adjust address
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STR R2,[R3] ; os_Info.thread.run: curr = next
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STR R2,[R3] ; osRtxInfo.thread.run: curr = next
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SVC_ContextRestore
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#ifdef __DOMAIN_NS
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@ -150,7 +150,7 @@ SVC_Exit
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SVC_User
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PUSH {R4,LR} ; Save registers
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LDR R2,=os_UserSVC_Table ; Load address of SVC table
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LDR R2,=osRtxUserSVC ; Load address of SVC table
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LDR R3,[R2] ; Load SVC maximum number
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CMP R1,R3 ; Check SVC number range
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BHI SVC_Done ; Branch if out of range
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@ -172,10 +172,10 @@ SVC_Done
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PendSV_Handler PROC
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EXPORT PendSV_Handler
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IMPORT os_PendSV_Handler
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IMPORT osRtxPendSV_Handler
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PUSH {R0,LR} ; Save EXC_RETURN
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BL os_PendSV_Handler ; Call os_PendSV_Handler
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BL osRtxPendSV_Handler ; Call osRtxPendSV_Handler
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POP {R0,R1} ; Restore EXC_RETURN
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MOV LR,R1 ; Set EXC_RETURN
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B Sys_Context
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@ -186,10 +186,10 @@ PendSV_Handler PROC
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SysTick_Handler PROC
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EXPORT SysTick_Handler
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IMPORT os_Tick_Handler
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IMPORT osRtxTick_Handler
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PUSH {R0,LR} ; Save EXC_RETURN
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BL os_Tick_Handler ; Call os_Tick_Handler
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BL osRtxTick_Handler ; Call osRtxTick_Handler
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POP {R0,R1} ; Restore EXC_RETURN
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MOV LR,R1 ; Set EXC_RETURN
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B Sys_Context
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@ -200,14 +200,14 @@ SysTick_Handler PROC
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Sys_Context PROC
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EXPORT Sys_Context
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IMPORT os_Info
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IMPORT osRtxInfo
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#ifdef __DOMAIN_NS
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IMPORT TZ_LoadContext_S
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IMPORT TZ_StoreContext_S
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#endif
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LDR R3,=os_Info+I_T_RUN_OFS; Load address of os_Info.run
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LDM R3!,{R1,R2} ; Load os_Info.thread.run: curr & next
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LDR R3,=osRtxInfo+I_T_RUN_OFS; Load address of osRtxInfo.run
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LDM R3!,{R1,R2} ; Load osRtxInfo.thread.run: curr & next
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CMP R1,R2 ; Check if thread switch is required
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BEQ Sys_ContextExit ; Branch when threads are the same
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@ -245,7 +245,7 @@ Sys_ContextSave2
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Sys_ContextSwitch
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SUBS R3,R3,#8 ; Adjust address
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STR R2,[R3] ; os_Info.run: curr = next
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STR R2,[R3] ; osRtxInfo.run: curr = next
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Sys_ContextRestore
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#ifdef __DOMAIN_NS
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