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6453 Commits (77852199cf72ec7f4747b305c71d81ce3616d7a1)

Author SHA1 Message Date
Eduardo Avelar 77852199cf
fix targets device_name with nrf51822 32K SoC 
nrf51822 32K SoC corresponds to device name nRF51822_xxAC
 2020-02-16 20:24:07 -08:00
Martin Kojtal a8188bfd4d
Merge pull request #12166 from hugueskamba/hk-baremetal-NRF52840_DK-fix 
NRF52840_DK: Fix baremetal linker error
 2020-02-14 08:21:27 +00:00
Martin Kojtal 7e1443ad47
Merge pull request #12424 from OpenNuvoton/nuvoton_gpio-irq_rtc-lxt 
Nuvoton: Fix GPIO IRQ and RTC
 2020-02-13 15:56:33 +00:00
Martin Kojtal 7383860c57
Merge pull request #12422 from dustin-crossman/pr/cy_asset_update_2-7-20 
Cypress Asset Update
 2020-02-13 10:11:28 +00:00
Martin Kojtal d78e009284
Merge pull request #12411 from soleilplanet/L496AG_port 
add FLASHIAP in targets.json for KVStore used in PDMC
 2020-02-13 09:47:38 +00:00
Martin Kojtal 7658681a9e
Merge pull request #12409 from LMESTM/Fix_lpuart_deep_sleep 
FIX: LPUART clock source selection should be left to serial driver
 2020-02-13 09:45:41 +00:00
Martin Kojtal ffbd8b1994
Merge pull request #12408 from fkjagodzinski/fix-lpc408x_ethernet_api 
LPC408X: Delete the ethernet_api.c files
 2020-02-13 09:45:26 +00:00
Martin Kojtal df6d0729b1
Merge pull request #12407 from mprse/NRF_restricyed_uart_fix 
Disable restricted uart peripheral for NRF52840
 2020-02-13 09:45:16 +00:00
Chun-Chieh Li 769781cfb3 M2351: Update PSA secure image/lib with RTC LXT 2020-02-13 11:24:02 +08:00
Chun-Chieh Li 4c9e0f1fcd M2351: Update non-PSA secure image/lib with RTC LXT 2020-02-13 11:24:02 +08:00
Chun-Chieh Li 9f9ca0acaa M2351: Fix CRYPTO_MODBASE() when crypto module is configured to secure 
This bug results from BSP update:

-   CRPT: Base address of secure or non-secure crypto module, dependent on partition
-   CRPT_S: Base address of secure crypto module
-   CRPT_NS: Base address of non-secured crypto module
 2020-02-13 11:24:02 +08:00
Chun-Chieh Li 834e1aad60 M2351: Fix delay code with RTC clock source 
Explicitly configure RTC clock source to LXT
 2020-02-13 11:24:02 +08:00
Chun-Chieh Li 28495bb075 M2351: Refine gpio_irq_set(...) with inconsistent GPIO_EnableInt(...) implementations 
No logic change
 2020-02-13 11:24:02 +08:00
Chun-Chieh Li 582c08c129 M2351: Refine code layout of PeripheralPins.c 
No logic change
 2020-02-13 11:24:01 +08:00
Chun-Chieh Li 4a1d612e90 Nuvoton: Fix delay code with RTC clock source 
Explicitly configure RTC clock source to LXT

Update targets:

-   NUMAKER_PFM_NANO130
-   NUMAKER_PFM_NUC472
-   NUMAKER_PFM_M453
-   NUMAKER_PFM_M487/NUMAKER_IOT_M487
-   NUMAKER_M252KG
-   NUMAKER_IOT_M263A
 2020-02-13 11:24:01 +08:00
Chun-Chieh Li 86fcae5b03 Nuvoton: Fix GPIO rising/falling edge interrupts cannot exist simultaneously 
This is to pass mbed_hal_fpga_ci_test_shield-gpio_irq test.

Update targets:

-   NUMAKER_PFM_NANO130
-   NUMAKER_PFM_NUC472
-   NUMAKER_PFM_M453
-   NUMAKER_PFM_M487/NUMAKER_IOT_M487
-   NUMAKER_M252KG
-   NUMAKER_IOT_M263A
 2020-02-13 11:24:01 +08:00
Dustin Crossman 563edb294d Store RTC century and RTC state information in persistent BREG register. 2020-02-12 15:05:26 -08:00
Dustin Crossman 3fdb820b26 Update psoc6hal to 1.1.1.11145. 2020-02-12 15:05:16 -08:00
Dustin Crossman a8331c28ce Update psoc6 core_lib to version 1.1.1.11109. 2020-02-12 15:05:05 -08:00
Dustin Crossman 5bd02f866e Update psoc6pdl to version 1.4.1.2240 2020-02-12 15:04:46 -08:00
Alvin Lee 66413d4d4e add FLASHIAP in targets.json for KVStore used in PDMC 2020-02-12 15:11:28 +08:00
Laurent Meunier 3fd071404e FIX: LPUART clock source selection should be left to serial driver 
The clock source selection of LPUART depends on System clocks but also on
the serial baudrate. There is a specific computation done in serial driver
targets/target_STM/serial_api.c

At first start-up the LPUART1 clock selected in SetSysClock was anyway
overridden by the serial driver, so this was of no effect. But in case
of deep sleep SetSysClock is called again, while the driver isn't, so
SetSyClock was corrupting the serial clock configuration.

So let's remove these few lines of code which are causing trouble.
 2020-02-11 17:14:45 +01:00
Martin Kojtal 8e522056a0
Merge pull request #12404 from OpenNuvoton/nuvoton_m2351_bsp 
M2351: Update BSP and bugfix
 2020-02-11 15:43:10 +00:00
Filip Jagodzinski fc36b9594c LPC408X: Delete the ethernet_api.c files 
Remove an obsolete HAL implementation from LPC408X to fix the GCC_ARM
build with the "-flto" flag.

With the lto enabled, unreferenced buffers defined in ethernet_api.c
were not excluded at link time overflowing the 16kB peripheral SRAM1
(ld error: "section '.AHBSRAM1' will not fit in region 'ETH_RAM'").

The Ethernet HAL API is deprecated in favor of EMAC.
 2020-02-11 16:34:44 +01:00
Przemyslaw Stekiel d541b461c9 Disable restricted uart peripheral for NRF52840 
While testing it has been found that all tests are skipped in the FPGA uart test on the NRF52840 target.

This is caused by the following change:
https://github.com/ARMmbed/mbed-os/pull/12379 - Add STDIO UART as restricted for FPGA testing for all targets

NRF targets have MUXed pins and mainly do not provide pin-maps. There are only dummy pin-maps for testing.
These pin-maps hold only pins and do not specify the peripheral or function of the pin (always 0). Because of that if we restrict STDIO uart peripheral (0) all FPGA uart test cases will be skipped.
To fix this we will remove this restriction for NRF52840. Restriction for testing the USBTX, USBRX pins is sufficient in this case.
 2020-02-11 15:24:17 +01:00
Martin Kojtal c1eaf2c358
Merge pull request #12380 from mprse/DISCO_L475VG_IOT01A_add_gpio_pinmap 
DISCO_L475VG_IOT01A: Add a list of restricted GPIO pins for testing
 2020-02-11 11:58:53 +00:00
Martin Kojtal a745525a54
Merge pull request #12342 from fkjagodzinski/fix-nxp-hal_fpga 
LPC55S69: Fix UART & GPIO HAL to pass FPGA CI test shield tests
 2020-02-11 11:03:22 +00:00
Martin Kojtal d3078a39b1
Merge pull request #12379 from mprse/STDIO_UART_restricted_all 
Add STDIO UART as restricted for FPGA testing for all targets and support for restricting GPIO
 2020-02-11 10:20:25 +00:00
Martin Kojtal 4ec6228e70
Merge pull request #12393 from GaborAbonyi/musca_a1_linker_fix 
Fix Musca-A1 gcc linker
 2020-02-11 08:31:39 +00:00
Hugues Kamba 65fbee1d33 NRF52840_DK: Fix baremetal linker error 
Compile in the inclusion of cryptocell310 only if the library is included
in the build
 2020-02-10 15:18:46 +00:00
Martin Kojtal a8e87236de
Merge pull request #12368 from mprse/NRF_Serial_Fpga_fix 
Fix NRF52840_DK UART driver and adapt FPGA test
 2020-02-10 14:26:31 +00:00
Martin Kojtal 88438dfd6c
Merge pull request #12394 from miteshdedhia7/pr/bug-fix-misc 
Fix SDIO communication issue on Cypress 1M boards and other minor fixes
 2020-02-10 14:05:11 +00:00
Martin Kojtal 7fd5119b89
Merge pull request #12341 from fkjagodzinski/fix-stm-hal_fpga 
STM32L4: Fix the UART RX & TX data reg bitmasks
 2020-02-10 13:21:31 +00:00
Chun-Chieh Li 3d9c7b2519 M2351: Update PSA secure image/lib with BSP update 2020-02-10 18:37:30 +08:00
Chun-Chieh Li ee8236b22e M2351: Update non-PSA secure image/lib with BSP update 2020-02-10 17:50:15 +08:00
Chun-Chieh Li 6f793fbb5a M2351: Fix GPIO rising/falling edge interrupts cannot exist simultaneously 2020-02-10 17:44:55 +08:00
Chun-Chieh Li a2c9ae6b7d M2351: Update BSP and bugfix 
Align with mainline BSP and fix relevant bugs:

1.  Align with SPI module naming
    (1) Remove SPI5
    (2) Degrade QSPI0 to SPI4 so that it can use for standard SPI
2.  Fix some code lacking GPIO H
3.  Implement __PC(...) by following BSP instead of with MBED_CALLER_ADDR()
4.  Add SCU_IRQHandler(). Change printf(...) with interrupt-safe error(...)
5.  Other minor alignment change
 2020-02-10 16:23:32 +08:00
Chun-Chieh Li 82770d7e2b M2351: Refine PeripheralNames.h 
No logic change and bugfix
 2020-02-10 09:07:13 +08:00
midd df5ac6483b Added a multiplied by 2 in the SDIO clock divider calculation to account for internal UDB divider. 
Note: Fixes issues with intermittent WiFi firmware load failures on CY8CKIT_062_WIFI_BT, CYW943012P6EVB_01, CYW9P62S1_43012EVB_01, CYW9P62S1_43438EVB_01.
 2020-02-07 10:25:24 -08:00
midd 8a986f7dcc Remove wounding for the hardware CRYPTO block. The PSoC 6 MPN CYW9P62S1_43012EVB_01 was revised to add the hardware crypto block. 2020-02-07 10:24:57 -08:00
jeromecoutant 2368a07244 STM32: Fix the UART RX & TX data reg bitmasks 2020-02-07 16:23:50 +00:00
thegecko ff1fc2cd87 Updated 113 targets with missing detect_codes 2020-02-07 16:02:05 +00:00
Gabor Abonyi a5a6912b0e Fix Musca-A1 gcc linker 
Was broken since 3e3af70afc

Signed-off-by: Gabor Abonyi <gabor.abonyi@arm.com>
 2020-02-07 16:33:32 +01:00
Przemyslaw Stekiel a0ff95bed5 LPC55S69: Add restricted GPIO pins for FPGA testing 2020-02-07 13:32:32 +01:00
Filip Jagodzinski 83b7b6d142 LPC55S69: Fix serial IRQ handling 
Check that the RX or TX interrupt is enabled before calling
a registered handler with RxIrq or TxIrq arg.
 2020-02-07 13:32:32 +01:00
Martin Kojtal d847f9f164
Merge pull request #12305 from kivaisan/remove_multi_athandler_support_v2 
Cellular: Remove support for multiple ATHandlers
 2020-02-07 11:00:41 +00:00
Przemyslaw Stekiel 3a71f86235 DISCO_L475VG_IOT01A: Add a list of restricted GPIO pins for testing 2020-02-07 11:41:32 +01:00
Przemyslaw Stekiel a4e1354769 Remove pinmap_restricted_peripherals() function from Nuvoton (STDIO uart is restricted by default) 2020-02-07 10:45:02 +01:00
Martin Kojtal 2719090f93
Merge pull request #12364 from NXPmicro/MXRT1050_Deep_Sleep_Latency 
MIMXRT1050: Update for deep sleep latency
 2020-02-07 09:39:11 +00:00
Filip Jagodzinski ae635d5cd4 STM32L4: Fix the UART RX & TX data reg bitmasks 
The existing logic was insufficient to properly handle odd and even
parity setting, e.g. serial_getc() returned 9-bit data for 8O1
transmission format.
 2020-02-06 14:07:51 +01:00