m-ecry
73493b909a
STM-can-api: Fixed variable name for H7
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- can_frequency uses f instead of hz for can frequency
- Also added comment to system_clock
2020-09-16 17:35:32 +02:00
m-ecry
d0c8ad75e1
STM-can-api: Support reading of remote_msg
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- Previously a received msg was fixed of data_type
2020-09-14 18:10:48 +02:00
m-ecry
13b663397f
STM-can-api: Added usage of prescaler
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- This enables more frequencies, but without regard to the accuracy.
May still require manual clock setup, to remain in tolerance window
2020-09-14 16:29:12 +02:00
Martin Eckardt
35c9e7a5ad
Use HAL function for FDCAN_CLK-calculation
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- Thanks to @jeromecoutant for showing the HAL funtion
- Added #ifdef guard to FDCAN2/3 handler functions
2020-09-14 15:24:14 +02:00
Martin Eckardt
08ce2f2de8
Calculate FDCAN_clk instead of assuming fix 10MHz
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- The FDCAN_clk is calculated on runtime from the according
RCC-registers
2020-09-07 02:08:59 +02:00
Martin Eckardt
9886532029
Added support for FDCAN3
2020-09-07 02:04:13 +02:00
Martin Eckardt
9bc2deb9aa
make G4 target compileable with CAN support
2020-09-07 02:04:13 +02:00
Maarten de Klerk
e6150ac722
Added error checking to can_filter() for Classic CAN
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Previously the function always returned 1 even when the configuration was illegal. I added a small check to HAL_CAN_ConfigFilter(...).
2020-08-08 23:25:42 +02:00
Przemyslaw Stekiel
713be4fd77
STM pin_function(), pin_mode(): return immediately when given pin is NC
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Additionally, remove redundant pin checks against NC when above functions are used.
2020-02-19 11:46:59 +01:00
Przemyslaw Stekiel
fffc30ffda
STM CAN: remove CAN_INIT_DIRECT macro
2019-12-18 10:43:55 +01:00
Przemyslaw Stekiel
e0e280aeaf
optimize can_init(): call can_init_freq() with default freq
2019-12-16 14:09:54 +01:00
Przemyslaw Stekiel
6a3e343ec6
Fix for issue #12104 (STM32 can_init_freq() ignores frequency)
2019-12-16 13:16:51 +01:00
Martin Kojtal
7177d8fefe
Merge pull request #11950 from ABOSTM/DISCO_H747I_TICKLESS
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DISCO_H747I: add support of MBED_TICKLESS
2019-11-29 09:48:09 +01:00
Przemyslaw Stekiel
b2dad08387
Change explicit pinmap to static pinmap
2019-11-28 08:32:12 +01:00
Przemyslaw Stekiel
c8a80bbcd3
STM CAN driver: Add explicit pinmap support
2019-11-28 08:32:04 +01:00
Alexandre Bourdiol
affe7113ef
TARGET_STM: Remove timeout on HSEM.
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With tickless mechanism hsem can be used for quite a long time
(time to set up PLL clock).
Also, if hsem is held to long, then this is not the current core which is faulty,
but probably the other (the one which hold the HSEM)
2019-11-27 14:25:43 +01:00
Alexandre Bourdiol
adcf0e2fa5
DISCO_H747I Dualcore support
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Add 2 targets for DISCO_H747I dualcore:
* DISCO_H747I -> for CM7 core
* DISCO_H747I_CM4 -> for CM4 core
Current restrictions:
* TICKLESS deactivated
* DeepSleep not supported (DeepSleep wrapped to sleep)
Warning: use of the same IP (example I2C1) by both core at the same time is not prevented,
but is strongly not recommended.
Some Hardware Semaphore are use for common IP, to manage concurrent access by both cores: Flash, GPIO, RCC.
Warning: Drag and drop of binary to DISCO_H747I will flash CM7.
In order to flash CM4, one can use STM32 CubeProgrammer tool.
2019-10-14 18:02:57 +02:00
jeromecoutant
5d80f9e98f
STM32: remove compilation warning
2019-06-07 18:08:39 +02:00
Russ Butler
7e8695a2c5
Add HAL API for can pinmap
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Add the functions can_rd_pinmap and can_td_pinmap to all targets.
2019-02-08 09:10:10 -06:00
jeromecoutant
f1d10cfeff
STM32: FDCAN support for H7 family
2019-01-21 13:53:19 +01:00
jeromecoutant
433ba46132
TARGET_STM astyle
2018-06-27 14:21:07 +02:00
bcostm
d96e76e7bd
STM32 CAN: fix wrong ID and MASK filter
2018-01-05 10:11:17 +01:00
Martin Kojtal
cee180f472
Merge pull request #5667 from productize/fix-stm32-can3
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STM32: Fix CAN3
2017-12-12 17:39:41 +00:00
Adam Heinrich
9ee222a8e6
STM32: Set valid filter number for CAN3
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Filter numbers 14 to 27 are reserved for dual CAN configuration.
However, CAN3 operates in single CAN configuration according to the
reference manual).
2017-12-07 18:06:05 +01:00
bcostm
bfc4d68ae0
STM32 CAN3: remove test of CAN_2 and CAN_3
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CAN_2 and CAN_3 are enum and not #define and this causes compilation error with GCC_ARM
Instead put back the test of CAN_NUM (which are defined in can_device.h).
2017-12-07 18:04:34 +01:00
Adam Heinrich
d33c0a6fa5
STM32: Pass correct id to can_irq() for CAN3
2017-12-06 19:41:20 +01:00
Mathieu Garivet
6ee3d80b1c
Fix RTR position bit in TX mailbox register
2017-11-28 18:44:28 +01:00
bcostm
2d8d8ae9e1
STM32: fix error with CAN_3 not defined
2017-11-15 10:36:03 +01:00
bcostm
0ef4e2881c
STM32: Add support of CAN3 on STM32F413/F767
2017-11-14 09:48:02 +01:00
Laurent MEUNIER
04ac65a4e6
STM32: CAN: restore registers after can_reset
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After reset the MCR register content needs to be restored so we're
introducing the can_registers_init function to be called at the first
init stage, but also after reset. We also store the can frequency to
go through the initialisation phase again.
2017-09-05 10:27:21 +02:00
Laurent MEUNIER
8357f6fe77
STM32: CAN: store the mode in object context
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In order to apply the same mode in case of reset, we store the current
requested mode in the HAL structure.
To make storage in a single place, we also change can_monitor to call
can_mode function as they actually acting on same registers.
2017-09-05 10:27:21 +02:00
Laurent MEUNIER
57222b604f
STM32: CAN: do not overwite BTR register when setting frequency
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BTR register has other bits than the ones calculated and set through
the can_speed function, so let's take care to only write to the
right registers.
2017-09-05 10:27:21 +02:00
Laurent MEUNIER
759642af8e
STM32: Define CAN handle as part of can object
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Instead of a static object, this will make driver
instantiation more robust and allow to re-use init
configuration on a need basis.
The CANName struct member is actually the CAN registers base address,
which is now available in the CanHandle.Instance field, so we don't need
CANName anymore.
2017-09-05 10:27:21 +02:00
bcostm
cef5133092
STM32 CAN: Fix issue with speed function calculation
2017-07-24 16:35:39 +02:00
Brad Perry
f7d76b5d29
Fixing the problem where the CAN is initialized to the wrong frequency at startup regardless of the value set in the constructor. Issue #3863
2017-06-28 12:07:14 -07:00
adustm
6770678811
Fix another typo
2017-05-29 10:24:03 +02:00
adustm
795bfd2288
Fix coding style
2017-05-29 10:24:03 +02:00
adustm
b99ccf65bd
Add timeout also on the 1st while loop
2017-05-29 10:24:03 +02:00
adustm
9a1d05551b
Optimize the use of the status value
2017-05-29 10:24:03 +02:00
adustm
52d38a1be0
Handle can_frequency sync error
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add a timeout + return an error message
2017-05-29 10:24:03 +02:00
adustm
577a0d972b
STM targets: the free irq function was not well implemented
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the index of the table was out of range
2017-05-15 14:27:22 +02:00
adustm
9115dd9b98
Add can_init_freq for STM devices
2017-05-15 14:27:22 +02:00
Simon Vogl
1c4e0d7dcb
can_write(): return error code when no tx mailboxes are available. ( #3829 )
2017-03-09 15:42:00 +00:00
Martin Kojtal
6aa62c1956
Merge pull request #3828 from jeromecoutant/PR_CAN_TYPE
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STM32 CAN API: correct format and type
2017-03-09 15:40:01 +00:00
jeromecoutant
67a75d96c6
STM32 CAN API: correct format and type
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astyle done
2017-03-06 11:34:20 +01:00
adustm
18c1618637
DISCO_F469NI: allow the use of CAN2 instance when CAN1 is not activated
2017-03-03 17:05:28 +01:00
bcostm
30565cbe5e
Revert "Coding style"
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This reverts commit 32b801b40c
.
2017-02-20 11:29:30 +01:00
bcostm
32b801b40c
Coding style
2017-02-20 11:19:53 +01:00
bcostm
eec6e10138
Add a #else to cover default STM32 devices for the IRQHandler functions.
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Change also the coding style for the "{".
2017-02-20 11:19:53 +01:00
bcostm
f527ff95ab
Add support to L4 targets.
2017-02-20 11:19:53 +01:00