When attempting to perform a test build of various mbed-os targets with
GCC configured to build -std=gnu++11, all of the targets built
successfully except for this one. It gave errors like this:
../mbed-os/targets/TARGET_STM/TARGET_STM32F4/TARGET_UBLOX_EVK_ODIN_W2/sdk/wifi_emac/wifi_emac_api.cpp: In function 'emac_interface_t* wifi_emac_get_interface()':
../mbed-os/targets/TARGET_STM/TARGET_STM32F4/TARGET_UBLOX_EVK_ODIN_W2/sdk/wifi_emac/wifi_emac_api.cpp:331:38: error: use of deleted function 'emac_interface::emac_interface()'
_intf = new emac_interface_t();
^
In file included from ../mbed-os/targets/TARGET_STM/TARGET_STM32F4/TARGET_UBLOX_EVK_ODIN_W2/sdk/wifi_emac/wifi_emac_api.cpp:9:0:
../mbed-os/hal/emac_api.h:150:16: note: 'emac_interface::emac_interface()' is implicitly deleted because the default definition would be ill-formed:
typedef struct emac_interface {
^
../mbed-os/hal/emac_api.h:150:16: error: uninitialized const member in 'struct emac_interface'
../mbed-os/hal/emac_api.h:151:32: note: 'const emac_interface_ops_t emac_interface::ops' should be initialized
const emac_interface_ops_t ops;
This commit contains a proposed change which fixes this issue by not
using the new operator to allocate the emac_interface_t structure but
instead using the malloc() function since the construction is being
handled explicitly in the subsequent lines of the
wifi_emac_get_interface() function anyway.
I also added code which only completes the initialization of the _intf
object if its allocation succeeds and just returns NULL otherwise.
I see no deallocation of the _intf object occurring so no change from
delete to free() needed to be made.
Revert HRM1017 file source deletion
Added in small comment next to additions
Added mapping to BTN-labelled switches
Added mapping to USER_BUTTON-labelled switches
Undo incorrect mapping to SWIO pin in NORDIC target
Before this patch, many warnings like below were generated
during compilation with ArmCC
[Warning] lwip_ethernet.h@57,0: #3135-D: attribute does not apply to any entity
This happens here as ``--gnu`` option of ArmCC is being used, which
enables the GNU compiler extensions that the ARM compiler supports.
This is solve by adding a extra check on __CCARM .
The USB ISTR register consists of a mix of bits that are
write-zero-to-clear and read only bits. As such, to clear a bit in
the ISTR, you should simply write the bitwise-NOT of the bit to clear.
Previously, the __HAL_PCD_CLEAR_FLAG() macro would do a bitwise-AND
with the ISTR register contents to clear a bit, but this could result
in another bit being inadvertently cleared if it is set by hardware
between the read and the write of the ISTR register.
Similarly, the USB endpoint registers have two bits that are
write-zero-to-clear, USB_EP_CTR_RX and USB_EP_CTR_TX, but the
PCD_CLEAR_RX_EP_CTR() and PCD_CLEAR_TX_EP_CTR() macros wrote back the
last read value for one of these bits when clearing the other bit.
This could result in inadvertent clearing of one of these bits if it
were set by the hardware between the read and the write. These macros
have now both been adjusted to always write one to the bit not being
cleared to prevent inadvertent clears.
If I2C slave support is included, then the I2C error handler would
always reset the I2C address, resulting in incorrectly changing the
I2C state to listen for a controller configured as I2C master. This
change conditionalizes the address setting to only occur if the
controller was in slave mode when the error occurred.
Targets NUCLEO_F429ZI and UBLOX_EVK_ODIN_W2 have 192K RAM.
Heap size in PR #3871 was increased from 48K to 96K as tls-client
example failed with 48K heap. But this resulted in compilation failures
in mbed-client that requires 71K for global/static data.
Hence this PR reduces heap to 64K that minimum required by tls-client
to work. This also meets mbed-client data segment requirements.
In case the selected frequency is higher than the requested one, it is
better to send a debug warning rather than an blocking error.
In case of such warning, user may need to redefine the clock tree setting
at higher level (reducing peripheral's input clocks during init phase).
Up to now, speed was set for outputs and alternate, but this is
also valid for input configuration.
By default, let's configure high speed.
This is done firts, because speed for some families like F1 is mixed
with Input/Output mode settings, so can be later over-ridden if needed.
Check in flash algos for the K64F, KL46Z, F429, F439 and Odin board
and enable these features accordingly in targets.json. This
implementation uses flash algo blob that are generated via scripts.
The K64F and KL46Z were generated directly from packs, while the
KL46Z, F429, F439 and odin were generated from code checked into
the FlashAlgo repo.
The address of the vector table is hardcoded to the start of flash in
many, if not all, ST targets. This causes a crash in applications that
are using a bootloader. This patch updates the boards STM32F429xI,
STM32F439xI and Odin so they properly handle updating the VTOR with
a bootloader.
The pwmout driver is very similar for each STM32 family.
The only family specific part is defined in pwmout_device.h file.
It mainly contains few specific information:
- The mapping of PWM/TIMERS to APB1 or APB2 so that we can get the clock
- The clock calculation uses the right APB clock, which was sometimes
not the case before and could have lead to errors in case dividers were
enabled on APB clock settings. This case is now covered.
- Inactivation of inverted support on feaw families
The default pin mode shall be set as part of the pinamp_pinout, and
as defined in tables of PeripheralPins.c, but this is currently
over-written by a call to pin_mode(pin, PullNone); from
mbed_pinmap_common.c, so we need a set the mode again here, including
OpenDrain config as needed for I2C.
this first makes pinmap.c a common file
then rework it with several goals:
- avoid gpio / irq / pin management extra dependencies
- improve performances when switching between pin modes
This change is based on LL layer to access to registers level
instead of using HAL higher level API.
The family specific functions are implemented in pin_device.h
of each family. Mostly this is F1 family that is differnt
from other ones.
Instead of using HAL_GPIO_Init / Deinit which makes a lot of registers
being written and re-written, and which creates extra gpio / pin / irq
dependencies, we directly set the IRQ related registers thanks for the
STM32 LL layers which provides APIs to modify registers.
In case of prescaler_rank was 0, a -1 index was being used,
which resulted in initialization of the Init.BaudRatePrescaler with
random values.
Now let's better check index and avoid -1 operation, so that prescaler_rank
can be only from 0 to "last_index".
Add MBED_APP_START and MBED_APP_SIZE to the Odin's linker script
so the start and size of an image can be specified. This allows the
ROM to be split into a bootloader region and an application region.
Add MBED_APP_START and MBED_APP_SIZE to the stm32f429's linker script
so the start and size of an image can be specified. This allows the
ROM to be split into a bootloader region and an application region.
With the RTOS, the STACK_SIZE specified here is unrelated to the stack
size available for the main thread (that runs pre_main). Save memory by
reducing the stack size to a more reasonable amount.
On uVisor, HEAP_SIZE is both a minimum available and maximum available
heap size. The heap can't grow beyond the end of the heap into the
neighboring stack. On all uVisor-supported platforms, guarantee at least
0x6000 bytes of heap space. This increases the portability of uVisor
applications as the memory available for legacy heap allocations is
guaranteed. This helps to avoid out of memory errors on platforms that
were previously guaranteeing less memory.
arostm
Alexis ROCHE
Adam Green
Kevin Gilbert
Mihail Stoyanov
Laurent MEUNIER
Bradley Scott
Indrek Ardel
Anna Bridge
Sam Grove
jeromecoutant
0x6d61726b
Rob Meades
bcostm
0xc0170
Mohammad Azim Khan
Michel Jaouen
Martin Kojtal
Simon Vogl
adustm
Mike Fiore
Pierre-Marie Ancele
Christopher Haster
Russ Butler
Russ Butler
Helmut Tschemernjak
Jaeden Amero