mirror of https://github.com/ARMmbed/mbed-os.git
Add F2 differences. Mainly add support for CAN2 instance.
bcostm
parent
5fa0c4e172
commit
1f47619e82
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@ -29,17 +29,27 @@ static CAN_HandleTypeDef CanHandle;
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static uint32_t can_irq_ids[CAN_NUM] = {0};
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static can_irq_handler irq_handler;
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void can_init(can_t *obj, PinName rd, PinName td)
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void can_init(can_t *obj, PinName rd, PinName td)
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{
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CANName can_rd = (CANName)pinmap_peripheral(rd, PinMap_CAN_RD);
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CANName can_td = (CANName)pinmap_peripheral(td, PinMap_CAN_TD);
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obj->can = (CANName)pinmap_merge(can_rd, can_td);
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MBED_ASSERT((int)obj->can != NC);
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MBED_ASSERT((int)obj->can != NC);
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if (obj->can == CAN_1) {
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__HAL_RCC_CAN1_CLK_ENABLE();
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obj->index = 0;
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}
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#if defined(CAN2_BASE) && (CAN_NUM == 2)
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else if (obj->can == CAN_2) {
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__HAL_RCC_CAN2_CLK_ENABLE();
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obj->index = 1;
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}
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#endif
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else {
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return;
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}
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// Configure the CAN pins
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pinmap_pinout(rd, PinMap_CAN_RD);
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@ -66,30 +76,32 @@ void can_init(can_t *obj, PinName rd, PinName td)
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CanHandle.Init.Prescaler = 2;
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if (HAL_CAN_Init(&CanHandle) != HAL_OK) {
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error("Cannot initialize CAN");
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error("Cannot initialize CAN");
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}
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// Set initial CAN frequency to 100kb/s
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// Set initial CAN frequency to 100 kb/s
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can_frequency(obj, 100000);
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can_filter(obj, 0, 0, CANStandard, 0);
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uint32_t filter_number = (obj->can == CAN_1) ? 0 : 14;
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can_filter(obj, 0, 0, CANStandard, filter_number);
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}
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void can_irq_init(can_t *obj, can_irq_handler handler, uint32_t id)
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void can_irq_init(can_t *obj, can_irq_handler handler, uint32_t id)
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{
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irq_handler = handler;
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can_irq_ids[obj->index] = id;
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can_irq_ids[obj->index] = id;
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}
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void can_irq_free(can_t *obj)
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void can_irq_free(can_t *obj)
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{
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CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
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can->IER &= ~(CAN_IT_FMP0 | CAN_IT_FMP1 | CAN_IT_TME | \
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CAN_IT_ERR | CAN_IT_EPV | CAN_IT_BOF);
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can_irq_ids[obj->can] = 0;
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}
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void can_free(can_t *obj)
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void can_free(can_t *obj)
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{
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// Reset CAN and disable clock
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if (obj->can == CAN_1) {
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@ -97,6 +109,13 @@ void can_free(can_t *obj)
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__HAL_RCC_CAN1_RELEASE_RESET();
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__HAL_RCC_CAN1_CLK_DISABLE();
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}
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#if defined(CAN2_BASE)
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if (obj->can == CAN_2) {
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__HAL_RCC_CAN2_FORCE_RESET();
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__HAL_RCC_CAN2_RELEASE_RESET();
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__HAL_RCC_CAN2_CLK_DISABLE();
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}
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#endif
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}
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// The following table is used to program bit_timing. It is an adjustment of the sample
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@ -129,7 +148,7 @@ static const int timing_pts[23][2] = {
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{0xF, 0x7}, // 24, 67%
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};
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static unsigned int can_speed(unsigned int pclk, unsigned int cclk, unsigned char psjw)
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static unsigned int can_speed(unsigned int pclk, unsigned int cclk, unsigned char psjw)
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{
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uint32_t btr;
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uint16_t brp = 0;
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@ -137,9 +156,9 @@ static unsigned int can_speed(unsigned int pclk, unsigned int cclk, unsigned cha
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uint32_t bitwidth;
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int hit = 0;
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int bits;
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bitwidth = (pclk / cclk);
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brp = bitwidth / 0x18;
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while ((!hit) && (brp < bitwidth / 4)) {
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brp++;
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@ -151,21 +170,21 @@ static unsigned int can_speed(unsigned int pclk, unsigned int cclk, unsigned cha
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}
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}
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}
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if (hit) {
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btr = ((timing_pts[bits][1] << 20) & 0x00700000)
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| ((timing_pts[bits][0] << 16) & 0x000F0000)
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| ((psjw << 24) & 0x0000C000)
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| ((brp << 0) & 0x000003FF);
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| ((timing_pts[bits][0] << 16) & 0x000F0000)
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| ((psjw << 24) & 0x0000C000)
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| ((brp << 0) & 0x000003FF);
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} else {
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btr = 0xFFFFFFFF;
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}
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return btr;
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}
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int can_frequency(can_t *obj, int f)
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int can_frequency(can_t *obj, int f)
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{
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int pclk = HAL_RCC_GetPCLK1Freq();
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int btr = can_speed(pclk, (unsigned int)f, 1);
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@ -185,56 +204,56 @@ int can_frequency(can_t *obj, int f)
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}
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}
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int can_write(can_t *obj, CAN_Message msg, int cc)
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int can_write(can_t *obj, CAN_Message msg, int cc)
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{
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uint32_t transmitmailbox = 5;
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CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
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/* Select one empty transmit mailbox */
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if ((can->TSR&CAN_TSR_TME0) == CAN_TSR_TME0) {
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if ((can->TSR & CAN_TSR_TME0) == CAN_TSR_TME0) {
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transmitmailbox = 0;
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} else if ((can->TSR&CAN_TSR_TME1) == CAN_TSR_TME1) {
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} else if ((can->TSR & CAN_TSR_TME1) == CAN_TSR_TME1) {
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transmitmailbox = 1;
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} else if ((can->TSR&CAN_TSR_TME2) == CAN_TSR_TME2) {
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} else if ((can->TSR & CAN_TSR_TME2) == CAN_TSR_TME2) {
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transmitmailbox = 2;
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} else {
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transmitmailbox = CAN_TXSTATUS_NOMAILBOX;
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}
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if (transmitmailbox != CAN_TXSTATUS_NOMAILBOX) {
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can->sTxMailBox[transmitmailbox].TIR &= CAN_TI0R_TXRQ;
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if (!(msg.format)) {
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can->sTxMailBox[transmitmailbox].TIR |= ((msg.id << 21) | msg.type);
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} else {
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can->sTxMailBox[transmitmailbox].TIR |= ((msg.id << 3) | CAN_ID_EXT | msg.type);
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can->sTxMailBox[transmitmailbox].TIR &= CAN_TI0R_TXRQ;
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if (!(msg.format)) {
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can->sTxMailBox[transmitmailbox].TIR |= ((msg.id << 21) | msg.type);
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} else {
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can->sTxMailBox[transmitmailbox].TIR |= ((msg.id << 3) | CAN_ID_EXT | msg.type);
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}
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/* Set up the DLC */
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can->sTxMailBox[transmitmailbox].TDTR &= (uint32_t)0xFFFFFFF0;
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can->sTxMailBox[transmitmailbox].TDTR |= (msg.len & (uint8_t)0x0000000F);
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/* Set up the data field */
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can->sTxMailBox[transmitmailbox].TDLR = (((uint32_t)msg.data[3] << 24) |
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((uint32_t)msg.data[2] << 16) |
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((uint32_t)msg.data[1] << 8) |
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((uint32_t)msg.data[0]));
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can->sTxMailBox[transmitmailbox].TDHR = (((uint32_t)msg.data[7] << 24) |
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((uint32_t)msg.data[6] << 16) |
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((uint32_t)msg.data[5] << 8) |
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((uint32_t)msg.data[4]));
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/* Request transmission */
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can->sTxMailBox[transmitmailbox].TIR |= CAN_TI0R_TXRQ;
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}
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/* Set up the DLC */
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can->sTxMailBox[transmitmailbox].TDTR &= (uint32_t)0xFFFFFFF0;
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can->sTxMailBox[transmitmailbox].TDTR |= (msg.len & (uint8_t)0x0000000F);
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/* Set up the data field */
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can->sTxMailBox[transmitmailbox].TDLR = (((uint32_t)msg.data[3] << 24) |
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((uint32_t)msg.data[2] << 16) |
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((uint32_t)msg.data[1] << 8) |
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((uint32_t)msg.data[0]));
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can->sTxMailBox[transmitmailbox].TDHR = (((uint32_t)msg.data[7] << 24) |
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((uint32_t)msg.data[6] << 16) |
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((uint32_t)msg.data[5] << 8) |
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((uint32_t)msg.data[4]));
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/* Request transmission */
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can->sTxMailBox[transmitmailbox].TIR |= CAN_TI0R_TXRQ;
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}
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return 1;
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return 1;
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}
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int can_read(can_t *obj, CAN_Message *msg, int handle)
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int can_read(can_t *obj, CAN_Message *msg, int handle)
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{
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//handle is the FIFO number
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CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
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CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
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// check FPM0 which holds the pending message count in FIFO 0
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// if no message is pending, return 0
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if ((can->RF0R & CAN_RF0R_FMP0) == 0) {
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@ -248,12 +267,12 @@ int can_read(can_t *obj, CAN_Message *msg, int handle)
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} else {
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msg->id = (uint32_t)0x1FFFFFFF & (can->sFIFOMailBox[handle].RIR >> 3);
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}
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msg->type = (CANType)((uint8_t)0x02 & can->sFIFOMailBox[handle].RIR);
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/* Get the DLC */
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msg->len = (uint8_t)0x0F & can->sFIFOMailBox[handle].RDTR;
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// /* Get the FMI */
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// msg->FMI = (uint8_t)0xFF & (can->sFIFOMailBox[handle].RDTR >> 8);
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/* Get the FMI */
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// msg->FMI = (uint8_t)0xFF & (can->sFIFOMailBox[handle].RDTR >> 8);
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/* Get the data field */
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msg->data[0] = (uint8_t)0xFF & can->sFIFOMailBox[handle].RDLR;
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msg->data[1] = (uint8_t)0xFF & (can->sFIFOMailBox[handle].RDLR >> 8);
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@ -263,63 +282,66 @@ int can_read(can_t *obj, CAN_Message *msg, int handle)
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msg->data[5] = (uint8_t)0xFF & (can->sFIFOMailBox[handle].RDHR >> 8);
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msg->data[6] = (uint8_t)0xFF & (can->sFIFOMailBox[handle].RDHR >> 16);
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msg->data[7] = (uint8_t)0xFF & (can->sFIFOMailBox[handle].RDHR >> 24);
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/* Release the FIFO */
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if (handle == CAN_FIFO0) {
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/* Release FIFO0 */
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can->RF0R |= CAN_RF0R_RFOM0;
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} else { /* FIFONumber == CAN_FIFO1 */
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/* Release FIFO1 */
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can->RF1R |= CAN_RF1R_RFOM1;
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/* Release FIFO1 */
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can->RF1R |= CAN_RF1R_RFOM1;
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}
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return 1;
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}
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void can_reset(can_t *obj)
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void can_reset(can_t *obj)
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{
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CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
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can->MCR |= CAN_MCR_RESET;
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can->MCR |= CAN_MCR_RESET;
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can->ESR = 0x0;
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}
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unsigned char can_rderror(can_t *obj)
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unsigned char can_rderror(can_t *obj)
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{
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CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
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CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
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return (can->ESR >> 24) & 0xFF;
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}
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unsigned char can_tderror(can_t *obj)
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unsigned char can_tderror(can_t *obj)
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{
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CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
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CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
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return (can->ESR >> 16) & 0xFF;
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}
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void can_monitor(can_t *obj, int silent)
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void can_monitor(can_t *obj, int silent)
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{
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CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
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CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
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can->MCR |= CAN_MCR_INRQ ;
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while((can->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) {
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while ((can->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) {
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}
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if (silent) {
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can->BTR |= ((uint32_t)1 << 31);
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} else {
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can->BTR &= ~((uint32_t)1 << 31);
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}
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can->MCR &= ~(uint32_t)CAN_MCR_INRQ;
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while((can->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) {
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while ((can->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) {
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}
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}
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int can_mode(can_t *obj, CanMode mode)
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int can_mode(can_t *obj, CanMode mode)
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{
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int success = 0;
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CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
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can->MCR |= CAN_MCR_INRQ ;
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while ((can->MSR & CAN_MSR_INAK) != CAN_MSR_INAK) {
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}
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switch (mode) {
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case MODE_NORMAL:
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can->BTR &= ~(CAN_BTR_SILM | CAN_BTR_LBKM);
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@ -344,9 +366,11 @@ int can_mode(can_t *obj, CanMode mode)
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success = 0;
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break;
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}
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can->MCR &= ~(uint32_t)CAN_MCR_INRQ;
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while ((can->MSR & CAN_MSR_INAK) == CAN_MSR_INAK) {
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}
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return success;
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}
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@ -366,9 +390,9 @@ int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t
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sFilterConfig.FilterIdHigh = id << 5;
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sFilterConfig.FilterIdLow = 0x0;
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sFilterConfig.FilterMaskIdHigh = mask << 5;
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sFilterConfig.FilterMaskIdLow = 0x0; // allows both remote and data frames
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sFilterConfig.FilterMaskIdLow = 0x0; // allows both remote and data frames
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} else if (format == CANExtended) {
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sFilterConfig.FilterIdHigh = id >> 13; // EXTID[28:13]
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sFilterConfig.FilterIdHigh = id >> 13; // EXTID[28:13]
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sFilterConfig.FilterIdLow = (0x00FF & (id << 3)) | (1 << 2); // EXTID[12:0]
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sFilterConfig.FilterMaskIdHigh = mask >> 13;
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sFilterConfig.FilterMaskIdLow = (0x00FF & (mask << 3)) | (1 << 2);
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@ -378,62 +402,61 @@ int can_filter(can_t *obj, uint32_t id, uint32_t mask, CANFormat format, int32_t
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sFilterConfig.FilterActivation = ENABLE;
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sFilterConfig.BankNumber = 14 + handle;
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HAL_CAN_ConfigFilter(&CanHandle, &sFilterConfig);
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HAL_CAN_ConfigFilter(&CanHandle, &sFilterConfig);
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retval = handle;
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}
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return retval;
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}
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static void can_irq(CANName name, int id)
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static void can_irq(CANName name, int id)
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{
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uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0;
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uint32_t tmp1 = 0, tmp2 = 0, tmp3 = 0;
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CanHandle.Instance = (CAN_TypeDef *)name;
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if (__HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_TME)) {
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tmp1 = __HAL_CAN_TRANSMIT_STATUS(&CanHandle, CAN_TXMAILBOX_0);
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tmp2 = __HAL_CAN_TRANSMIT_STATUS(&CanHandle, CAN_TXMAILBOX_1);
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tmp3 = __HAL_CAN_TRANSMIT_STATUS(&CanHandle, CAN_TXMAILBOX_2);
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if (tmp1){
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if (tmp1) {
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__HAL_CAN_CLEAR_FLAG(&CanHandle, CAN_FLAG_RQCP0);
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}
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if (tmp2){
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if (tmp2) {
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__HAL_CAN_CLEAR_FLAG(&CanHandle, CAN_FLAG_RQCP1);
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}
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if (tmp3){
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if (tmp3) {
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__HAL_CAN_CLEAR_FLAG(&CanHandle, CAN_FLAG_RQCP2);
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}
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if(tmp1 || tmp2 || tmp3)
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{
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if (tmp1 || tmp2 || tmp3) {
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irq_handler(can_irq_ids[id], IRQ_TX);
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}
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}
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tmp1 = __HAL_CAN_MSG_PENDING(&CanHandle, CAN_FIFO0);
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tmp2 = __HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_FMP0);
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if ((tmp1 != 0) && tmp2) {
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irq_handler(can_irq_ids[id], IRQ_RX);
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irq_handler(can_irq_ids[id], IRQ_RX);
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}
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tmp1 = __HAL_CAN_GET_FLAG(&CanHandle, CAN_FLAG_EPV);
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tmp2 = __HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_EPV);
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tmp3 = __HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_ERR);
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tmp3 = __HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_ERR);
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if (tmp1 && tmp2 && tmp3) {
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irq_handler(can_irq_ids[id], IRQ_PASSIVE);
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irq_handler(can_irq_ids[id], IRQ_PASSIVE);
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}
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tmp1 = __HAL_CAN_GET_FLAG(&CanHandle, CAN_FLAG_BOF);
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tmp2 = __HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_BOF);
|
||||
tmp3 = __HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_ERR);
|
||||
tmp3 = __HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_ERR);
|
||||
if (tmp1 && tmp2 && tmp3) {
|
||||
irq_handler(can_irq_ids[id], IRQ_BUS);
|
||||
}
|
||||
|
||||
tmp3 = __HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_ERR);
|
||||
|
||||
tmp3 = __HAL_CAN_GET_IT_SOURCE(&CanHandle, CAN_IT_ERR);
|
||||
if (tmp1 && tmp2 && tmp3) {
|
||||
irq_handler(can_irq_ids[id], IRQ_ERROR);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#if defined(TARGET_STM32F0)
|
||||
|
|
@ -443,7 +466,7 @@ void CAN_IRQHandler(void)
|
|||
}
|
||||
#endif
|
||||
|
||||
#if defined(TARGET_STM32F1)
|
||||
#if defined(TARGET_STM32F1) || defined(TARGET_STM32F2)
|
||||
void CAN1_RX0_IRQHandler(void )
|
||||
{
|
||||
can_irq(CAN_1, 0);
|
||||
|
|
@ -456,6 +479,22 @@ void CAN1_SCE_IRQHandler(void)
|
|||
{
|
||||
can_irq(CAN_1, 0);
|
||||
}
|
||||
#if defined(CAN2_BASE)
|
||||
void CAN2_RX0_IRQHandler(void)
|
||||
{
|
||||
can_irq(CAN_2, 1);
|
||||
}
|
||||
|
||||
void CAN2_TX_IRQHandler(void)
|
||||
{
|
||||
can_irq(CAN_2, 1);
|
||||
}
|
||||
|
||||
void CAN2_SCE_IRQHandler(void)
|
||||
{
|
||||
can_irq(CAN_2, 1);
|
||||
}
|
||||
#endif
|
||||
#endif
|
||||
|
||||
void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable)
|
||||
|
|
@ -463,7 +502,7 @@ void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable)
|
|||
|
||||
CAN_TypeDef *can = (CAN_TypeDef *)(obj->can);
|
||||
IRQn_Type irq_n = (IRQn_Type)0;
|
||||
uint32_t vector = 0;
|
||||
uint32_t vector = 0;
|
||||
uint32_t ier;
|
||||
|
||||
if (obj->can == CAN_1) {
|
||||
|
|
@ -473,12 +512,12 @@ void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable)
|
|||
irq_n = CAN1_IRQ_RX_IRQN;
|
||||
vector = (uint32_t)&CAN1_IRQ_RX_VECT;
|
||||
break;
|
||||
case IRQ_TX:
|
||||
case IRQ_TX:
|
||||
ier = CAN_IT_TME;
|
||||
irq_n = CAN1_IRQ_TX_IRQN;
|
||||
vector = (uint32_t)&CAN1_IRQ_TX_VECT;
|
||||
break;
|
||||
case IRQ_ERROR:
|
||||
case IRQ_ERROR:
|
||||
ier = CAN_IT_ERR;
|
||||
irq_n = CAN1_IRQ_ERROR_IRQN;
|
||||
vector = (uint32_t)&CAN1_IRQ_ERROR_VECT;
|
||||
|
|
@ -493,9 +532,46 @@ void can_irq_set(can_t *obj, CanIrqType type, uint32_t enable)
|
|||
irq_n = CAN1_IRQ_BUS_IRQN;
|
||||
vector = (uint32_t)&CAN1_IRQ_BUS_VECT;
|
||||
break;
|
||||
default: return;
|
||||
default:
|
||||
return;
|
||||
}
|
||||
}
|
||||
}
|
||||
#if defined(CAN2_BASE) && (CAN_NUM == 2)
|
||||
else if (obj->can == CAN_2) {
|
||||
switch (type) {
|
||||
case IRQ_RX:
|
||||
ier = CAN_IT_FMP0;
|
||||
irq_n = CAN2_IRQ_RX_IRQN;
|
||||
vector = (uint32_t)&CAN2_IRQ_RX_VECT;
|
||||
break;
|
||||
case IRQ_TX:
|
||||
ier = CAN_IT_TME;
|
||||
irq_n = CAN2_IRQ_TX_IRQN;
|
||||
vector = (uint32_t)&CAN2_IRQ_TX_VECT;
|
||||
break;
|
||||
case IRQ_ERROR:
|
||||
ier = CAN_IT_ERR;
|
||||
irq_n = CAN2_IRQ_ERROR_IRQN;
|
||||
vector = (uint32_t)&CAN2_IRQ_ERROR_VECT;
|
||||
break;
|
||||
case IRQ_PASSIVE:
|
||||
ier = CAN_IT_EPV;
|
||||
irq_n = CAN2_IRQ_PASSIVE_IRQN;
|
||||
vector = (uint32_t)&CAN2_IRQ_PASSIVE_VECT;
|
||||
break;
|
||||
case IRQ_BUS:
|
||||
ier = CAN_IT_BOF;
|
||||
irq_n = CAN2_IRQ_BUS_IRQN;
|
||||
vector = (uint32_t)&CAN2_IRQ_BUS_VECT;
|
||||
break;
|
||||
default:
|
||||
return;
|
||||
}
|
||||
}
|
||||
#endif
|
||||
else {
|
||||
return;
|
||||
}
|
||||
|
||||
if (enable) {
|
||||
can->IER |= ier;
|
||||
|
|
|
|||
Loading…
Reference in New Issue