ccli8
116b14aa84
[NUC472/M487] Refine code with SHA context selection in SHA alter.
2018-01-05 09:18:22 +08:00
ccli8
980cb6b9c8
[NUC472/M487] Guard against SHA internal state size is not word-aligned in SHA alter.
2018-01-05 09:18:21 +08:00
ccli8
8ba07815ed
[NUC472/M487] Fix SHA H/W resource leakage in context cloning
2018-01-05 09:18:21 +08:00
ccli8
83fb50cca3
[NUC472/M487] Fix SHA H/W is not stopped in corner case
...
Take SHA1 for example, without the fix, SHA H/W is not stopped in either case:
(1) ctx->total == 0 in mbedtls_sha1_hw_finish()
(2) mbedtls_sha1_hw_finish() is not called by upper layer
2018-01-05 09:18:21 +08:00
ccli8
a0a8a955a9
[NUC472/M487] Strengthen crypto DMA buffer check
...
1. Catch incompatible buffer range, where buffer base = 0xffffff00 and buffer size = 0x100.
2. Add buffer size alignment check.
2018-01-05 09:18:21 +08:00
ccli8
ac000244f4
[NUC472/M487] Refine AES/DES alter. DMA buffer requirement comment
2018-01-05 09:18:20 +08:00
ccli8
aafbdc8d38
[NUC472/M487] Fix compile error with disabled crypto
...
For example, even though MBEDTLS_SHA512_C is disabled (via #undef MBEDTLS_SHA512_C),
mbedtls_sha512_context is still necessary due to referenced in sha512.h.
2018-01-05 09:18:20 +08:00
ccli8
b0228d020d
[NUC472/M487] Fix compile error as mbedtls is not included
...
Currently, trng_api.c is located in targets/ and AES/DES/SHA alter. are located in mbedtls/.
They have shared crypto code.
If they could locate at same location e.g. mbedtls/, the shared crypto code placement would be more reasonable.
2018-01-05 09:18:20 +08:00
ccli8
ba16fd9617
[NUC472/M487] Refine AES alter. key endianness code
2018-01-05 09:18:20 +08:00
ccli8
6464649c41
[NUC472/M487] Coordinate crypto interrupt handler among AES/PRNG
2018-01-05 09:18:20 +08:00
ccli8
0c2d59d327
[NUC472/M487] Refine AES/DES alter. code
2018-01-05 09:18:19 +08:00
ccli8
289bbf0ec7
[NUC472/M487] Fix AES alter. CFB128 error
2018-01-05 09:18:19 +08:00
ccli8
7076675fec
[NUC472/M487] Optimize AES alter. code
2018-01-05 09:18:19 +08:00
ccli8
6cc3aa3e54
[NUC472/M487] Guard from re-entry into crypto H/W
2018-01-05 09:18:19 +08:00
ccli8
d66074fecc
[NUC472/M487] Coordinate crypto init among AES/DES/SHA/PRNG
...
Add counter to track crypto init among crypto sub-modules. It includes:
1. Enable crypto clock
2. Enable crypto interrupt
As counter gets zero, crypto clock is disabled to save power.
2018-01-05 09:18:18 +08:00
ccli8
b0eededdaf
[NUC472/M487] Fix DES alter. DMA buffer could locate at unsupported region
2018-01-05 09:18:18 +08:00
ccli8
f85875c7b6
[NUC472/M487] Fix AES alter. DMA buffer could locate at unsupported region
2018-01-05 09:18:18 +08:00
ccli8
70e9a90957
[NUC472/M487] Refine AES alter. input/output data endianness
2018-01-05 09:18:18 +08:00
ccli8
a1e202518f
[NUC472/M487] Fix AES alter. DMA buffer check
2018-01-05 09:18:18 +08:00
ccli8
20aa516e79
[NUC472/M487] Refine config check code
2018-01-05 09:18:17 +08:00
ccli8
126aa565c7
[NUC472/M487] Remove redundant S/W DES code
...
This S/W DES code was to test DES H/W port before.
2018-01-05 09:18:17 +08:00
ccli8
2e7f07e264
[NUC472/M487] Refine DES alter. code
2018-01-05 09:18:17 +08:00
ccli8
b2b67af189
[NUC472/M487] Add comment for DES alter. context
2018-01-05 09:18:17 +08:00
ccli8
ed57432c95
[NUC472/M487] Add comment for AES alter. context
2018-01-05 09:18:17 +08:00
ccli8
9e5837fd77
[NUC472/M487] Refine AES alter. code with IV endianness
2018-01-05 09:18:16 +08:00
ccli8
087186aba7
[NUC472/M487] Rework AES alter. CFB128
...
1. Fix bug on non-block aligned data size
2. More concise
2018-01-05 09:18:16 +08:00
ccli8
93f6ef996f
[NUC472/M487] Refine AES alter. DMA buffer code
2018-01-05 09:18:16 +08:00
ccli8
f24ca8c857
[NUC472/M487] Refine AES alter. code
2018-01-05 09:18:16 +08:00
ccli8
82bd285e51
[NUC472/M487] Support multiple contexts in AES alter. with context save & restore
2018-01-05 09:18:15 +08:00
ccli8
0d25a9c421
[NUC472/M487] Fix AES DMA buffer cannot locate at ROM region
2018-01-05 09:18:15 +08:00
ccli8
2dcc1e9e27
[NUC472/M487] Remove AES alter. dead code
2018-01-05 09:18:15 +08:00
ccli8
5665247d4a
[NUC472/M487] Fix AES alternative function not thread-safe
2018-01-05 09:18:14 +08:00
ccli8
315b684bd9
[NUC472] Refine coding style
2018-01-05 09:18:14 +08:00
ccli8
0c5b860409
[M487] Refine coding style
2018-01-05 09:18:14 +08:00
ccli8
19e9dbf799
[NUC472] Fix DES alternative function not thread-safe
2018-01-05 09:18:13 +08:00
ccli8
61d9e69be4
[NUC472] Remove unnecessary MBEDTLS_CONFIG_FILE check from AES/DES/SHA alternative
...
1. aes.h/des.h/sha1.h/sha256.h/sha512.h includes config.h before aes_alt.h/des_alt.h/sha1_alt.h/sha256_alt.h/sha512_alt.h.
2. aes_alt.h/des_alt.h/sha1_alt.h/sha256_alt.h/sha512_alt.h should not be included in any other location.
3. Just include aes.h/des.h/sha1.h/sha256.h/sha512.h in aes_alt.c/des_alt.c/sha1_alt.c/sha256_alt.c/sha512_alt.c.
2018-01-05 09:18:13 +08:00
ccli8
6b0213c13d
[NUC472] Remove other unnecessary AES alternative macro definitions
...
As MBEDTLS_AES_ALT is defined, alternative implementations for all AES functions should be defined.
2018-01-05 09:18:13 +08:00
ccli8
925eee0688
[NUC472] Remove debug code in AES alternative
2018-01-05 09:18:13 +08:00
ccli8
530b8dfdb9
[M487] Fix DES alternative function not thread-safe
2018-01-05 09:18:13 +08:00
ccli8
436ecdbd60
[M487] Remove unnecessary MBEDTLS_CONFIG_FILE check from AES/DES/SHA alternative
...
1. aes.h/des.h/sha1.h/sha256.h/sha512.h includes config.h before aes_alt.h/des_alt.h/sha1_alt.h/sha256_alt.h/sha512_alt.h.
2. aes_alt.h/des_alt.h/sha1_alt.h/sha256_alt.h/sha512_alt.h should not be included in any other location.
3. Just include aes.h/des.h/sha1.h/sha256.h/sha512.h in aes_alt.c/des_alt.c/sha1_alt.c/sha256_alt.c/sha512_alt.c.
2018-01-05 09:18:12 +08:00
ccli8
8f7df9ab41
[M487] Remove other unnecessary AES alternative macro definitions
...
As MBEDTLS_AES_ALT is defined, alternative implementations for all AES functions should be defined.
2018-01-05 09:18:12 +08:00
ccli8
fbf7d40778
[M487] Remove debug code in AES alternative
2018-01-05 09:18:12 +08:00
Martin Kojtal
3bedff36e3
Merge pull request #4825 from SiliconLabs/feature/mbedtls-hw-accel
...
Silicon Labs: Add cryptographic acceleration support
2017-11-16 16:24:52 +00:00
Steven Cooreman
1dc3941a5f
Apply feedback by @Patater
2017-11-11 19:38:54 +01:00
Steven Cooreman
2f02a23ac0
Cosmetic fix
2017-10-31 18:58:15 +01:00
stcoorem
2e2fb6ff26
Applied @yanesca and @andresag01 comments ( #4825 )
2017-10-19 12:00:09 +02:00
Jimmy Brisson
2f652be4c0
Merge pull request #4898 from u-blox/stm32f437xg_hw_security
...
Enable crypto HW acceleration for STM32F437xG platforms
2017-10-13 09:16:19 -05:00
Jimmy Brisson
181d7bc1bb
Merge pull request #5080 from andresag01/fix-hw-acc-sha1-md5-sha256
...
mbedtls: Disable MD5, SHA1, SHA256 HW ACC for STM32F439xI
2017-09-21 09:03:33 -05:00
adustm
e6fa5f07a2
Change after code review : standardize calls among ST families
...
Check return values in alignment with MBEDTLS error codes
2017-09-15 14:59:08 +02:00
adustm
cd1a18fee3
Use new interface of mbedtls instead of deprecated functions
2017-09-14 13:49:43 +02:00
adustm
c1fcae6c50
Fix multi context for AES CBC and ECB mode
...
Fix mbed-os-example-tls-client use case
2017-09-14 13:49:03 +02:00
adustm
458b0ec99f
Enable AES_ALT mode again (remove workaround)
2017-09-14 13:48:52 +02:00
Andres Amaya Garcia
f928e7a707
mbedtls: Disable MD5, SHA1, SHA256 HW ACC for STM32F439xI
...
STM32F439xI-family MD5, SHA1 and SHA256 hardware acceleration
occasionally produces incorrect output (#5079 ).
Don't enable MD5, SHA1 and SHA256 HW acceleration on STM32F439xI-family
targets by default until issue #5079 is fixed.
2017-09-12 13:39:04 +01:00
Martin Kojtal
de6d2918b8
Merge pull request #4987 from andresag01/release-mbedtls-2.6.0
...
Update mbed TLS to version 2.6.0
2017-09-12 06:18:46 +01:00
Andres Amaya Garcia
7c8ed0cc42
Enable MBEDTLS_AES_ROM_TABLES in mbed TLS main conf
...
Enable the compile-time option MBEDTLS_AES_ROM_TABLES in the mbed TLS
main config.h file in mbed OS. This option has the effect of labelling
the AES tables as 'const' so they are placed in ROM, which saves some
RAM space.
2017-08-29 12:05:50 +01:00
Andres Amaya Garcia
adbba2c86b
Update mbed TLS to version 2.6.0
2017-08-29 11:50:29 +01:00
Jaeden Amero
bea62d6b8c
mbedtls: STM32F439xI: Don't enable AES acceleration by default
...
STM32F439xI-family AES hardware acceleration occasionally produces
incorrect output (https://github.com/ARMmbed/mbed-os/issues/4928 ).
Don't enable AES HW acceleration on STM32F439xI-family targets by
default until issue #4928 is fixed.
2017-08-18 10:12:14 +01:00
Jimmy Brisson
0f0a461209
Merge pull request #4832 from OpenNuvoton/nuvoton
...
NUC472/M453: Fix several startup and hal bugs
2017-08-14 11:38:18 -05:00
Jimmy Brisson
0150f58e12
Merge pull request #4608 from OpenNuvoton/nuvoton_m487
...
Support Nuvoton's new target NUMAKER_PFM_M487
2017-08-14 11:35:33 -05:00
Rob Meades
410a345b70
Enable crypto HW acceleration for STM32F437xG platforms (i.e. ublox C030 family).
2017-08-14 11:44:13 +01:00
Martin Kojtal
744c364683
STM mbedtls: clear algo value for md5/sha1 and sha256
...
The hw block for mbedtls is shared, thus HASH algo value should be cleared
in the init.
2017-08-09 07:45:20 +01:00
Martin Kojtal
d92e4b5fcd
STM32F4: remove md5 from the mbedtls config file
2017-08-09 07:45:20 +01:00
adustm
85c8bf87a1
Add a check 'non busy' status of the HW before save restore procedures
2017-08-09 07:45:20 +01:00
adustm
f033c87640
Handle context swap + Modify macro name ST_MD5_BLOCK_SIZE
2017-08-09 07:45:20 +01:00
adustm
de2899279e
Move MBEDTLS_MD5_C from mbetdls_device.h to targets.json
2017-08-09 07:45:20 +01:00
adustm
766e451c88
Replace 64 by a define
2017-08-09 07:45:19 +01:00
adustm
53a8b75e4e
Improve md5 buffer storing concept
2017-08-09 07:45:19 +01:00
adustm
d39d52b042
Fix use case with size = 0 (md5_selftest #1 )
2017-08-09 07:45:19 +01:00
adustm
b2092f072f
Handle 64bytes per 64 bytes
...
+ remove unused includes files
2017-08-09 07:45:19 +01:00
adustm
29114f1a56
Remove unused variables in mbedtls_md5_context + remove unnecessary ifdef
...
__cplusplus
2017-08-09 07:45:19 +01:00
adustm
e126975d91
Remove unnecessary functions in md5_alt.h file
2017-08-09 07:45:19 +01:00
adustm
c174191eb9
Move MBEDTLS_MD5_C define from mbedtls_device.h to targets.json
2017-08-09 07:45:19 +01:00
adustm
bd1c4f5c62
NUCLEO_F756ZG/mbedtls : MD5 hw activation
2017-08-09 07:45:18 +01:00
ccli8
afb5aba8d9
[M487] Fix compile warnings with IAR toolchain
2017-08-03 13:33:17 +08:00
ccli8
99d12b1eb8
[M487] Fix compile warnings with GCC_ARM toolchain
2017-08-03 11:10:15 +08:00
Steven Cooreman
e07ab46f32
Apply feedback from @RonEld
...
* Use _C flags at compile time in SHA to avoid compiling in unconfigured features
* Don't define ECP_SHORTWEIERSTRASS since it is part of the application's configuration
2017-08-02 16:03:29 +02:00
adustm
9432227c68
NUCLEO_F756ZG/mbedTLS: sha256 hw acceleration
2017-08-01 16:14:53 +02:00
Steven Cooreman
1e51dfa302
[Silicon Labs] cryptographic acceleration support
...
Initial commit of mbed TLS hardware acceleration drivers for Silicon Labs parts
2017-08-01 09:25:19 +02:00
ccli8
46cb684a32
[NUC472] Conform to mbed TLS H/W acceleration support
2017-08-01 14:40:08 +08:00
cyliangtw
aa47503435
[M487] Revise CAN & AES to fulfill real-chip
2017-08-01 10:31:36 +08:00
ccli8
12536436f8
[M487] Conform to mbed TLS H/W acceleration support released with mbed OS 5.3
2017-08-01 10:23:48 +08:00
Jimmy Brisson
50c616ec74
Merge pull request #4750 from andreaslarssonublox/ublox_enable_hw_acc_odin_w2
...
Enable crypto HW acceleration for UBLOX_EVK_ODIN_W2
2017-07-31 15:24:47 +00:00
adustm
45dcf598c8
Remove MBEDTLS_SHA1_C
2017-07-25 11:22:55 +02:00
adustm
a08eec05c0
NUCLEO_F756ZG/mbedTLS : add hw acceleration for SHA1
2017-07-25 11:21:45 +02:00
adustm
a89860c81d
fix typo in directory name
2017-07-18 17:09:56 -05:00
adustm
1ae5f8cdaa
Add AES HW encryption for NUCLEO_F756ZG in mbedtls
2017-07-18 17:09:54 -05:00
andreas.larsson
ef232dbae5
Renamed so that we have one configuration for all STM32F439 targets.
2017-07-12 12:13:09 +02:00
Jimmy Brisson
868adafe57
Merge pull request #4518 from mazimkhan/mbed-tls-test-deploy
...
Add new target in mbedtls importer Makefile for mbedtls tests
2017-07-10 12:03:47 -05:00
Azim Khan
5067db07ae
Add deploy-tests to the .PHONY target
2017-07-04 19:26:31 +01:00
adustm
e2c96e9b7a
Move definitions in aes_alt.c + Factorize code
2017-06-29 16:09:34 +02:00
adustm
2da3128a2a
STM32L486RG/mbedtls: add aes hw acceleration
2017-06-29 16:05:45 +02:00
Armelle DUBOC
ec72ac0a28
Merge branch 'master' into STM_sha256_F439ZI
2017-06-27 08:25:42 +02:00
adustm
e63912ff44
Check that the HASH is not busy before save and restore iHW registers
2017-06-16 11:03:50 +02:00
adustm
842791bef7
handle context swap + change macro name
2017-06-16 11:03:46 +02:00
adustm
85d68e32f7
replace 64 by define
2017-06-16 11:03:41 +02:00
adustm
b38eea2caf
Remove tabs, fix doxygen comments
2017-06-16 11:03:32 +02:00
adustm
c2a85fb12a
Rework SHA1 update for buffer <4 bytes management
2017-06-16 11:03:27 +02:00
adustm
ca65e01ffa
Handle 64 bytes buffers
2017-06-16 11:03:23 +02:00
adustm
dac9004684
Move MBEDTLS_SHA1_C from mbedtls_device.h to targets.json
2017-06-16 11:02:42 +02:00
adustm
85d549c902
Improve memory management
2017-06-16 11:02:38 +02:00